公开(公告)号：US20240297089A1

公开(公告)日：2024-09-05

申请号：US18662075

申请日：2024-05-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Chen LAI ,  Ming-Chih YEW ,  Li-Ling LIAO ,  Chin-Hua WANG ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498 ,  H01L25/065

CPC分类号： H01L23/3178 ,  H01L21/56 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/73204 ,  H01L2924/1434 ,  H01L2924/1811 ,  H01L2924/1815 ,  H01L2924/182

摘要： A package structure is provided. The package structure includes a package component over a redistribution structure, a substrate under the redistribution structure, and an underfill material over the redistribution structure and including a first extending portion in the structure. The package component has a first sidewall and a second sidewall connected to the first sidewall at a first corner. In a plan view, the first extending portion has a first sidewall passing through the first sidewall of the package component and a second sidewall opposite to the first sidewall of the first extending portion and passing through the second sidewall of the package component.

公开(公告)号：US20240243076A1

公开(公告)日：2024-07-18

申请号：US18428245

申请日：2024-01-31

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Shu-Shen YEH ,  Chin-Hua WANG ,  Po-Chen LAI ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L23/00 ,  H01L21/52 ,  H01L23/053 ,  H01L23/16

CPC分类号： H01L23/562 ,  H01L21/52 ,  H01L23/053 ,  H01L23/16

摘要： A semiconductor device package is provided, including a substrate, a semiconductor device, a ring structure, a lid structure, and at least one adhesive member. The semiconductor device is disposed over the substrate. The ring structure is disposed over the substrate and surrounds the semiconductor device. The ring structure comprises a first ring part and a second ring part on opposite sides of the semiconductor device. A first gap is formed between the first ring part and the semiconductor device, a second gap is formed between the second ring part and the semiconductor device, and the first gap is smaller than the second gap. The lid structure is disposed over the ring structure and extends across the semiconductor device. The adhesive member is disposed in the first gap and configured to connect the lid structure and the first surface of the substrate.

公开(公告)号：US20230395526A1

公开(公告)日：2023-12-07

申请号：US17805109

申请日：2022-06-02

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Chen LAI ,  Ming-Chih YEW ,  Shu-Shen YEH ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L23/00 ,  H01L25/18 ,  H01L23/538 ,  H01L23/552 ,  H01L21/48

CPC分类号： H01L23/562 ,  H01L25/18 ,  H01L23/5383 ,  H01L23/552 ,  H01L21/4857 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13139 ,  H01L2224/13155 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13164 ,  H01L2924/014 ,  H01L24/13

摘要： Some implementations described herein provide techniques and apparatuses for a semiconductor package. The semiconductor package, which may correspond to a high performance computing package, includes a reinforcement structure that is embedded in a substrate of the semiconductor package. The reinforcement structure may increase a rigidity of the semiconductor package so that a warpage is reduced and a coplanarity between the substrate and a printed circuit board is maintained during a surface mount process. Reducing the warpage may increase a robustness of connection structures between an interposer and the substrate. Additionally, maintaining the coplanarity reduces a likelihood that connection structures at a bottom surface of the substrate will fail to adequately solder or attach to lands of the printed circuit board during the surface mount process. In this way, a likelihood of opens and/or shorts between the semiconductor package and the printed circuit board is reduced and a robustness of the semiconductor package may be increased to improve an overall yield of a product including the semiconductor package.

公开(公告)号：US20230378024A1

公开(公告)日：2023-11-23

申请号：US17663793

申请日：2022-05-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Sheng LIN ,  Chien Hung CHEN ,  Po-Chen LAI ,  Chin-Hua WANG ,  Shin-Puu JENG

IPC分类号： H01L23/467 ,  H01L25/065 ,  H01L21/48

CPC分类号： H01L23/467 ,  H01L25/0655 ,  H01L21/4882 ,  H01L2924/37001 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/1611 ,  H01L2924/16251 ,  H01L2924/1632 ,  H01L2924/1676 ,  H01L2924/16747 ,  H01L2924/1659 ,  H01L23/49833

摘要： A ring structure on a package substrate is divided into at least four different components, including a plurality of first pieces and a plurality of second pieces. By dividing the ring structure into at least four different components, the ring structure reduces flexibility of the package substrate, which thus reduces stress on a molding compound (e.g., in a range from approximately 1% to approximately 10%). As a result, molding cracking is reduced, which reduces defect rates and increases yield. Accordingly, raw materials, power, and processing resources are conserved that would otherwise be consumed with manufacturing additional packages when defect rates are higher.

公开(公告)号：US20230067690A1

公开(公告)日：2023-03-02

申请号：US17460668

申请日：2021-08-30

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Shu-Shen YEH ,  Chin-Hua WANG ,  Po-Chen LAI ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L23/00 ,  H01L23/053 ,  H01L23/16 ,  H01L21/52

摘要： A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a substrate, a semiconductor device, a ring structure, a lid structure, and an adhesive member. The semiconductor device is disposed over the substrate. The ring structure is disposed over the substrate and surrounds the semiconductor device. The lid structure is disposed over the ring structure and extends across the semiconductor device. The adhesive member is disposed in a gap between the ring structure and the semiconductor device and attached to the lid structure and the substrate.

公开(公告)号：US20230011353A1

公开(公告)日：2023-01-12

申请号：US17370312

申请日：2021-07-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chin-Hua WANG ,  Chia Kuei HSU ,  Shu-Shen YEH ,  Po-Chen LAI ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L23/498 ,  H01L25/065 ,  H01L23/00 ,  H01L21/48

摘要： A chip package structure is provided. The chip package structure includes a wiring substrate. The chip package structure includes an interposer substrate over the wiring substrate. The interposer substrate includes a redistribution structure, a dielectric layer, a conductive via, and a plurality of first dummy vias, the dielectric layer is over the redistribution structure, the conductive via and the first dummy vias pass through the dielectric layer, the first dummy vias surround the conductive via, and the first dummy vias are electrically insulated from the wiring substrate. The chip package structure includes a chip structure over the interposer substrate. The chip structure is electrically connected to the conductive via, and the chip structure is electrically insulated from the first dummy vias.

公开(公告)号：US20240347407A1

公开(公告)日：2024-10-17

申请号：US18753139

申请日：2024-06-25

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Po-Chen LAI ,  Ming-Chih YEW ,  Po-Yao LIN ,  Chin-Hua WANG ,  Shin-Puu JENG

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/14 ,  H01L23/29 ,  H01L23/498 ,  H01L25/065

CPC分类号： H01L23/3185 ,  H01L21/565 ,  H01L23/145 ,  H01L23/293 ,  H01L23/3192 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/32056 ,  H01L2224/32059 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1811 ,  H01L2924/1815 ,  H01L2924/182 ,  H01L2924/186 ,  H01L2924/35121

摘要： Structures and formation methods of a chip package structure are provided. The method includes mounting semiconductor dies over die regions of an interposer substrate. The adjacent die regions are separated from one another by a gap region of the interposer substrate. The method also includes forming first underfill material layers and a second gap-filling layer over the interposer substrate corresponding to the gap region. The method further includes forming an encapsulating layer over the interposer substrate to surround the semiconductor dies, the first underfill material layers, and the second underfill material layer. The gap region has ends and the first underfill material layers is formed adjacent to the ends of the gap region. The Young's modulus of the second underfill material layer is less than that of the first underfill material layers.

公开(公告)号：US20240332214A1

公开(公告)日：2024-10-03

申请号：US18738188

申请日：2024-06-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Chen LAI ,  Ming-Chih YEW ,  Po-Yao LIN ,  Yu-Sheng LIN ,  Shin-Puu JENG

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065

CPC分类号： H01L23/562 ,  H01L21/563 ,  H01L23/3185 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/73204

摘要： A package structure and a formation method of a package structure are provided. The package structure includes a circuit substrate and a die package bonded to the circuit substrate through bonding structures. The package structure also includes a reinforcing structure over the circuit substrate. The reinforcing structure partially surrounds a corner of the die package. The package structure further includes an underfill structure surrounding the bonding structure. The underfill structure wraps around an end of the reinforcing structure. In a top view of the package structure, the reinforcing structure has an outer corner, and the underfill structure is spaced apart from the outer corner of the reinforcing structure.

公开(公告)号：US20240258193A1

公开(公告)日：2024-08-01

申请号：US18631181

申请日：2024-04-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Chen LAI ,  Ming-Chih YEW ,  Po-Yao LIN ,  Chin-Hua WANG ,  Shin-Puu JENG

IPC分类号： H01L23/367 ,  H01L21/48 ,  H01L23/00 ,  H01L23/42 ,  H01L23/433 ,  H01L23/498 ,  H01L25/065

CPC分类号： H01L23/3675 ,  H01L21/4817 ,  H01L23/49833 ,  H01L25/0655 ,  H01L23/42 ,  H01L23/433 ,  H01L23/49816 ,  H01L24/73 ,  H01L2924/1611 ,  H01L2924/16152 ,  H01L2924/16251 ,  H01L2924/3511 ,  H01L2924/35121

摘要： A method of forming a semiconductor package structure is provided. The method includes disposing a first semiconductor device on an interposer substrate, disposing the interposer substrate on a carrier substrate, applying a thermal interface material on the first semiconductor device, and attaching a lid on the carrier substrate to cover the first semiconductor device. The interposer substrate is disposed between the carrier substrate and the first semiconductor device. The lid includes a lower surface having a first recess facing the first semiconductor device, and a portion of the thermal interface material is accommodated in the first recess.

公开(公告)号：US20230395443A1

公开(公告)日：2023-12-07

申请号：US17805566

申请日：2022-06-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Chen LAI ,  Ming-Chih YEW ,  Li-Ling LIAO ,  Yu-Sheng LIN ,  Shin-Puu JENG

IPC分类号： H01L23/13 ,  H01L23/00 ,  H01L25/16 ,  H01L25/10 ,  H01L23/498 ,  H01L21/48

CPC分类号： H01L23/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/16 ,  H01L25/105 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L21/4846 ,  H01L2924/3511 ,  H01L2924/37001 ,  H01L2924/1436 ,  H01L2924/1431 ,  H01L2225/1041 ,  H01L2225/107 ,  H01L2224/73204 ,  H01L2224/32225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2924/15153

摘要： A semiconductor package, which may correspond to a high-performance computing package, includes an interposer, a substrate, and an integrated circuit device between the interposer and the substrate. The integrated circuit device, which may correspond to an integrated passive device, is attached to the interposer within a cavity of the interposer. Attaching the integrated circuit device within the cavity of the interposer creates a clearance between the integrated circuit device and the substrate. In this way, a likelihood of the integrated circuit device contacting the substrate during a bending and/or a deformation of the semiconductor package is reduced. By reducing the likelihood of such contact, damage to the integrated circuit device and/or the substrate may be avoided to increase a reliability and/or yield of the semiconductor package.