公开(公告)号：US11557505B2

公开(公告)日：2023-01-17

申请号：US17028503

申请日：2020-09-22

Applicant: Infineon Technologies AG

Inventor： Wolfgang Lehnert ,  Rudolf Berger ,  Rudolf Lehner ,  Gerhard Metzger-Brueckl ,  Guenther Ruhl

IPC: H01L21/762 ,  H01L21/78 ,  H01L21/683 ,  H01L29/16 ,  H01L29/20

Abstract: A method for manufacturing a semiconductor device includes implanting gas ions in a donor wafer and bonding the donor wafer to a carrier wafer to form a compound wafer. The method also includes subjecting the compound wafer to a thermal treatment to cause separation along a delamination layer and growing an epitaxial layer on a portion of separated compound wafer to form a semiconductor device layer. The method further includes cutting the carrier wafer.

公开(公告)号：US10651072B2

公开(公告)日：2020-05-12

申请号：US16264265

申请日：2019-01-31

Applicant: Infineon Technologies AG

Inventor： Rudolf Berger ,  Wolfgang Lehnert ,  Gerhard Metzger-Brueckl ,  Guenther Ruhl ,  Roland Rupp

IPC: H01L21/683 ,  H01L21/02 ,  H01L21/78 ,  H01L29/66 ,  H01L29/78

Abstract: This application relates to a method for producing a semiconductor component, in which a wafer composite is provided. The wafer composite includes a donor substrate, an auxiliary substrate and a separation layer arranged between the auxiliary substrate and the donor substrate. The separation layer has a support structure and sacrificial material, which is formed laterally between elements of the support structure. The auxiliary substrate is separated from the donor substrate. The separation includes a selective removal of the sacrificial material in relation to the support structure.

公开(公告)号：US20190244850A1

公开(公告)日：2019-08-08

申请号：US16264265

申请日：2019-01-31

Applicant: Infineon Technologies AG

Inventor： Rudolf Berger ,  Wolfgang Lehnert ,  Gerhard Metzger-Brueckl ,  Guenther Ruhl ,  Roland Rupp

IPC: H01L21/683 ,  H01L21/02

CPC classification number: H01L21/6835 ,  H01L21/02002 ,  H01L29/66712 ,  H01L29/7813 ,  H01L2221/68318 ,  H01L2221/6835 ,  H01L2221/68381

Abstract: This application relates to a method for producing a semiconductor component, in which a wafer composite is provided. The wafer composite includes a donor substrate, an auxiliary substrate and a separation layer arranged between the auxiliary substrate and the donor substrate. The separation layer has a support structure and sacrificial material, which is formed laterally between elements of the support structure. The auxiliary substrate is separated from the donor substrate. The separation includes a selective removal of the sacrificial material in relation to the support structure.

公开(公告)号：US20170236801A1

公开(公告)日：2017-08-17

申请号：US15455158

申请日：2017-03-10

Applicant: Infineon Technologies AG

Inventor： Michael Rogalli ,  Wolfgang Lehnert

IPC: H01L23/00

CPC classification number: H01L24/85 ,  H01L21/76834 ,  H01L21/76885 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/02206 ,  H01L2224/0221 ,  H01L2224/02215 ,  H01L2224/0382 ,  H01L2224/0391 ,  H01L2224/04042 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05184 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05664 ,  H01L2224/05684 ,  H01L2224/32245 ,  H01L2224/4502 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/48811 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48847 ,  H01L2224/48864 ,  H01L2224/48884 ,  H01L2224/73265 ,  H01L2224/85007 ,  H01L2224/8501 ,  H01L2224/85238 ,  H01L2224/85375 ,  H01L2224/8591 ,  H01L2924/05042 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/059 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: Various embodiments provide a semiconductor device, including a final metal layer having a top side and at least one sidewall; and a passivation layer disposed over at least part of at least one of the top side and the at least one sidewall of the final metal layer; wherein the passivation layer has a substantially uniform thickness.

公开(公告)号：US09704750B2

公开(公告)日：2017-07-11

申请号：US15224099

申请日：2016-07-29

Applicant: Infineon Technologies AG

Inventor： Roland Rupp ,  Wolfgang Lehnert ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L23/48 ,  H01L21/78 ,  H01L21/66 ,  H01L29/16 ,  H01L29/20

CPC classification number: H01L21/7813 ,  H01L21/02002 ,  H01L21/76251 ,  H01L21/78 ,  H01L22/14 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/6606 ,  H01L29/7395 ,  H01L29/8611 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A method of forming a semiconductor device and a semiconductor device are provided. The method includes providing a wafer stack including a carrier wafer comprising graphite and a device wafer comprising a wide band-gap semiconductor material and having a first side and a second side opposite the first side, the second side being attached to the carrier wafer, defining device regions of the wafer stack, partly removing the carrier wafer so that openings are formed in the carrier wafer arranged within respective device regions and that the device wafer is supported by a residual of the carrier wafer; and further processing the device wafer while the device wafer remains supported by the residual of the carrier wafer.

公开(公告)号：US09590044B2

公开(公告)日：2017-03-07

申请号：US13860612

申请日：2013-04-11

Applicant: Infineon Technologies AG

Inventor： Guenther Ruhl ,  Wolfgang Lehnert ,  Rudolf Berger

IPC: H01L29/76 ,  B82Y10/00 ,  H01L27/00 ,  H01L31/10 ,  B82Y20/00 ,  H01L29/16 ,  H01L29/40 ,  H01L29/778 ,  H01L29/861

CPC classification number: H01L29/1606 ,  H01L29/408 ,  H01L29/778 ,  H01L29/7788 ,  H01L29/7789 ,  H01L29/861

Abstract: In various embodiments, an electronic component is provided. The electronic component may include a dielectric structure; and a two-dimensional material containing structure over the dielectric structure. The dielectric structure is doped with dopants to change the electric characteristic of the two-dimensional material containing structure.

Abstract translation: 在各种实施例中，提供电子部件。 电子部件可以包括电介质结构; 以及在电介质结构上包含结构的二维材料。 电介质结构掺杂有掺杂剂以改变含二维材料结构的电特性。

公开(公告)号：US20170033010A1

公开(公告)日：2017-02-02

申请号：US15224076

申请日：2016-07-29

Applicant: Infineon Technologies AG

Inventor： Roland Rupp ,  Wolfgang Lehnert ,  Francisco Javier Santos Rodriguez

IPC: H01L21/78 ,  H01L29/16

CPC classification number: H01L21/7813 ,  H01L21/02002 ,  H01L21/76254 ,  H01L21/78 ,  H01L29/1608 ,  H01L29/861

Abstract: A method of producing a semiconductor device and a wafer structure are provided. The method includes attaching a donor wafer comprising silicon carbide to a carrier wafer comprising graphite, splitting the donor wafer along an internal delamination layer so that a split layer comprising silicon carbide and attached to the carrier wafer is formed, removing the carrier wafer above an inner portion of the split layer while leaving a residual portion of the carrier wafer attached to the split layer to form a partially supported wafer, and further processing the partially supported wafer.

Abstract translation: 提供了制造半导体器件和晶片结构的方法。 该方法包括将包含碳化硅的施主晶片附接到包括石墨的载体晶片，沿着内部分层分离施主晶片，使得形成包含碳化硅并附着到载体晶片的分裂层，将载体晶片移除在内部 同时留下附着到分离层的载体晶片的残留部分以形成部分支撑的晶片，并且进一步处理部分支撑的晶片。

公开(公告)号：US09165821B2

公开(公告)日：2015-10-20

申请号：US14138158

申请日：2013-12-23

Applicant: Infineon Technologies AG

Inventor： Michael Rogalli ,  Wolfgang Lehnert

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/3213

CPC classification number: H01L21/76834 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/0272 ,  H01L21/31058 ,  H01L21/31111 ,  H01L21/32134 ,  H01L21/32139 ,  H01L21/76822 ,  H01L21/76829 ,  H01L21/76832

Abstract: According to one embodiment, a method for processing a semiconductor device is provided including forming a final metal layer forming a passivation layer over the final metal layer and structuring the passivation layer and the final metal layer to form a patterned metal layer and a patterned passivation layer, wherein the patterned metal layer includes a pad region covered by the patterned passivation layer.

Abstract translation: 根据一个实施例，提供了一种用于处理半导体器件的方法，包括在最终金属层上形成钝化层的最终金属层，并且构造钝化层和最终金属层以形成图案化的金属层和图案化的钝化层 ，其中所述图案化金属层包括被图案化钝化层覆盖的焊盘区域。

公开(公告)号：US20150194480A1

公开(公告)日：2015-07-09

申请号：US14665521

申请日：2015-03-23

Applicant: Infineon Technologies AG

Inventor： Wolfgang Lehnert ,  Stefan Pompl ,  Markus Meyer

IPC: H01L29/04 ,  H01L29/16 ,  H01L29/94

CPC classification number: H01L29/04 ,  H01L21/0245 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/28035 ,  H01L21/763 ,  H01L21/823828 ,  H01L28/60 ,  H01L29/16 ,  H01L29/51 ,  H01L29/7833 ,  H01L29/945

Abstract: In one embodiment a method of forming a compressive polycrystalline semiconductive material layer is disclosed. The method comprises forming a polycrystalline semiconductive seed layer over a substrate and forming a silicon layer by depositing silicon directly on the polycrystalline silicon seed layer under amorphous process conditions at a temperature below 600 C.

Abstract translation: 公开了一种形成压缩多晶半导体材料层的方法。 该方法包括在衬底上形成多晶半导体种子层并通过在低于600℃的温度的无定形工艺条件下将硅直接沉积在多晶硅籽晶层上形成硅层。

公开(公告)号：US20140070232A1

公开(公告)日：2014-03-13

申请号：US13776796

申请日：2013-02-26

Applicant: Infineon Technologies AG

Inventor： Rudolf Berger ,  Hermann Gruber ,  Wolfgang Lehnert ,  Guenther Ruhl ,  Raimund Foerg ,  Anton Mauder ,  Hans-Joachim Schulze

IPC: H01L21/762 ,  H01L29/16

CPC classification number: H01L21/76251 ,  H01L21/02002 ,  H01L21/0237 ,  H01L21/0243 ,  H01L21/02527 ,  H01L21/02601 ,  H01L21/02628 ,  H01L21/7624 ,  H01L29/02 ,  H01L29/04 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/161

Abstract: A composite wafer including a carrier substrate having a graphite core and a monocrystalline semiconductor substrate or layer attached to the carrier substrate and a corresponding method for manufacturing such a composite wafer is provided.

Abstract translation: 提供了一种复合晶片，其包括具有石墨芯和附着于载体基板的单晶半导体衬底或层的载体衬底和用于制造这种复合晶片的相应方法。