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公开(公告)号：US11735642B2
公开(公告)日：2023-08-22
申请号：US17314672
申请日：2021-05-07
IPC分类号： H01L29/16 , H01L29/66 , H01L21/02 , H01L21/683 , H01L21/04 , H01L21/78 , H01L29/10 , H01L29/08 , H01L29/78 , H01L29/739
CPC分类号： H01L29/66068 , H01L21/0262 , H01L21/02378 , H01L21/02529 , H01L21/02634 , H01L21/02658 , H01L21/048 , H01L21/0475 , H01L21/6835 , H01L21/78 , H01L21/7806 , H01L21/7813 , H01L29/0804 , H01L29/0882 , H01L29/1095 , H01L29/1608 , H01L29/66053 , H01L29/7395 , H01L29/7802
摘要： A method includes providing a layer of porous silicon carbide supported by a silicon carbide substrate, providing a layer of epitaxial silicon carbide on the layer of porous silicon carbide, forming a plurality of semiconductor devices in the layer of epitaxial silicon carbide, and separating the substrate from the layer of epitaxial silicon carbide at the layer of porous silicon carbide. Additional methods are described.
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公开(公告)号：US11721547B2
公开(公告)日：2023-08-08
申请号：US13827253
申请日：2013-03-14
IPC分类号： H01L21/02 , H01L21/762 , H01L29/16
CPC分类号： H01L21/02529 , H01L21/76254 , H01L29/1608
摘要： A method for manufacturing a silicon carbide substrate for an electrical silicon carbide device includes providing a silicon carbide dispenser wafer including a silicon face and a carbon face and depositing a silicon carbide epitaxial layer on the silicon face. Further, the method includes implanting ions with a predefined energy characteristic forming an implant zone within the epitaxial layer, so that the ions are implanted with an average depth within the epitaxial layer corresponding to a designated thickness of an epitaxial layer of the silicon carbide substrate to be manufactured. Furthermore, the method comprises bonding an acceptor wafer onto the epitaxial layer so that the epitaxial layer is arranged between the dispenser wafer and the acceptor wafer. Further, the epitaxial layer is split along the implant zone so that a silicon carbide substrate represented by the acceptor wafer with an epitaxial layer with the designated thickness is obtained.
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公开(公告)号：US11476111B2
公开(公告)日：2022-10-18
申请号：US16811192
申请日：2020-03-06
发明人： Iris Moder , Bernhard Goller , Tobias Franz Wolfgang Hoechbauer , Roland Rupp , Francisco Javier Santos Rodriguez , Hans-Joachim Schulze
IPC分类号： H01L21/00 , H01L21/02 , H01L21/4757 , H01L21/475 , H01L21/467
摘要： A semiconductor substrate includes a base portion, an auxiliary layer and a surface layer. The auxiliary layer is formed on the base portion. The surface layer is formed on the auxiliary layer. The surface layer is in contact with a first main surface of the semiconductor substrate. The auxiliary layer has a different electrochemical dissolution efficiency than the base portion and the surface layer. At least a portion of the auxiliary layer and at least a portion of the surface layer are converted into a porous structure. Subsequently, an epitaxial layer is formed on the first main surface.
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公开(公告)号：US11251269B2
公开(公告)日：2022-02-15
申请号：US16576396
申请日：2019-09-19
IPC分类号： H01L29/10 , H01L29/06 , H01L29/423 , H01L29/16 , H01L29/66
摘要： An embodiment of a semiconductor device includes a trench gate structure extending from a first surface into a silicon carbide semiconductor body along a vertical direction. A body region of a first conductivity type adjoins a sidewall of the trench gate structure and includes a first body sub-region adjoining the sidewall and a second body sub-region adjoining the sidewall. At least one profile of dopants of the first conductivity type along the vertical direction includes a first doping peak in the first body sub-region and a second doping peak in the second body sub-region. A doping concentration of the first doping peak is larger than a doping concentration of the second doping peak.
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5.发明授权公开(公告)号：US11239384B2
公开(公告)日：2022-02-01
申请号：US16986729
申请日：2020-08-06
IPC分类号： H01L31/18 , H01L31/068 , H01L23/29 , H01L23/31 , H01L21/02
摘要： A semiconductor ingot is sliced to obtain a semiconductor slice with a front side surface and a rear side surface parallel to the front side surface. A passivation layer is formed directly on at least one of the front side surface and the rear side surface. A barrier layer including least one of silicon carbide, a ternary nitride, and a ternary carbide is formed on the rear side surface.
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公开(公告)号：US20220028980A1
公开(公告)日：2022-01-27
申请号：US17496050
申请日：2021-10-07
发明人： Andreas Meiser , Caspar Leendertz , Anton Mauder , Roland Rupp
IPC分类号： H01L29/16 , H01L29/66 , H01L21/02 , H01L29/78 , H01L29/06 , H01L29/417 , H01L29/40 , H01L29/423
摘要： A semiconductor device includes a trench structure extending from a first surface into a silicon carbide semiconductor body, the trench structure having a gate electrode that is dielectrically insulated from the semiconductor body, a shielding region adjoining a bottom of the trench structure and forming a first pn junction with a drift structure of the semiconductor body, a body region forming a second pn junction with the drift structure, a source zone arranged between the first surface and the body region and forming a third pn junction with the source zone, wherein a contact portion of the body region extends to the first surface, wherein the source zone surrounds the contact portion of the body region at the first surface, and wherein the trench structure forms an enclosed loop at the first surface that surrounds the source zone and the contact portion of the body region at the first surface.
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公开(公告)号：US11107732B2
公开(公告)日：2021-08-31
申请号：US16410724
申请日：2019-05-13
发明人： Francisco Javier Santos Rodriguez , Guenter Denifl , Tobias Franz Wolfgang Hoechbauer , Martin Huber , Wolfgang Lehnert , Roland Rupp , Hans-Joachim Schulze
摘要： A method for processing a wide band gap semiconductor wafer is proposed. The method includes depositing a non-monocrystalline support layer at a back side of a wide band gap semiconductor wafer, depositing an epitaxial layer at a front side of the wide band gap semiconductor wafer, and splitting the wide band gap semiconductor wafer along a splitting region to obtain a device wafer including at least a part of the epitaxial layer, and a remaining wafer including the non-monocrystalline support layer.
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公开(公告)号：US20210167203A1
公开(公告)日：2021-06-03
申请号：US17172680
申请日：2021-02-10
发明人： Andreas Peter Meiser , Romain Esteve , Roland Rupp
IPC分类号： H01L29/78 , H01L29/10 , H01L29/08 , H01L29/739 , H01L29/66 , H01L29/06 , H01L29/16 , H01L29/423
摘要： A method of manufacturing semiconductor devices includes: forming source regions of a first conductivity type in a SiC-based semiconductor substrate, wherein dopants are introduced selectively through first segments of first mask openings in a first dopant mask and wherein a longitudinal axis of the first mask opening extends into a first horizontal direction; forming pinning regions of a complementary second conductivity type, wherein dopants are selectively introduced through second segments of the first mask openings and wherein the first and second segments alternate along the first horizontal direction; and forming body regions of the second conductivity type, wherein dopants are selectively introduced through second mask openings in a second dopant mask, wherein a width of the second mask openings along a second horizontal direction orthogonal to the first horizontal direction is greater than a width of the first mask openings.
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9.发明授权公开(公告)号：US10833218B2
公开(公告)日：2020-11-10
申请号：US15808561
申请日：2017-11-09
IPC分类号： H01L31/18 , H01L31/068 , H01L23/29 , H01L23/31 , H01L21/02
摘要： A semiconductor ingot is sliced to obtain a semiconductor slice with a front side surface and a rear side surface parallel to the front side surface. A passivation layer is formed directly on at least one of the front side surface and the rear side surface. A barrier layer including least one of silicon carbide, a ternary nitride, and a ternary carbide is formed on the rear side surface.
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公开(公告)号：US20200343085A1
公开(公告)日：2020-10-29
申请号：US16397795
申请日：2019-04-29
摘要： A method includes producing a bulk substrate and beveling an edge of the bulk substrate using an electrical discharge machining (EDM) process and/or an electrochemical discharge machining (ECDM) process.
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