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公开(公告)号：US20220163475A1
公开(公告)日：2022-05-26
申请号：US17453410
申请日：2021-11-03
Applicant: Infineon Technologies AG
Inventor： Markus Meyer , Werner Breuer
Abstract: In accordance with an embodiment, a gas-sensitive device includes a substrate structure, and a gas sensitive capacitor. The gas sensitive capacitor a first capacitor electrode in form of a gas-sensitive layer on a first main surface region of an insulation layer, and a second capacitor electrode in form of a buried conductive region below the insulation layer, so that the insulation layer is arranged between the first and second capacitor electrode. The gas-sensitive layer comprises a sheet impedance which changes in response to the adsorption or desorption of gas molecules.
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公开(公告)号：US09583559B2
公开(公告)日：2017-02-28
申请号：US14665521
申请日：2015-03-23
Applicant: Infineon Technologies AG
Inventor： Wolfgang Lehnert , Stefan Pompl , Markus Meyer
IPC: H01L21/02 , H01L21/28 , H01L21/763 , H01L21/8238 , H01L29/04 , H01L29/16 , H01L29/51 , H01L29/78 , H01L29/94 , H01L49/02
CPC classification number: H01L29/04 , H01L21/0245 , H01L21/02513 , H01L21/02532 , H01L21/0262 , H01L21/28035 , H01L21/763 , H01L21/823828 , H01L28/60 , H01L29/16 , H01L29/51 , H01L29/7833 , H01L29/945
Abstract: In one embodiment a method of forming a compressive polycrystalline semiconductive material layer is disclosed. The method comprises forming a polycrystalline semiconductive seed layer over a substrate and forming a silicon layer by depositing silicon directly on the polycrystalline silicon seed layer under amorphous process conditions at a temperature below 600 C.
Abstract translation: 公开了一种形成压缩多晶半导体材料层的方法。 该方法包括在衬底上形成多晶半导体种子层并通过在低于600℃的温度的无定形工艺条件下将硅直接沉积在多晶硅籽晶层上形成硅层。
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公开(公告)号：US20240060944A1
公开(公告)日：2024-02-22
申请号：US18452007
申请日：2023-08-18
Applicant: Infineon Technologies AG
Inventor： Alexandra Marina Roth , Matic Krivec , Alexander Zöpfl , Dominic Maier , Markus Meyer , Werner Breuer
CPC classification number: G01N33/0022 , G01N33/0037 , G01N33/0039 , G01N33/0062 , G01N27/16
Abstract: A sensor chip includes a substrate and one or more chemo-resistive gas sensing elements attached to the substrate. Each gas sensing element provides a signal depending on one or more gases to be sensed. A catalytic gas filter arrangement includes one or more filter sections, each filter section including a cavity covered with at least one membrane. The at least one membrane is supported by a support structure and includes gas permeable pores. A surface defining the pores includes a catalytic material for degrading one or more of the gases. The gas filter arrangement is arranged so at least one of the chemo-resistive gas sensing elements is exposed to a filtered mixture of the gases in the cavity of one of the filter sections. The filtered mixture of gases is obtained by filtering the ambient mixture of the one or more gases with the one of the filter sections.
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公开(公告)号：US20230087922A1
公开(公告)日：2023-03-23
申请号：US17930220
申请日：2022-09-07
Applicant: Infineon Technologies AG
Inventor： Werner Breuer , Matic Krivec , Markus Meyer , Michael Emmert , Alexandra Marina Roth , Alexander Zoepfl
Abstract: A temperature-regulated chemi-resistive gas sensor includes a sensor surface including a chemically sensitive sensor layer including an active material for adsorbing and desorbing gas molecules of an analyte gas. A predetermined time-continuous periodic temperature profile is applied for periodically heating the sensor surface. An electrical sensor layer conductance signal is determined and time windows are applied to the sensor layer conductance signal. For one or more of the time windows, discrete frequency spectrum data of the sensor layer conductance signal is obtained, and a current gas concentration of the analyte gas is determined based on the obtained discrete frequency spectrum data.
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公开(公告)号：US11212624B2
公开(公告)日：2021-12-28
申请号：US16533214
申请日：2019-08-06
Applicant: Infineon Technologies AG
Inventor： Wolfgang Klein , Karolina Gierl , Markus Meyer
Abstract: A MEMS-transducer comprises a membrane structure having a first main surface and a second main surface opposing the first main surface. A substrate structure holds the membrane structure, wherein the substrate structure overlaps with the first main surface of the membrane structure in a first edge region being adjacent to a first inner region of the first main surface. A gap is formed between the membrane structure and the substrate structure in the first edge region and extends from the first inner region into the first edge region.
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Patent Agency Ranking
公开(公告)号：US20200084549A1
公开(公告)日：2020-03-12
申请号：US16533214
申请日：2019-08-06
Applicant: Infineon Technologies AG
Inventor： Wolfgang Klein , Karolina Gierl , Markus Meyer
Abstract: A MEMS-transducer comprises a membrane structure having a first main surface and a second main surface opposing the first main surface. A substrate structure holds the membrane structure, wherein the substrate structure overlaps with the first main surface of the membrane structure in a first edge region being adjacent to a first inner region of the first main surface. A gap is formed between the membrane structure and the substrate structure in the first edge region and extends from the first inner region into the first edge region.
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公开(公告)号：US09881991B2
公开(公告)日：2018-01-30
申请号：US14918190
申请日：2015-10-20
Applicant: Infineon Technologies AG
Inventor： Wolfgang Lehnert , Michael Stadtmueller , Stefan Pompl , Markus Meyer
IPC: H01L27/108 , H01L49/02 , H01L29/66 , H01L29/94
CPC classification number: H01L28/60 , H01L27/10829 , H01L27/10861 , H01L29/66181 , H01L29/945
Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.
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公开(公告)号：US20130043562A1
公开(公告)日：2013-02-21
申请号：US13660966
申请日：2012-10-25
Applicant: INFINEON TECHNOLOGIES AG
Inventor： Wolfgang Lehnert , Stefan Pompl , Markus Meyer
CPC classification number: H01L29/04 , H01L21/0245 , H01L21/02513 , H01L21/02532 , H01L21/0262 , H01L21/28035 , H01L21/763 , H01L21/823828 , H01L28/60 , H01L29/16 , H01L29/51 , H01L29/7833 , H01L29/945
Abstract: In one embodiment a method of forming a compressive polycrystalline semiconductive material layer is disclosed. The method comprises forming a polycrystalline semiconductive seed layer over a substrate and forming a silicon layer by depositing silicon directly on the polycrystalline silicon seed layer under amorphous process conditions at a temperature below 600 C.
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公开(公告)号：US11921074B2
公开(公告)日：2024-03-05
申请号：US17453410
申请日：2021-11-03
Applicant: Infineon Technologies AG
Inventor： Markus Meyer , Werner Breuer
CPC classification number: G01N27/221 , G01N33/0009 , G01N2027/222
Abstract: In accordance with an embodiment, a gas-sensitive device includes a substrate structure, and a gas sensitive capacitor. The gas sensitive capacitor a first capacitor electrode in form of a gas-sensitive layer on a first main surface region of an insulation layer, and a second capacitor electrode in form of a buried conductive region below the insulation layer, so that the insulation layer is arranged between the first and second capacitor electrode. The gas-sensitive layer comprises a sheet impedance which changes in response to the adsorption or desorption of gas molecules.
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公开(公告)号：US11728073B2
公开(公告)日：2023-08-15
申请号：US17454545
申请日：2021-11-11
Applicant: Infineon Technologies AG
Inventor： Markus Meyer , Jorge Eduardo Adatti Estevez , Alexandra Marina Roth
IPC: C23C16/26 , H01C17/00 , C23C16/56 , H01C17/065 , G01N27/12
CPC classification number: H01C17/003 , C23C16/26 , C23C16/56 , H01C17/06506 , G01N27/12
Abstract: A method for manufacturing an electronic component includes providing a substrate and a functional layer supported by the substrate; forming a structured protection layer on a side of the substrate to which the functional layer is attached, wherein the structured protection layer has a recess so that a portion of the functional layer is exposed; applying a dispersion comprising a solvent and electrically conductive components to the exposed portion of the functional layer so that the recess is at least partially filled with the dispersion; drying the dispersion in order to create an electrically conductive layer; and removing the structured protection layer.
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