公开(公告)号：US09978721B2

公开(公告)日：2018-05-22

申请号：US15241452

申请日：2016-08-19

申请人： Samsung Electronics Co., Ltd.

发明人： Heung-Kyu Kwon ,  Min-Ok Na ,  Sung-Woo Park ,  Ji-Hyun Park ,  Su-Min Park

IPC分类号： H05K1/11 ,  H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L23/552 ,  H01L23/00 ,  H01L25/10 ,  H01L25/18 ,  H01L25/00

CPC分类号： H01L25/0657 ,  H01L21/561 ,  H01L21/565 ,  H01L21/566 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/16112 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/49 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01064 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.

公开(公告)号：US09936578B2

公开(公告)日：2018-04-03

申请号：US14517002

申请日：2014-10-17

申请人： RF Micro Devices, Inc.

发明人： Thong Dang ,  Mohsen Haji-Rahim ,  Mark Charles Held

IPC分类号： H05K7/00 ,  H05K1/11 ,  H01L23/552 ,  H01L23/00 ,  H05K1/18 ,  H05K9/00 ,  H01L23/31 ,  H05K3/28

CPC分类号： H05K1/111 ,  H01L23/3135 ,  H01L23/3171 ,  H01L23/552 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/245 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/8201 ,  H01L2224/82031 ,  H01L2224/82101 ,  H01L2224/82136 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/1421 ,  H01L2924/1434 ,  H01L2924/1443 ,  H01L2924/1461 ,  H01L2924/15159 ,  H01L2924/15787 ,  H01L2924/19105 ,  H05K1/185 ,  H05K3/284 ,  H05K9/0022 ,  H05K2201/0715 ,  H05K2201/10439 ,  Y10T29/49016 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  H01L2224/82 ,  H01L2924/014 ,  H01L2924/00

摘要： A shielded electronic module is formed on a substrate. The substrate has a component area and one or more electronic components attached to the component area. One set of conductive pads may be attached to the component area and another set of conductive pads may be provided on the electronic component. The conductive pads on the component area are electrically coupled to the conductive pads of the electronic component by a conductive layer. A first insulating layer is provided over the component area and underneath the conductive layer that may insulate the electronic component and the substrate from the conductive layer. A second insulating layer is provided over the first insulating layer that covers at least the conductive layer. In this manner, the conductive layer is isolated from an electromagnetic shield formed over the component area.

公开(公告)号：US09899284B2

公开(公告)日：2018-02-20

申请号：US15181176

申请日：2016-06-13

申请人： QUALCOMM INCORPORATED

发明人： Mou-Shiung Lin

IPC分类号： H01L23/31 ,  H01L23/29 ,  H01L21/56 ,  H01L21/683 ,  H01L23/525 ,  H01L23/538 ,  H01L23/00 ,  H01L23/498

CPC分类号： H01L23/293 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/525 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/11 ,  H01L24/19 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/0231 ,  H01L2224/0347 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/11334 ,  H01L2224/114 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/12105 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2224/82 ,  H01L2224/13099 ,  H01L2924/00

摘要： A method for fabricating chip package includes providing a semiconductor chip with a metal bump, next adhering the semiconductor chip to a substrate using a glue material, next forming a polymer material on the substrate, on the semiconductor chip, and on the metal bump, next polishing the polymer material, next forming a patterned circuit layer over the polymer material and connected to the metal bump, and then forming a tin-containing ball over the patterned circuit layer and connected to the patterned circuit layer.

公开(公告)号：US20180047700A1

公开(公告)日：2018-02-15

申请号：US15792414

申请日：2017-10-24

申请人： Erick Merle Spory

发明人： Erick Merle Spory

IPC分类号： H01L23/00 ,  B29C64/10

CPC分类号： H01L24/80 ,  B29C64/10 ,  H01L21/4803 ,  H01L21/4817 ,  H01L21/50 ,  H01L23/04 ,  H01L23/10 ,  H01L23/20 ,  H01L23/26 ,  H01L23/49861 ,  H01L23/564 ,  H01L24/03 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/98 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24175 ,  H01L2224/24226 ,  H01L2224/245 ,  H01L2224/25171 ,  H01L2224/2731 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82214 ,  H01L2224/82815 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/8385 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2924/00015 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3656 ,  H01L2924/3861 ,  H01L2224/48 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/00

摘要： A method is provided. The method includes removing an extracted die including an original ball bond from a previous packaged integrated circuit, bonding the extracted die to an interposer to create a remapped extracted die, 3D printing one or more first bond connections between one or more original bond pads of the extracted die and one or more first bond pads of the interposer, securing the remapped extracted die to a package base, and 3D printing one or more second bond connections between one or more second bond pads of the interposer and one or more package leads or downbonds of the package base. The one or more first and second bond connections conform to the shapes and surfaces of the extracted die, the interposer, and the package base.

公开(公告)号：US09887173B2

公开(公告)日：2018-02-06

申请号：US14130362

申请日：2012-06-26

申请人： Michael Guyenot ,  Michael Guenther ,  Thomas Herboth

发明人： Michael Guyenot ,  Michael Guenther ,  Thomas Herboth

IPC分类号： H01L23/00 ,  H01L23/373

CPC分类号： H01L24/64 ,  H01L23/3735 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/70 ,  H01L24/83 ,  H01L2224/2732 ,  H01L2224/27418 ,  H01L2224/27848 ,  H01L2224/29 ,  H01L2224/29007 ,  H01L2224/29012 ,  H01L2224/29015 ,  H01L2224/29023 ,  H01L2224/29036 ,  H01L2224/29139 ,  H01L2224/29298 ,  H01L2224/3003 ,  H01L2224/30051 ,  H01L2224/3012 ,  H01L2224/30142 ,  H01L2224/3016 ,  H01L2224/30181 ,  H01L2224/32014 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/83048 ,  H01L2224/83203 ,  H01L2224/8384 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/07811 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/1517 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method for producing a sinter layer connection between a substrate and a chip resulting in an electric and thermal connection therebetween and in reduced mechanical tensions within the chip. The method produces a sinter layer by applying a multitude of sinter elements of a base material forming the sinter layer in structured manner on a contact area of a main surface of a substrate; placing a chip to be joined to the substrate on the sinter elements; and heating and compressing the sinter elements to produce a structured sinter layer connecting the substrate and chip and extending within the contact area, the surface coverage density of the sinter elements on the substrate in a center region of the contact area being greater than the surface coverage density of the sinter elements in an edge region of the contact area, and at least one through channel, extending laterally as to the substrate's main surface being provided towards the contact area's edge. A large-area sinter element is situated in the contact area's center region, and circular sinter elements is situated in a contact area edge region. The sinter elements may also have notches. Also described is a related device.

公开(公告)号：US20180025967A1

公开(公告)日：2018-01-25

申请号：US15715725

申请日：2017-09-26

申请人： Tessera, Inc.

发明人： Belgacem Haba ,  Richard Dewitt Crisp ,  Wael Zohni

IPC分类号： H01L23/50 ,  H01L25/10 ,  H01L25/065 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L25/16 ,  H01L23/13 ,  H01L25/18

CPC分类号： H01L23/50 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/29101 ,  H01L2224/29191 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48472 ,  H01L2224/4911 ,  H01L2224/49112 ,  H01L2224/49175 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06575 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1047 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1435 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/1443 ,  H01L2924/14511 ,  H01L2924/15151 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15172 ,  H01L2924/15182 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012

摘要： A microelectronic assembly can include a substrate having first and second surfaces and an aperture extending therebetween, the substrate having terminals. The assembly can also include a first microelectronic element having a front surface facing the first surface of the substrate, a second microelectronic element having a front surface facing the first microelectronic element and projecting beyond an edge of the first microelectronic element, first and second leads electrically connecting contacts of the respective first and second microelectronic elements to the terminals, and third leads electrically interconnecting the contacts of the first and second microelectronic elements. The contacts of the first microelectronic element can be exposed at the front surface thereof adjacent the edge thereof. The contacts of the second microelectronic element can be disposed in a central region of the front surface thereof. The first, second, and third leads can have portions aligned with the aperture.

公开(公告)号：US09865648B2

公开(公告)日：2018-01-09

申请号：US14109604

申请日：2013-12-17

申请人： D-Wave Systems Inc.

发明人： Paul I. Bunyk

IPC分类号： H01L27/18 ,  H01L39/04 ,  H01L23/00 ,  H01L39/24 ,  G01R31/28

CPC分类号： H01L27/18 ,  G01R31/2884 ,  G01R31/2891 ,  H01L24/05 ,  H01L24/13 ,  H01L24/81 ,  H01L39/045 ,  H01L39/24 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05023 ,  H01L2224/05179 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/13007 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13163 ,  H01L2224/13176 ,  H01L2224/13183 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/13611 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2924/15787 ,  H01L2924/35121 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01076 ,  H01L2224/81 ,  H01L2924/00

摘要： Superconductive interconnection structures providing continuous, uninterrupted superconducting signal paths between a superconducting chip and a superconducting chip carrier are described. The superconductive interconnection structures employ superconducting solder bumps and pillars of Under Bump Metal (“UBM”). The superconductive interconnection structures are employed in a two-stage solder bumping process in which the superconducting chip is first bonded to a testing module for screening and then bonded to a chip packaging module for operation. Either the testing module or the chip packaging module, or both, may include a multi-chip module for carrying multiple superconducting chips simultaneously.

公开(公告)号：US09865566B1

公开(公告)日：2018-01-09

申请号：US15183131

申请日：2016-06-15

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Chi-Yang Yu ,  Kuan-Lin Ho ,  Chin-Liang Chen ,  Yu-Min Liang

IPC分类号： H01L23/48 ,  H01L25/065 ,  H01L23/498 ,  H01L23/367 ,  H01L23/31 ,  H01L25/00 ,  H01L21/48 ,  H01L21/54

CPC分类号： H01L25/0655 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/4882 ,  H01L21/54 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/3178 ,  H01L23/367 ,  H01L23/498 ,  H01L23/49811 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/15162 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00

摘要： A semiconductor structure includes a substrate, a redistribution layer (RDL) including a dielectric layer disposed over the substrate and a plurality of conductive members surrounded by the dielectric layer, a first conductive pillar disposed over and electrically connected with one of the plurality of conductive members, a second conductive pillar disposed over and electrically connected with one of the plurality of conductive member, a first die disposed over the RDL and electrically connected with the first conductive pillar, and a second die disposed over the RDL and electrically connected with the second conductive pillar, wherein a height of the second conductive pillar is substantially greater than a height of the first conductive pillar, and a thickness of the first die is substantially greater than a thickness of the second die.

公开(公告)号：US20180005973A1

公开(公告)日：2018-01-04

申请号：US15707591

申请日：2017-09-18

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Meng-Tse CHEN ,  Hsiu-Jen LIN ,  Chih-Wei LIN ,  Cheng-Ting CHEN ,  Ming-Da CHENG ,  Chung-Shi LIU

IPC分类号： H01L23/00 ,  H01L21/48 ,  H01L25/10 ,  H01L23/498 ,  H01L23/367

CPC分类号： H01L24/14 ,  H01L21/4853 ,  H01L23/3677 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/1134 ,  H01L2224/13076 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/14135 ,  H01L2224/14136 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/3512 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package structure comprises a substrate, a die bonded to the substrate, and one or more stud bump structures connecting the die to the substrate, wherein each of the stud bump structures having a stud bump and a solder ball encapsulating the stud bump to enhance thermal dissipation and reduce high stress concentrations in the semiconductor package structure.

公开(公告)号：US20170355040A1

公开(公告)日：2017-12-14

申请号：US15537646

申请日：2015-10-07

申请人： MITSUBISHI HEAVY INDUSTRIES MACHINE TOOL CO., LTD.

发明人： Jun UTSUMI ,  Takayuki GOTO ,  Takenori SUZUKI ,  Kensuke IDE

IPC分类号： B23K20/02 ,  H01L21/20 ,  B81C3/00 ,  B23K20/22 ,  H01L23/498 ,  B32B37/14

CPC分类号： B23K20/02 ,  B23K20/00 ,  B23K20/22 ,  B32B37/14 ,  B81C3/001 ,  H01L21/02 ,  H01L21/187 ,  H01L21/2007 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2224/05572 ,  H01L2224/80895 ,  H01L2924/0002 ,  H01L2924/15787

摘要： Provided is a semiconductor device formed by performing bonding at room temperature with respect to a wafer in which bonded electrodes and insulating layers and are respectively exposed to front surfaces, including a bonding interlayer which independently exhibits non-conductivity and exhibits conductivity by being bonded to the bonded electrodes, between the front surfaces.