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    ANALOG PROGRAMMABLE RESISTIVE MEMORY
    1.
    发明公开
    ANALOG PROGRAMMABLE RESISTIVE MEMORY 审中-公开

    公开(公告)号：US20240138275A1

    公开(公告)日：2024-04-25

    申请号：US18048594

    申请日：2022-10-20

    Applicant: CYBERSWARM, INC.

    Inventor： Viorel-Georgel Dumitru ,  Octavian-Narcis Ionescu

    IPC: H01L45/00 ,  G11C11/56 ,  G11C13/00

    CPC classification number: H01L45/147 ,  G11C11/5685 ,  G11C13/004 ,  G11C13/0069 ,  H01L45/1226 ,  H01L45/1253 ,  H01L45/1625 ,  G11C2213/15 ,  G11C2213/31

    Abstract: One or more embodiments disclosed herein describe a nonvolatile, analog programmable resistive memory with a plurality of memory states. The programmable resistive memory includes a substrate, an IGZO resistive layer and electrical contacts. The electrical contacts are deposited on the IGZO layer, in the same plane. The electrical contacts may have various shapes in order to obtain spatially variable distances between the electrical contacts. The resistance of the resistive memory can be brought from an initial low value to a plurality of various higher values by applying electrical voltage pulses with various durations and various amplitudes and/or by applying one or more DC voltage sweeps. Also, the high voltage limit during the DC voltage sweeps could be set at values ranging from few volts to few tens of volts. In this manner, the IGZO programmable resistive memory could be set in a plurality of memory states.

    Phase Change Switch Arrangement
    2.
    发明公开
    Phase Change Switch Arrangement 审中-公开

    公开(公告)号：US20240122081A1

    公开(公告)日：2024-04-11

    申请号：US17961795

    申请日：2022-10-07

    Applicant: Infineon Technologies AG

    Inventor： Valentyn Solomko ,  Semen Syroiezhin ,  Dominik Heiss ,  Christian Butschkow ,  Jochen Braumueller

    IPC: H01L45/00

    CPC classification number: H01L45/06 ,  H01L45/1286 ,  H01L45/1226

    Abstract: A phase change switching device includes a substrate comprising a main surface, an RF input pad and a plurality of RF output pads disposed over the main surface, and phase change switch connections between the RF input pad and each of the RF output pads, wherein the phase change switch connections each include a phase change material and a heating element thermally coupled to the phase change material, wherein each of the RF output pads are arranged outside of an outer perimeter of the RF input pad, and wherein plurality of RF output pads at least partially surrounds the outer perimeter of the RF input pad.

    Phase Change Switch Fabricated with Front End of the Line Process
    3.
    发明公开
    Phase Change Switch Fabricated with Front End of the Line Process 审中-公开

    公开(公告)号：US20230389451A1

    公开(公告)日：2023-11-30

    申请号：US17826355

    申请日：2022-05-27

    Applicant: Infineon Technologies AG

    Inventor： Dominik Heiss ,  Matthias Markert

    IPC: H01L45/00

    CPC classification number: H01L45/1226 ,  H01L45/06 ,  H01L45/1286 ,  H01L45/1683

    Abstract: A method includes providing a semiconductor substrate comprising a main surface, forming a dielectric region on the main surface, forming a recess in the dielectric region, forming a strip of phase change material within the recess, forming a heating element that is thermally coupled to the strip of phase change material, forming an interconnection region over the main surface before or after forming the recess, the interconnection region including a metallization layer and a dielectric layer, electrically connecting the strip of phase change material to a connecting one of the metallization layers from the interconnection region, and completing formation of the interconnection region after electrically connecting the strip of phase change material, wherein completing formation of the interconnection region includes forming an outer one of the dielectric layers from the interconnection region that is disposed over the connecting one of the metallization layers and comprises a planar upper surface.

    SELF-SELECTING MEMORY CELL WITH DIELECTRIC BARRIER
    5.
    发明申请
    SELF-SELECTING MEMORY CELL WITH DIELECTRIC BARRIER 审中-公开

    公开(公告)号：US20190067571A1

    公开(公告)日：2019-02-28

    申请号：US15687038

    申请日：2017-08-25

    Applicant: Micron Technology, Inc.

    Inventor： Lorenzo Fratin ,  Fabio Pellizzer

    IPC: H01L45/00 ,  H01L27/24

    CPC classification number: H01L45/1246 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/0069 ,  H01L27/249 ,  H01L45/04 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/1683

    Abstract: A self-selecting memory cell may be composed of a memory material that changes threshold voltages based on the polarity of the voltage applied across it. Such a memory cell may be formed at the intersection of a conductive pillar and electrode plane in a memory array. A dielectric material may be formed between the memory material of the memory cell and the corresponding electrode plane. The dielectric material may form a barrier that prevents harmful interactions between the memory material and the material that makes up the electrode plane. In some cases, the dielectric material may also be positioned between the memory material and the conductive pillar to form a second dielectric barrier. The second dielectric barrier may increase the symmetry of the memory array or prevent harmful interactions between the memory material and an electrode cylinder or between the memory material and the conductive pillar.

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