公开(公告)号：US20240032441A1

公开(公告)日：2024-01-25

申请号：US17892162

申请日：2022-08-22

Applicant: United Microelectronics Corp.

Inventor： Chih-Wei Kuo ,  Hung-Chan Lin ,  Chung Yi Chiu

IPC: H01L43/04 ,  H01L27/22 ,  H01L43/06 ,  H01L43/10 ,  H01L43/14

CPC classification number: H01L43/04 ,  H01L27/222 ,  H01L43/06 ,  H01L43/10 ,  H01L43/14

Abstract: Provided is a magnetoresistive random access memory (MRAM) device including a bottom electrode, a magnetic tunnel junction (MTJ) structure, a first spin orbit torque (SOT) layer, a cap layer, a second SOT layer, an etch stop layer, and an upper metal line layer. The MTJ structure is disposed on the bottom electrode. The first SOT layer is disposed on the MTJ structure. The cap layer is disposed on the first SOT layer. The second SOT layer is disposed on the cap layer. The etch stop layer is disposed on the second SOT layer. The upper metal line layer penetrates though the etch stop layer and is landed on the second SOT layer.

公开(公告)号：US20230337551A1

公开(公告)日：2023-10-19

申请号：US17743459

申请日：2022-05-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jia-Rong Wu ,  Chi-Hsuan Cheng ,  Rai-Min Huang ,  Po-Kai Hsu

IPC: H01L43/14 ,  H01L27/22 ,  H01L43/04 ,  H01L43/06

CPC classification number: H01L43/14 ,  H01L27/222 ,  H01L43/04 ,  H01L43/06

Abstract: A method for fabricating semiconductor device includes the steps of first forming a magnetic tunneling junction (MTJ) on a substrate, forming a first spin orbit torque (SOT) layer on the MTJ, forming an inter-metal dielectric (IMD) layer around the first SOT layer, forming a second SOT layer on the IMD layer, forming a first hard mask on the second SOT layer, patterning the first hard mask along a first direction, and then patterning the first hard mask along a second direction.

公开(公告)号：US20230320230A1

公开(公告)日：2023-10-05

申请号：US17709074

申请日：2022-03-30

Applicant: Intel Corporation

Inventor： Punyashloka Debashis ,  Hai Li ,  Chia-Ching Lin ,  Dmitri Evgenievich Nikonov ,  Ian Alexander Young

IPC: H01L43/10 ,  H01L43/04 ,  H01L43/06 ,  H01L43/14 ,  H01L27/22

CPC classification number: H01L43/10 ,  H01L43/04 ,  H01L43/065 ,  H01L43/14 ,  H01L27/228 ,  H03K19/18

Abstract: In one embodiment, an integrated circuit die includes: a first layer comprising a magnetoelectric material; a second layer comprising a monolayer transition metal dichalcogenide (TMD); a magnet between the first layer and the second layer, wherein the magnet has perpendicular magnetic anisotropy; a first conductive trace coupled to the first layer; and a second conductive trace coupled to the magnet.

公开(公告)号：US20230189659A1

公开(公告)日：2023-06-15

申请号：US17550663

申请日：2021-12-14

Applicant: Intel Corporation

Inventor： Punyashloka Debashis ,  Tanay A. Gosavi ,  Hai Li ,  Chia-Ching Lin ,  Dmitri Evgenievich Nikonov ,  Kaan Oguz ,  Ashish Verma Penumatcha ,  Marko Radosavljevic ,  Ian Alexander Young

IPC: H01L43/02 ,  H01L43/04 ,  H01L43/10 ,  H01L43/12 ,  H01L43/14

CPC classification number: H01L43/02 ,  H01L43/04 ,  H01L43/10 ,  H01L43/12 ,  H01L43/14 ,  G06F7/58

Abstract: A probabilistic bit (p-bit) comprises a magnetic tunnel junction (MTJ) comprising a free layer whose magnetization orientation randomly fluctuates in the presence of thermal noise. The p-bit MTJ comprises a reference layer, a free layer, and an insulating layer between the reference and free layers. The reference layer and the free layer comprise synthetic antiferromagnets. The use of a synthetic antiferromagnet for the reference layer reduces the amount of stray magnetic field that can impact the magnetization of the free layer and the use of a synthetic antiferromagnet for the free layer reduces stray magnetic field bias on p-bit random number generation. Tuning the thickness of the nonmagnetic layer of synthetic antiferromagnet free layer can result in faster random number generation time relative to a comparable MTJ with a free layer comprising a single-layer ferromagnet.

公开(公告)号：US20190189909A1

公开(公告)日：2019-06-20

申请号：US16271112

申请日：2019-02-08

Applicant: TDK CORPORATION

Inventor： Tomoyuki SASAKI ,  Yohei SHIOKAWA ,  Atsushi TSUMITA

IPC: H01L43/04 ,  H01L43/14 ,  H01L43/10 ,  H01L43/08 ,  G11C11/16 ,  G11C11/18

CPC classification number: H01L43/04 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/18 ,  H01L27/228 ,  H01L43/08 ,  H01L43/10 ,  H01L43/14

Abstract: A magnetic memory including a plurality of magnetoresistance effect elements that hold information, each including a first ferromagnetic metal layer with a fixed magnetization direction, a second ferromagnetic metal layer with a varying magnetization direction, and a non-magnetic layer sandwiched between the first and second ferromagnetic metal layers; a plurality of first control elements that control reading of the information, wherein each of the plurality of first ferromagnetic metal layers is connected to a first control element; a plurality of spin-orbit torque wiring lines that extend in a second direction intersecting with a first direction which is a stacking direction of the magnetoresistance effect elements, wherein each of the second ferromagnetic metal layers is joined to one spin-orbit torque wiring line; a plurality of second control elements that control electric current flowing through the spin-orbit torque wiring lines.

公开(公告)号：US10326073B1

公开(公告)日：2019-06-18

申请号：US15858808

申请日：2017-12-29

Applicant: Spin Memory, Inc.

Inventor： Michail Tzoufras ,  Marcin Gajek ,  Kadriye Deniz Bozdag ,  Eric Michael Ryan

IPC: G11C11/16 ,  H01L43/02 ,  H01L43/12 ,  H01L27/22 ,  H01L43/06 ,  H01L43/14

CPC classification number: H01L43/02 ,  G11C11/161 ,  H01L27/222 ,  H01L43/06 ,  H01L43/12 ,  H01L43/14

Abstract: The various implementations described herein include methods, devices, and systems for operating magnetic memory devices. In one aspect, a magnetic memory device includes: (1) a core; (2) a plurality of layers that surround the core in succession; (3) a first input terminal coupled to the core and configured to receive a first current, where: (a) the first current flows radially from the core through the plurality of layers; and (b) the radial flow of the first current imparts a torque on, at least, a magnetization of an inner layer of the plurality of layers; and (4) a second input terminal coupled to the core and configured to receive a second current, where: (i) the second current imparts a Spin Hall Effect (SHE) around a perimeter of the core; and (ii) the SHE contributes to the torque imparted on the magnetization of the inner layer by the first current.

公开(公告)号：US20190139568A1

公开(公告)日：2019-05-09

申请号：US16221901

申请日：2018-12-17

Applicant: BROWN UNIVERSITY

Inventor： Gang Xiao ,  Qiang Hao

IPC: G11B5/37 ,  H01L43/14 ,  H01L43/12 ,  H01F10/30 ,  H01F10/32 ,  H03K19/18 ,  H01L43/10

CPC classification number: G11B5/37 ,  H01F10/30 ,  H01F10/329 ,  H01L43/10 ,  H01L43/12 ,  H01L43/14 ,  H03K19/18

Abstract: Methods, devices, and compositions for use with spintronic devices such as magnetic random access memory (MRAM) and spin-logic devices are provided. Methods include manipulating magnetization states in spintronic devices and making a structure using spin transfer torque to induce magnetization reversal. A device described herein manipulates magnetization states in spintronic devices and includes a non-magnetic metal to generate spin current based on the giant spin Hall effect, a ferromagnetic thin film with perpendicular magnetic anisotropy, an oxide thin film, and an integrated magnetic sensor. The device does not require an insertion layer between a non-magnetic metal with giant spin Hall effect and a ferromagnetic thin film to achieve perpendicular magnetic anisotropy.

公开(公告)号：US20190049529A1

公开(公告)日：2019-02-14

申请号：US15676148

申请日：2017-08-14

Applicant: Allegro MicroSystems, LLC

Inventor： Juan Manuel Cesaretti ,  Andreas P. Friedrich ,  Gerardo A. Monreal ,  Alejandro Gabriel Milesi

IPC: G01R33/07 ,  G01R33/00 ,  H01L43/14

CPC classification number: G01R33/077 ,  G01R33/0029 ,  G01R33/0082 ,  G01R33/075 ,  H01L27/22 ,  H01L43/14

Abstract: Hall effect elements are driven by current generators that use vertical epi resistors disposed away from an edge of a substrate upon which, within which, or over which, the Hall effect elements, the current generators, and the vertical epi resistors are disposed.

公开(公告)号：US20190036011A1

公开(公告)日：2019-01-31

申请号：US15661826

申请日：2017-07-27

Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.

Inventor： Bin LIU ,  Eng Huat TOH ,  Ruchil Kumar JAIN

IPC: H01L43/04 ,  H01L43/06 ,  H01L43/14 ,  G01R33/07 ,  G01R33/02 ,  G01R33/00

CPC classification number: H01L43/04 ,  G01R33/0052 ,  G01R33/0206 ,  G01R33/077 ,  H01L27/22 ,  H01L43/065 ,  H01L43/14

Abstract: A method of forming a 3D Hall effect sensor and the resulting device are provided. Embodiments include forming a p-type well in a substrate; forming a first n-type well in a first region surrounded by the p-type well in top view; forming a second n-type well in a second region surrounding the p-type well; providing n-type dopant in the first and second n-type wells; and providing p-type dopant in the p-type well and the first n-type well.

公开(公告)号：US20190006581A1

公开(公告)日：2019-01-03

申请号：US16019831

申请日：2018-06-27

Applicant: Wisconsin Alumni Research Foundation

Inventor： Chang-Beom Eom ,  Tianxiang Nan ,  Trevor Jeffrey Anderson

IPC: H01L43/04 ,  H01L43/10 ,  H01L43/14 ,  G11C11/16 ,  G11C11/18

CPC classification number: H01L43/04 ,  G11C11/161 ,  G11C11/165 ,  G11C11/18 ,  H01L43/08 ,  H01L43/10 ,  H01L43/14

Abstract: Magnetic switching devices, including magnetic memory devices, are provided. The devices use high-quality crystalline films of 4d or 5d transition metal perovskite having a strong spin-orbit coupling (SOC) to produce spin-orbit torque in adjacent ferromagnetic materials via a strong spin-Hall effect.