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公开(公告)号:US20240332243A1
公开(公告)日:2024-10-03
申请号:US18740456
申请日:2024-06-11
发明人: Mahmud Halim CHOWDHURY , Amin SIJELMASSI , Murali KITTAPPA , Anindya PODDAR , Honglin GUO , Joe Adam GARCIA , John Paul TELLKAMP
IPC分类号: H01L23/00 , H01H85/02 , H01L23/495 , H01L23/498
CPC分类号: H01L24/48 , H01H85/0241 , H01L24/49 , H01L24/85 , H01H2085/0283 , H01L23/49555 , H01L23/49827 , H01L24/73 , H01L2224/4801 , H01L2224/48175 , H01L2224/48227 , H01L2224/48455 , H01L2224/4846 , H01L2224/48479 , H01L2224/48499 , H01L2224/49111 , H01L2224/494 , H01L2224/73265 , H01L2224/85051 , H01L2224/85186 , H01L2224/8534 , H01L2924/01013 , H01L2924/01079 , H01L2924/2064 , H01L2924/2075
摘要: In examples, a package comprises a semiconductor die having a device side and a bond pad on the device side, a conductive terminal exposed to an exterior of the package, and an electrical fuse. The electrical fuse comprises a conductive ball coupled to the bond pad, and a bond wire coupled to the conductive terminal. The bond wire is stitch-bonded to the conductive ball.
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公开(公告)号:US20160104688A1
公开(公告)日:2016-04-14
申请号:US14861186
申请日:2015-09-22
发明人: Eung San Cho
IPC分类号: H01L23/00 , H01L29/66 , H01L21/52 , H01L21/56 , H01L29/778 , H01L29/205 , H01L23/495 , H01L23/31 , H01L21/48 , H01L29/20 , H01L29/16 , H01L29/78 , H01L27/06
CPC分类号: H01L24/49 , H01L21/4825 , H01L21/4828 , H01L21/52 , H01L21/563 , H01L23/3114 , H01L23/49503 , H01L23/4952 , H01L23/49524 , H01L23/49541 , H01L23/49562 , H01L23/49575 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/40 , H01L24/43 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L27/0617 , H01L27/0623 , H01L29/16 , H01L29/2003 , H01L29/205 , H01L29/66431 , H01L29/66712 , H01L29/7787 , H01L29/781 , H01L2224/16245 , H01L2224/32245 , H01L2224/40095 , H01L2224/40245 , H01L2224/45014 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48105 , H01L2224/48248 , H01L2224/48257 , H01L2224/49109 , H01L2224/73221 , H01L2224/73255 , H01L2224/73265 , H01L2224/83444 , H01L2224/8534 , H01L2224/85385 , H01L2224/85439 , H01L2224/92247 , H01L2924/00014 , H01L2924/0781 , H01L2924/10253 , H01L2924/1027 , H01L2924/1032 , H01L2924/1033 , H01L2924/13091 , H01L2924/14 , H01L2924/1425 , H01L2924/1426 , H01L2924/1511 , H01L2924/15151 , H01L2924/152 , H01L2924/15724 , H01L2924/15747 , H01L2924/1711 , H01L2924/1715 , H01L2924/172 , H01L2924/181 , H01L2924/182 , H01L2924/18301 , H02M1/08 , H02M3/1588 , Y02B70/1466 , H01L2924/00012 , H01L2924/207 , H01L2224/48247 , H01L2224/37099 , H01L2224/84 , H01L2924/206
摘要: In one implementation, a semiconductor package includes a patterned conductive carrier including a support segment having a partially etched recess. The semiconductor package also includes an integrated circuit (IC) situated on the support segment, and an electrical connector coupling the IC to the partially etched recess. In addition, the semiconductor package includes a packaging dielectric formed over the patterned conductive carrier and the IC. The packaging dielectric interfaces with and mechanically engages the partially etched recess so as to prevent delamination of the electrical connector.
摘要翻译: 在一个实施方案中,半导体封装包括图案化的导电载体,其包括具有部分蚀刻的凹部的支撑段。 半导体封装还包括位于支撑段上的集成电路(IC)和将IC耦合到部分蚀刻凹槽的电连接器。 此外,半导体封装包括形成在图案化导电载体和IC上的封装电介质。 封装电介质与部分蚀刻的凹部接合并机械接合,以防止电连接器的分层。
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公开(公告)号:US12009336B2
公开(公告)日:2024-06-11
申请号:US17390823
申请日:2021-07-30
发明人: Mahmud Halim Chowdhury , Amin Sijelmassi , Murali Kittappa , Anindya Poddar , Honglin Guo , Joe Adam Garcia , John Paul Tellkamp
IPC分类号: H01L23/00 , H01H85/02 , H01L23/495 , H01L23/498
CPC分类号: H01L24/48 , H01H85/0241 , H01L24/49 , H01L24/85 , H01H2085/0283 , H01L23/49555 , H01L23/49827 , H01L24/73 , H01L2224/4801 , H01L2224/48175 , H01L2224/48227 , H01L2224/48455 , H01L2224/4846 , H01L2224/48479 , H01L2224/48499 , H01L2224/49111 , H01L2224/494 , H01L2224/73265 , H01L2224/85051 , H01L2224/85186 , H01L2224/8534 , H01L2924/01013 , H01L2924/01079 , H01L2924/2064 , H01L2924/2075
摘要: In examples, a package comprises a semiconductor die having a device side and a bond pad on the device side, a conductive terminal exposed to an exterior of the package, and an electrical fuse. The electrical fuse comprises a conductive ball coupled to the bond pad, and a bond wire coupled to the conductive terminal. The bond wire is stitch-bonded to the conductive ball.
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公开(公告)号:US20170352639A1
公开(公告)日:2017-12-07
申请号:US15171881
申请日:2016-06-02
CPC分类号: H01L24/48 , B81B7/0025 , B81B7/007 , B81B2201/0257 , B81B2207/012 , B81B2207/07 , B81C1/00301 , H01L21/78 , H01L24/03 , H01L24/05 , H01L24/09 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/45 , H01L24/81 , H01L24/85 , H01L2224/02166 , H01L2224/0382 , H01L2224/03831 , H01L2224/0401 , H01L2224/04042 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/1134 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/16245 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48227 , H01L2224/48247 , H01L2224/4845 , H01L2224/48463 , H01L2224/48465 , H01L2224/4847 , H01L2224/48624 , H01L2224/48639 , H01L2224/48647 , H01L2224/48739 , H01L2224/48744 , H01L2224/48747 , H01L2224/48824 , H01L2224/48839 , H01L2224/48844 , H01L2224/81205 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/81805 , H01L2224/85012 , H01L2224/851 , H01L2224/85205 , H01L2224/8534 , H01L2224/85375 , H01L2224/85424 , H01L2224/85439 , H01L2224/85444 , H01L2224/85447 , H01L2224/85801 , H01L2924/06 , H01L2924/0715 , H01L2924/1433 , H01L2924/14335 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要: Methods, systems, and apparatuses for preventing corrosion between dissimilar bonded metals. The method includes providing a wafer having a plurality of circuits, each of the plurality of circuits having a plurality of bond pads including a first metal; applying a coating onto at least the plurality of bond pads; etching a hole in the coating on each of the plurality of bond pads to provide an exposed portion of the plurality of bond pads; dicing the wafer to separate each of the plurality of circuits; die bonding each of the plurality of circuits to a respective packaging substrate; and performing a bonding process to bond a second, dissimilar metal to the exposed portion of each of the plurality of bond pads such that the second, dissimilar metal encloses the hole in the coating of each of the plurality of bond pads, thereby enclosing the exposed portion.
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