公开(公告)号：US09780051B2

公开(公告)日：2017-10-03

申请号：US14133551

申请日：2013-12-18

Applicant: Tu-Anh N. Tran ,  Kurt H. Junker

Inventor： Tu-Anh N. Tran ,  Kurt H. Junker

IPC: H01L21/44 ,  H01L23/00 ,  H01L21/66 ,  H01L23/31

CPC classification number: H01L24/03 ,  H01L22/32 ,  H01L23/3157 ,  H01L24/05 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/03622 ,  H01L2224/03831 ,  H01L2224/0391 ,  H01L2224/0392 ,  H01L2224/04042 ,  H01L2224/05017 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/43 ,  H01L2224/45147 ,  H01L2224/48453 ,  H01L2224/48458 ,  H01L2224/48463 ,  H01L2224/48507 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/85181 ,  H01L2224/85365 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method for forming a semiconductor structure includes forming a bond pad over a last metal layer of the semiconductor structure wherein the bond pad includes a wire bond region; and recessing the wire bond region such that the wire bond region has a first thickness and a region of the bond pad outside the wire bond region has a second thickness that is greater than the first thickness.

公开(公告)号：US20130320499A1

公开(公告)日：2013-12-05

申请号：US13991956

申请日：2011-12-01

Applicant: Taichi Karino

Inventor： Taichi Karino

IPC: H01L29/73

CPC classification number: H01L29/7302 ,  H01L24/05 ,  H01L27/0259 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/48458 ,  H01L2224/4847 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00

Abstract: By configuring an ESD protection element of an NPN transistor (101), it is possible to reduce the area of the ESD protection element and reduce the voltage in a region in which the current increases sharply, and thus possible to increase ESD tolerance. Also, it is possible to provide a highly reliable semiconductor device wherein it is possible to flatten and smooth the surface of an upper layer pad electrode (16) by dividing a pad electrode (8) into a two-layer structure sandwiching an interlayer insulating film (15), and possible to increase the junction strength of a bonding wire, and suppress damage to underlying silicon layers when bonding.

Abstract translation: 通过配置NPN晶体管（101）的ESD保护元件，可以减小ESD保护元件的面积并降低电流急剧增加的区域中的电压，从而可以增加ESD容限。 此外，可以提供一种高可靠性的半导体器件，其中可以通过将焊盘电极（8）分成夹层层间绝缘膜的双层结构来使上层焊盘电极（16）的表面平坦化和平滑化 （15），并且可以增加接合线的接合强度，并且在接合时抑制对下层硅层的损伤。

公开(公告)号：US20120061835A1

公开(公告)日：2012-03-15

申请号：US12881257

申请日：2010-09-14

Applicant: Khalil Hosseini ,  Frank Kahlmann ,  Josef Hoeglauer ,  Ralf Otremba ,  Georg Meyer-Berg

Inventor： Khalil Hosseini ,  Frank Kahlmann ,  Josef Hoeglauer ,  Ralf Otremba ,  Georg Meyer-Berg

IPC: H01L23/49 ,  H01L21/60

CPC classification number: H01L24/48 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05647 ,  H01L2224/45147 ,  H01L2224/48453 ,  H01L2224/48458 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/48847 ,  H01L2224/85 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A die structure includes a die and a metallization layer disposed over the front side of the die. The metallization layer includes copper. At least a part of the metallization layer has a rough surface profile. The part with the rough surface profile includes a wire bonding region, to which a wire bonding structure is to be bonded.

Abstract translation: 模具结构包括模具和设置在模具的前侧上的金属化层。 金属化层包括铜。 金属化层的至少一部分具有粗糙的表面轮廓。 具有粗糙表面轮廓的部分包括引线接合区域，引线接合结构将被接合到该引线接合区域。

公开(公告)号：US20110018135A1

公开(公告)日：2011-01-27

申请号：US12843515

申请日：2010-07-26

Applicant: Romain Coffy ,  Fabien Quercia

Inventor： Romain Coffy ,  Fabien Quercia

IPC: H01L23/498 ,  B23K1/20

CPC classification number: H01L24/85 ,  H01L24/02 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/4845 ,  H01L2224/48458 ,  H01L2224/48463 ,  H01L2224/48475 ,  H01L2224/48482 ,  H01L2224/48499 ,  H01L2224/48724 ,  H01L2224/48799 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/78301 ,  H01L2224/85045 ,  H01L2224/85051 ,  H01L2224/85205 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01058 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/20752 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2924/00015

Abstract: A wire is electrically connected to an electrical bonding pad of an integrated circuit chip and electronic device through an intermediate electrical interconnect block that is interposed between the electrical bonding pad and one end of the electrical lead wire.

Abstract translation: 导线通过中间电互连块电连接到集成电路芯片和电子器件的电接合焊盘，所述中间电互连块插入在电接合焊盘和电引线的一端之间。

公开(公告)号：US07495339B2

公开(公告)日：2009-02-24

申请号：US11544633

申请日：2006-10-10

Applicant: Masanori Minamio ,  Hiroaki Fujimoto ,  Atsuhito Mizutani ,  Hisaki Fujitani ,  Toshiyuki Fukuda

Inventor： Masanori Minamio ,  Hiroaki Fujimoto ,  Atsuhito Mizutani ,  Hisaki Fujitani ,  Toshiyuki Fukuda

IPC: H01L23/52

CPC classification number: H01L24/10 ,  B23K20/004 ,  B23K20/10 ,  B23K35/002 ,  B23K35/0227 ,  B23K35/286 ,  B23K35/3601 ,  B23K2101/32 ,  B23K2101/40 ,  B23K2103/10 ,  B23K2103/18 ,  B23K2103/50 ,  B23K2103/56 ,  H01L21/563 ,  H01L24/05 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/81 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13124 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48458 ,  H01L2224/4847 ,  H01L2224/48472 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/85205 ,  H01L2224/8582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/013 ,  H01L2924/0002

Abstract: There is provided a connection structure between a Si electrode (Si member) and an Al wire (Al member). Between the Si electrode and the Al wire, a first part and second parts are present in interposed relation. Each of the first and second parts is in contact with the Si electrode and with the Al wire. In the first part, a Si oxide layer and an Al oxide layer are present. The Si oxide layer is in contact with the Si electrode. The Al oxide layer is interposed between the Si oxide layer and the Al wire. In some of the second parts, Al is present. In the others of the second parts, a Si portion and an Al portion are present.

Abstract translation: 提供了Si电极（Si构件）和Al线（Al构件）之间的连接结构。 在Si电极和Al线之间，第一部分和第二部分呈中间关系。 第一和第二部分中的每一个与Si电极和Al线接触。 在第一部分中存在Si氧化物层和Al氧化物层。 Si氧化物层与Si电极接触。 Al氧化物层介于Si氧化物层和Al线之间。 在一些第二部分中，Al存在。 在第二部分的其它部分中，存在Si部分和Al部分。

公开(公告)号：US20080193719A1

公开(公告)日：2008-08-14

申请号：US12103284

申请日：2008-04-15

Applicant: Mark Arnold Delsman ,  Christoph Benno Luechinger

Inventor： Mark Arnold Delsman ,  Christoph Benno Luechinger

IPC: B32B3/26

CPC classification number: B23K20/106 ,  B23K20/004 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4807 ,  H01L2224/48458 ,  H01L2224/48472 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/78313 ,  H01L2224/78315 ,  H01L2224/85205 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  Y10T428/24488 ,  Y10T428/24612 ,  Y10T428/24942 ,  Y10T428/2495 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/2075 ,  H01L2924/01006 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: An ultrasonic bond is formed using a bond tool foot having a waffle shape of thin protrusions and gaps between the protrusions. The tool is brought in contact with the ribbon to a depth to create depressions in a ribbon approximately 150 μm or less from the underlying bonding surface. The tool is then brought down further into the ribbon to contact the portions of the ribbon between the depressions, such as an additional 25 to 50 μm. The result is lightly bonded regions underneath the groove portions and highly bonded regions underneath the protrusions and around the perimeter of the bond. In another embodiment, an ultrasonic bond is formed along a partial width of a ribbon.

Abstract translation: 使用具有薄突起的华夫饼形状和突起之间的间隙的接合工具脚形成超声波接合。 使该工具与带状物接触深度，从而在下面的粘结表面形成约150μm或更小的带状凹陷。 然后将工具进一步下降到带状物中以接触凹陷之间的带状部分，例如额外的25至50um。 结果是在凹槽部分之下的轻度粘合区域和在突起的下方和键周围的高度粘合区域。 在另一个实施例中，沿带的部分宽度形成超声波接合。

公开(公告)号：US20080122091A1

公开(公告)日：2008-05-29

申请号：US11602024

申请日：2006-11-20

Applicant: Thomas Gutt ,  Drik Siepe ,  Thomas Laska ,  Michael Melzl ,  Matthias Stecher ,  Roman Roth

Inventor： Thomas Gutt ,  Drik Siepe ,  Thomas Laska ,  Michael Melzl ,  Matthias Stecher ,  Roman Roth

IPC: H01L29/45 ,  H01L21/71 ,  H01L29/41

CPC classification number: H01L24/85 ,  H01L24/03 ,  H01L24/05 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05093 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4807 ,  H01L2224/48458 ,  H01L2224/4847 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48724 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48757 ,  H01L2224/48764 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48857 ,  H01L2224/48864 ,  H01L2224/838 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/10253 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/20752 ,  H01L2924/2076 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/04953 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/48824 ,  H01L2224/48657 ,  H01L2924/00015

Abstract: A semiconductor device exhibits a first metal layer, made of a first metal, with at least one contiguous subsection. At least one second metal layer, made of a second metal, is placed on the contiguous subsection of the first metal layer. The second metal is harder than the first metal. The second metal layer is structured to form at least two layer regions, which are disposed on the contiguous subsection of the first metal layer. The second metal exhibits a boron-containing or phosphorus-containing metal or a boron-containing or phosphorus-containing metal alloy.

Abstract translation: 半导体器件具有由第一金属制成的具有至少一个连续部分的第一金属层。 由第二金属制成的至少一个第二金属层被放置在第一金属层的相邻子部分上。 第二种金属比第一种金属更硬。 第二金属层被构造成形成至少两个层区，它们设置在第一金属层的相邻子部分上。 第二金属表现出含硼或含磷金属或含硼或含磷金属合金。

公开(公告)号：US20070187834A1

公开(公告)日：2007-08-16

申请号：US11544633

申请日：2006-10-10

Applicant: Masanori Minamio ,  Hiroaki Fujimoto ,  Atsuhito Mizutani ,  Hisaki Fujitani ,  Toshiyuki Fukuda

Inventor： Masanori Minamio ,  Hiroaki Fujimoto ,  Atsuhito Mizutani ,  Hisaki Fujitani ,  Toshiyuki Fukuda

IPC: H01L23/48 ,  H01L23/52

CPC classification number: H01L24/10 ,  B23K20/004 ,  B23K20/10 ,  B23K35/002 ,  B23K35/0227 ,  B23K35/286 ,  B23K35/3601 ,  B23K2101/32 ,  B23K2101/40 ,  B23K2103/10 ,  B23K2103/18 ,  B23K2103/50 ,  B23K2103/56 ,  H01L21/563 ,  H01L24/05 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/81 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13124 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48458 ,  H01L2224/4847 ,  H01L2224/48472 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/85205 ,  H01L2224/8582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/013 ,  H01L2924/0002

Abstract: There is provided a connection structure between a Si electrode (Si member) and an Al wire (Al member). Between the Si electrode and the Al wire, a first part and second parts are present in interposed relation. Each of the first and second parts is in contact with the Si electrode and with the Al wire. In the first part, a Si oxide layer and an Al oxide layer are present. The Si oxide layer is in contact with the Si electrode. The Al oxide layer is interposed between the Si oxide layer and the Al wire. In some of the second parts, Al is present. In the others of the second parts, a Si portion and an Al portion are present.

Abstract translation: 提供了Si电极（Si构件）和Al线（Al构件）之间的连接结构。 在Si电极和Al线之间，第一部分和第二部分呈中间关系。 第一和第二部分中的每一个与Si电极和Al线接触。 在第一部分中存在Si氧化物层和Al氧化物层。 Si氧化物层与Si电极接触。 Al氧化物层介于Si氧化物层和Al线之间。 在一些第二部分中，Al存在。 在第二部分的其它部分中，存在Si部分和Al部分。

公开(公告)号：US5891745A

公开(公告)日：1999-04-06

申请号：US946403

申请日：1997-10-07

Applicant: Thomas J. Dunaway ,  Richard K. Spielberger

Inventor： Thomas J. Dunaway ,  Richard K. Spielberger

IPC: H01L21/66 ,  H01L23/485 ,  H01L23/58 ,  H01L21/603

CPC classification number: H01L24/05 ,  H01L22/20 ,  H01L22/32 ,  H01L24/06 ,  H01L24/48 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/4807 ,  H01L2224/48458 ,  H01L2224/4847 ,  H01L2224/78313 ,  H01L2224/78314 ,  H01L2224/78318 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/859 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01082 ,  H01L2924/05042 ,  H01L2924/14

Abstract: A process of providing a bond pad arrangement for use with a thermocompression wire bonder including a primary bond pad for connection of an integrated circuit during a production assembly process, and a secondary test bond pad contiguous with the primary bond pad for connection of a wire to the integrated circuit. Including performing a test sequence, and removing the wire from the secondary test bond pad.

Abstract translation: 一种提供与热压接线机一起使用的接合焊盘布置的过程，该热压接线焊接机包括用于在生产组装过程期间连接集成电路的主接合焊盘以及与主焊盘邻接的辅助测试焊盘，用于将导线连接到 集成电路。 包括执行测试序列，并从次级测试键盘上移除线。

公开(公告)号：US20240038698A1

公开(公告)日：2024-02-01

申请号：US18206579

申请日：2023-06-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Erh-Ju LIN

IPC: H01L23/00 ,  H01L23/498

CPC classification number: H01L24/05 ,  H01L24/48 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/49894 ,  H01L2224/48229 ,  H01L2224/48465 ,  H01L2224/48458 ,  H01L2224/48453 ,  H01L2924/3651 ,  H01L2224/05647 ,  H01L2224/05547 ,  H01L2224/05557

Abstract: A package structure is provided. The package structure includes a substrate, a conductive pad, and a conductive wire. The conductive pad is disposed over the substrate. The conductive wire includes an end portion connected to the conductive pad, wherein a grain arrangement of the end portion is distinct from a grain arrangement of the conductive pad.