知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

11 records (took 0.022 seconds)

    Semiconductor devices
    1.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US10410722B2

    公开(公告)日：2019-09-10

    申请号：US15987207

    申请日：2018-05-23

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sungwoo Kim ,  Bong-Soo Kim ,  Youngbae Kim ,  Kijae Hur ,  Gwanhyeob Koh ,  Hyeongsun Hong ,  Yoosang Hwang

    IPC: H01L27/00 ,  G11C14/00 ,  H01L27/24 ,  H01L23/528 ,  H01L45/00 ,  G11C13/00 ,  G11C11/00 ,  G11C5/02 ,  H01L27/108

    Abstract: A semiconductor device includes: a first memory section, a first peripheral circuit section, and a second peripheral circuit section that are disposed on a substrate; and a second memory section and a wiring section that are stacked on the second peripheral circuit section, wherein the first memory section includes a plurality of first memory cells, each of the first memory cells including a cell transistor and a capacitor connected to the cell transistor, the second memory section includes a plurality of second memory cells, each of the second memory cells including a variable resistance element and a select element coupled in series to each other, and the wiring section includes a plurality of line patterns, wherein the line patterns and the second memory cells are higher than the capacitor with respect to the substrate.

    Semiconductor devices
    2.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US10580469B2

    公开(公告)日：2020-03-03

    申请号：US16460284

    申请日：2019-07-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sungwoo Kim ,  Bong-Soo Kim ,  Youngbae Kim ,  Kijae Hur ,  Gwanhyeob Koh ,  Hyeongsun Hong ,  Yoosang Hwang

    IPC: H01L27/00 ,  G11C11/00 ,  G11C5/02 ,  G11C14/00 ,  H01L27/108 ,  H01L45/00 ,  H01L27/24 ,  H01L49/02 ,  H01L23/528

    Abstract: A semiconductor device including: a first memory section, a first peripheral circuit section, and a second peripheral circuit section that are disposed next to each other on a substrate; and a second memory section laterally spaced apart from the first memory section, the second peripheral circuit section and the second memory section disposed next to each other on the substrate, wherein the first memory section includes a plurality of first memory cells, each of the first memory cells including a cell transistor and a capacitor connected to the cell transistor, and the second memory section includes a plurality of second memory cells, each of the second memory cells including a variable resistance element and a select element coupled in series to each other, wherein the second memory cells are higher from the substrate than each of the capacitors.

    Magnetic memory device
    6.
    发明授权
    Magnetic memory device 有权

    公开(公告)号：US11183628B2

    公开(公告)日：2021-11-23

    申请号：US16829216

    申请日：2020-03-25

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seowon Lee ,  Junghwan Moon ,  Junghoon Bak ,  Woojin Kim ,  Hyeongsun Hong

    IPC: G11C11/00 ,  H01L43/02 ,  G11C11/16 ,  H01F10/32 ,  H01L43/10 ,  H01L27/22

    Abstract: A magnetic memory device includes a device isolation layer on a substrate and defining an active region, a source region and a drain region apart from each other in the active region of the substrate, a channel portion in the active region of the substrate and between the source region and the drain region, a spin orbit torque (SOT)-inducing layer on the channel portion of the substrate, a magnetic tunnel junction (MTJ) structure on the SOT-inducing layer, the MTJ structure including a free layer on the SOT-inducing layer, a tunnel barrier layer on the free layer, and a pinned layer on the tunnel barrier, a word line on the MTJ structure, a source line electrically connected to the source region, and a bit line electrically connected to the drain region.

    Semiconductor devices
    7.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US10720211B2

    公开(公告)日：2020-07-21

    申请号：US16458594

    申请日：2019-07-01

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sungwoo Kim ,  Bong-Soo Kim ,  Youngbae Kim ,  Kijae Hur ,  Gwanhyeob Koh ,  Hyeongsun Hong ,  Yoosang Hwang

    IPC: H01L27/00 ,  G11C14/00 ,  H01L27/24 ,  H01L23/528 ,  G11C13/00 ,  G11C5/02 ,  G11C11/00 ,  H01L45/00 ,  H01L27/108

    Abstract: A semiconductor device includes: a first memory section, a first peripheral circuit section, and a second peripheral circuit section that are disposed on a substrate; and a second memory section and a wiring section that are stacked on the second peripheral circuit section, wherein the first memory section includes a plurality of first memory cells, each of the first memory cells including a cell transistor and a capacitor connected to the cell transistor, the second memory section includes a plurality of second memory cells, each of the second memory cells including a variable resistance element and a select element coupled in series to each other, and the wiring section includes a plurality of line patterns, wherein the line patterns and the second memory cells are higher than the capacitor with respect to the substrate.

    Semiconductor memory devices
    9.
    发明授权
    Semiconductor memory devices 有权

    公开(公告)号：US11355509B2

    公开(公告)日：2022-06-07

    申请号：US17000857

    申请日：2020-08-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kiseok Lee ,  Junsoo Kim ,  Hui-Jung Kim ,  Bong-Soo Kim ,  Satoru Yamada ,  Kyupil Lee ,  Sunghee Han ,  Hyeongsun Hong ,  Yoosang Hwang

    IPC: H01L27/11556 ,  H01L23/532 ,  G11C7/18 ,  H01L49/02 ,  G11C8/14 ,  H01L27/11524 ,  G11C11/404 ,  G11C11/4097

    Abstract: A semiconductor memory device comprises a stack structure including a plurality of layers vertically stacked on a substrate. Each of the plurality of layers includes a first dielectric layer, a semiconductor layer, and a second dielectric layer that are sequentially stacked, and a first conductive line in the second dielectric layer and extending in a first direction. The device also comprises a second conductive line extending vertically through the stack structure, and a capacitor in the stack structure and spaced apart from the second conductive line. The semiconductor layer comprises semiconductor patterns extending in a second direction intersecting the first direction between the first conductive line and the substrate. The second conductive line is between a pair of the semiconductor patterns adjacent to each other in the first direction. An end of each of the semiconductor patterns is electrically connected to a first electrode of the capacitor.

    Semiconductor devices
    10.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US10446560B2

    公开(公告)日：2019-10-15

    申请号：US15986064

    申请日：2018-05-22

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sungwoo Kim ,  Bong-Soo Kim ,  Youngbae Kim ,  Kijae Hur ,  Gwanhyeob Koh ,  Hyeongsun Hong ,  Yoosang Hwang

    IPC: H01L27/00 ,  H01L27/108 ,  H01L27/24 ,  H01L27/22

    Abstract: A semiconductor device including: a first memory section, a first peripheral circuit section, and a second peripheral circuit section on a substrate; a second memory section on the second peripheral circuit section; and a wiring section between the second peripheral circuit section and the second memory section, the first memory section includes a plurality of first memory cells, the first memory cells each including a cell transistor and a capacitor connected to the cell transistor, the second memory section includes a plurality of second memory cells, the second memory cells each including a variable resistance element and a select element in series, and the wiring section includes a plurality of line patterns, at least one of the line patterns and at least one of the capacitors at the same level from the substrate, the second memory cells are higher from the substrate than the at least one of the capacitors.

Patent Agency Ranking