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    Semiconductor devices and methods of manufacturing the same
    1.
    发明授权
    Semiconductor devices and methods of manufacturing the same 有权

    公开(公告)号：US10910261B2

    公开(公告)日：2021-02-02

    申请号：US16577429

    申请日：2019-09-20

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Byoungdeog Choi ,  JungWoo Seo ,  Sangyeon Han ,  Hyun-Woo Chung ,  Hongrae Kim ,  Yoosang Hwang

    IPC分类号： H01L27/108 ,  H01L21/768 ,  H01L23/498 ,  H01L27/22 ,  H01L27/24 ,  H01L45/00 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

    摘要： A semiconductor device includes bit line structures on a substrate, the bit line structures extending along a first direction and being spaced apart from each other along a second direction perpendicular to the first direction, contact plugs spaced apart from each other along the first direction and being on active regions of the substrate between adjacent bit line structures, a linear spacer on each longitudinal sidewall of a bit line structure, landing pads on the contact plugs, respectively, the landing pads being electrically connected to the contact plugs, respectively, and landing pads that are adjacent to each other along the first direction being offset with respect to each other along the second direction, as viewed in a top view, a conductive pad between each of the contact plugs and a corresponding active region, a vertical axes of the conductive pad and corresponding active region being horizontally offset.

    Semiconductor devices having balancing capacitor and methods of forming the same
    6.
    发明授权
    Semiconductor devices having balancing capacitor and methods of forming the same 有权
    具有平衡电容器的半导体器件及其形成方法

    公开(公告)号：US09117696B2

    公开(公告)日：2015-08-25

    申请号：US14077834

    申请日：2013-11-12

    申请人： Samsung Electronics Co., Ltd.

    发明人： Jong-Un Kim ,  Yoo-Sang Hwang ,  Hyun-Woo Chung

    IPC分类号： H01L21/02 ,  H01L27/108 ,  G11C11/4097 ,  G11C11/4099

    CPC分类号： H01L27/10897 ,  G11C11/4097 ,  G11C11/4099 ,  H01L27/10814 ,  H01L27/10885 ,  H01L27/10894

    摘要： A semiconductor memory device includes a substrate including cell block, a balancing block, and a sense block. A plurality of cell bit lines are formed in the cell block of. A plurality of cell plugs are formed adjacent to side surfaces of the bit lines. Cell inner spacers, air spacers, and cell outer spacers are formed between the cell bit lines and the cell plugs. A plurality of balancing bit lines are formed in the balancing block. A plurality of balancing plugs are formed adjacent to side surfaces of the balancing bit lines. Balancing inner spacers and balancing outer spacers are formed between the balancing bit lines and the balancing plugs. The balancing bit lines and at least some of the cell bit lines are connected to the sense block.

    摘要翻译： 半导体存储器件包括包括单元块，平衡块和感测块的衬底。 在单元块中形成多个单元位线。 在位线的侧面附近形成多个电池插头。 在单元位线和电池插头之间形成电池内隔板，空气间隔件和电池外隔板。 在平衡块中形成多个平衡位线。 在平衡位线的侧表面附近形成多个平衡塞。 在平衡位线和平衡插头之间形成平衡内部间隔件和平衡外部间隔件。 平衡位线和至少一些单元位线连接到感测块。

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
    半导体器件及其制造方法

    公开(公告)号：US20140159148A1

    公开(公告)日：2014-06-12

    申请号：US14097937

    申请日：2013-12-05

    申请人： Samsung Electronics Co., Ltd.

    发明人： Hyun-Woo Chung ,  Jiyoung Kim ,  Yoosang Hwang

    IPC分类号： H01L29/78

    CPC分类号： H01L27/10814 ,  H01L27/10876 ,  H01L27/10891 ,  H01L27/10894

    摘要： A method of manufacturing a semiconductor device includes forming device isolation layer in a substrate to define active regions of which each has first regions and a second region between the first regions, forming a first trench and a pair of second trenches in the substrate, and forming gates in the second trenches, respectively. The first trench extends in a first direction and crosses the active regions and the device isolation layer. The second trenches are connected to a bottom of the first trench and extend in the first direction at both sides of the second regions.

    摘要翻译： 一种制造半导体器件的方法包括在衬底中形成器件隔离层，以限定其中各具有第一区域的有源区和在第一区之间的第二区，在衬底中形成第一沟槽和一对第二沟槽， 分别在第二壕沟的大门。 第一沟槽沿第一方向延伸并与有源区和器件隔离层交叉。 第二沟槽连接到第一沟槽的底部并且在第二区域的两侧沿第一方向延伸。

    Semiconductor device
    8.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09087728B2

    公开(公告)日：2015-07-21

    申请号：US14097937

    申请日：2013-12-05

    申请人： Samsung Electronics Co., Ltd.

    发明人： Hyun-Woo Chung ,  Jiyoung Kim ,  Yoosang Hwang

    IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119 ,  H01L27/108

    CPC分类号： H01L27/10814 ,  H01L27/10876 ,  H01L27/10891 ,  H01L27/10894

    摘要： A method of manufacturing a semiconductor device includes forming device isolation layer in a substrate to define active regions of which each has first regions and a second region between the first regions, forming a first trench and a pair of second trenches in the substrate, and forming gates in the second trenches, respectively. The first trench extends in a first direction and crosses the active regions and the device isolation layer. The second trenches are connected to a bottom of the first trench and extend in the first direction at both sides of the second regions.

    摘要翻译： 一种制造半导体器件的方法包括在衬底中形成器件隔离层，以限定其中各具有第一区域的有源区和在第一区之间的第二区，在衬底中形成第一沟槽和一对第二沟槽， 分别在第二壕沟的大门。 第一沟槽沿第一方向延伸并与有源区和器件隔离层交叉。 第二沟槽连接到第一沟槽的底部并且在第二区域的两侧沿第一方向延伸。