公开(公告)号：US20230380145A1

公开(公告)日：2023-11-23

申请号：US18141557

申请日：2023-05-01

申请人： Applied Materials, Inc.

发明人： Zhijun CHEN ,  Fredrick FISHBURN ,  Ying-Bing JIANG ,  Avgerinos V. GELATOS

IPC分类号： H10B12/00 ,  H10B80/00 ,  H01L25/065

CPC分类号： H10B12/482 ,  H10B80/00 ,  H01L25/0657 ,  H10B12/488 ,  H10B12/02

摘要： A semiconductor structure includes a plurality of memory levels stacked in a first direction, each of the plurality of memory levels including a semiconductor layer, a word line metal layer, and an interface on a cross section of the semiconductor layer, a spacer between adjacent memory levels of the plurality of memory levels in the first direction, and a bit line in contact with the interface of each of the plurality of memory levels, the bit line extending in the first direction. The bit line comprises metal material, and the interface comprises silicide.

公开(公告)号：US20180182777A1

公开(公告)日：2018-06-28

申请号：US15855465

申请日：2017-12-27

申请人： Applied Materials, Inc.

发明人： Zhenjiang CUI ,  Hanshen ZHANG ,  Anchuan WANG ,  Zhijun CHEN ,  Nitin K. INGLE

IPC分类号： H01L27/11582 ,  H01L21/311 ,  H01L21/3213 ,  H01L23/31 ,  H01L23/29 ,  H01L27/11556 ,  H01L21/67

摘要： Embodiments of the present disclosure provide methods for forming features in a film stack. The film stack may be utilized to form stair-like structures with accurate profiles control in manufacturing three dimensional (3D) stacking of semiconductor chips. In one example, a method includes exposing a substrate having a multi-material layer formed thereon to radicals of a remote plasma to form one or more features through the multi-material layer, the one or more features exposing a portion of a top surface of the substrate, and the multi-material layer comprising alternating layers of a first layer and a second layer, wherein the remote plasma is formed from an etching gas mixture comprising a fluorine-containing chemistry, and wherein the process chamber is maintained at a pressure of about 2 Torr to about 20 Torr and a temperature of about −100° C. to about 100° C.

公开(公告)号：US20140271097A1

公开(公告)日：2014-09-18

申请号：US14188344

申请日：2014-02-24

申请人： APPLIED MATERIALS, INC.

发明人： Anchuan WANG ,  Xinglong CHEN ,  Zihui LI ,  Hiroshi HAMANA ,  Zhijun CHEN ,  Ching-Mei HSU ,  Jiayin HUANG ,  Nitin K. INGLE ,  Dmitry LUBOMIRSKY ,  Shankar VENKATARAMAN ,  Randhir THAKUR

IPC分类号： H01L21/677

CPC分类号： H01L21/324 ,  C23C16/4405 ,  H01J37/32357 ,  H01J37/32862 ,  H01L21/02041 ,  H01L21/02057 ,  H01L21/0206 ,  H01L21/263 ,  H01L21/2686 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/67069 ,  H01L21/67075 ,  H01L21/6708 ,  H01L21/67109 ,  H01L21/67115 ,  H01L21/67184 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67207 ,  H01L21/67248 ,  H01L21/67253 ,  H01L21/67288 ,  H01L21/67703 ,  H01L21/67739 ,  H01L21/67742 ,  H01L21/6831

摘要： Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools.

摘要翻译： 提供系统，室和过程以控制由水分污染引起的过程缺陷。 这些系统可以提供腔室的配置，以在真空或受控环境中执行多个操作。 腔室可以包括在组合腔室设计中提供附加处理能力的构造。 这些方法可以提供由系统工具执行的蚀刻工艺可能引起的老化缺陷的限制，预防和校正。

公开(公告)号：US20240341090A1

公开(公告)日：2024-10-10

申请号：US18608917

申请日：2024-03-18

申请人： Applied Materials, Inc.

发明人： Sony VARGHESE ,  Tong LIU ,  Zhijun CHEN ,  Balasubramanian PRANATHARTHIHARAN

IPC分类号： H10B12/00

CPC分类号： H10B12/485 ,  H10B12/0335 ,  H10B12/315 ,  H10B12/482

摘要： A semiconductor structure includes a first active region and a second active region on a substrate, a metal plug electrically connected to the first active region via a contact layer and an interface layer, a bit line electrically connected to the second active region via a bit line contact plug, and a bit line spacer encapsulating the bit line, wherein the first active region and the second active region are lightly n-type doped, the substrate is p-type doped, and the contact layer is epitaxially grown and n-type doped with a graded doping profile that increases from an interface with the first active region to an interface with the interface layer.

公开(公告)号：US20170229309A1

公开(公告)日：2017-08-10

申请号：US15096428

申请日：2016-04-12

申请人： Applied Materials, Inc.

发明人： Jiayin HUANG ,  Lin XU ,  Zhijun CHEN ,  Anchuan WANG

IPC分类号： H01L21/3065 ,  H01L21/67 ,  H01J37/32

CPC分类号： H01L21/3065 ,  H01J37/32009 ,  H01J37/32082 ,  H01J37/32357 ,  H01J37/3244 ,  H01J37/32715 ,  H01J2237/334 ,  H01L21/02049 ,  H01L21/31116 ,  H01L21/67069

摘要： A method and apparatus for processing a semiconductor substrate are described herein. A process system described herein includes a plasma source and a flow distribution plate. A method described herein includes generating fluorine radicals or ions, delivering the fluorine radicals or ions through one or more plasma blocking screens to a volume defined by the flow distribution plate and one of one or more plasma blocking screens, delivering oxygen and hydrogen to the volume, mixing the oxygen and hydrogen with fluorine radicals or ions to form hydrogen fluoride, flowing hydrogen fluoride through the flow distribution plate, and etching a substrate using bifluoride. The concentration of fluorine radicals or ions on the surface of the substrate is reduced to less than about two percent.

公开(公告)号：US20240332023A1

公开(公告)日：2024-10-03

申请号：US18621828

申请日：2024-03-29

申请人： Applied Materials, Inc.

发明人： Ying-Bing JIANG ,  In Seok HWANG ,  Zhijun CHEN ,  Avgerinos V. GELATOS ,  Joung Joo LEE ,  Xianmin TANG ,  Fredrick FISHBURN ,  Le ZHANG ,  Wangee KIM ,  Mahendra PAKALA

IPC分类号： H01L21/285 ,  C23C16/24 ,  C23C16/34 ,  C23C16/40 ,  C23C16/455

CPC分类号： H01L21/28518 ,  C23C16/24 ,  C23C16/345 ,  C23C16/401 ,  C23C16/45557

摘要： The present disclosure relates to a method of selectively forming a silicide in high-aspect ratio structures by use of a multistep deposition process. A first precursor gas is delivered to a surface disposed within a processing region of a process chamber maintained at a first process pressure, where the substrate is maintained at a first temperature for a first period of time. A purge gas is delivered to for a second period of time after the first period of time has elapsed. A second precursor gas is delivered to the surface of the substrate. The second precursor being maintained at a second process pressure while the substrate is maintained at a second temperature for a third period of time. The purge gas is delivered to the processing region for a fourth period of time after the third period of time has elapsed.

公开(公告)号：US20170291199A1

公开(公告)日：2017-10-12

申请号：US15485105

申请日：2017-04-11

申请人： Applied Materials, Inc.

发明人： Xing ZHONG ,  Zhijun CHEN ,  Zhenjiang CUI ,  Nitin K. INGLE

IPC分类号： B08B5/00 ,  H01L21/02

CPC分类号： H01L21/02057 ,  H01L21/76224

摘要： A method for removing halogen from a surface of a substrate is described herein. The method described herein includes flowing oxygen gas and an inert gas such as nitrogen gas into a RPS. The gases in the RPS are energized to form oxygen radicals and nitrogen radicals. The oxygen and nitrogen radicals are used to remove halogen content on the surface of the substrate. The chamber pressure of the halogen content removal process is very low, ranging from about 50 mTorr to about 100 mTorr. By using oxygen gas and an inert gas and with a low chamber pressure, the halogen content on the surface of the substrate is reduced while keeping the oxidation level of the surface of the substrate to at most 10 Angstroms.

公开(公告)号：US20150371861A1

公开(公告)日：2015-12-24

申请号：US14312202

申请日：2014-06-23

申请人： APPLIED MATERIALS, INC.

发明人： Zihui LI ,  Zhijun CHEN ,  Anchuan WANG

IPC分类号： H01L21/308 ,  H01L21/3065

CPC分类号： H01L21/3086 ,  H01L21/266 ,  H01L21/3081 ,  H01L21/31144

摘要： A method of patterning a substrate is described and include two possible layers which may be easily integrated into a photoresist patterning process flow and avoid an observed photoresist peeling problems. A conformal carbon layer or a conformal silicon-carbon-nitrogen layer may be formed between an underlying silicon oxide layer and an overlying photoresist layer. Either inserted layer may avoid remotely-excited fluorine etchants from diffusing through the photoresist and chemically degrading the silicon oxide. The conformal carbon layer may be removed at the same time as the photoresist and the conformal silicon-carbon-nitrogen layer may be removed at the same time as the silicon oxide, limiting process complexity.

摘要翻译： 描述了图案化衬底的方法，并且包括两个可能的层，其可以容易地集成到光致抗蚀剂图案化工艺流程中并避免观察到的光刻胶剥离问题。 可以在下面的氧化硅层和上覆的光致抗蚀剂层之间形成保形碳层或保形硅 - 碳 - 氮层。 任一插入层可以避免远程激发的氟蚀刻剂通过光致抗蚀剂扩散并化学降解氧化硅。 可以在与硅氧化物同时去除光致抗蚀剂和共形硅 - 碳 - 氮层的同时去除共形碳层，从而限制了工艺的复杂性。