公开(公告)号：US20150262904A1

公开(公告)日：2015-09-17

申请号：US14213890

申请日：2014-03-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Wensen Hung ,  Szu-Po Huang ,  Hsiang-Fan Lee ,  Kim Hong Chen ,  Chi-Hsi Wu ,  Shin-Puu Jeng

IPC: H01L23/367 ,  H01L23/31 ,  H01L25/00 ,  H01L21/56 ,  H01L21/302 ,  H01L23/36 ,  H01L25/065

CPC classification number: H01L23/367 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/4334 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49894 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/15311

Abstract: An integrated circuit package and a method of fabrication of the same are introduced. An opening is formed in a substrate. An embedded heat dissipation feature (eHDF) is placed in the opening in the substrate and is attached to the substrate using a high thermal conductivity adhesive. One or more bonded chips are attached to the substrate using a flip-chip method. The eHDF is thermally attached to one or more hot spots of the bonded chips. In some embodiments, the eHDF may comprise multiple physically disconnected portions. In other embodiments, the eHDF may have a perforated structure.

Abstract translation: 引入集成电路封装及其制造方法。 在基板上形成开口。 将嵌入式散热特征（eHDF）放置在基板的开口中，并使用高导热性粘合剂附着到基板上。 使用倒装芯片方法将一个或多个接合芯片附接到基板。 eHDF热连接到粘合芯片的一个或多个热点。 在一些实施例中，eHDF可以包括多个物理上断开的部分。 在其他实施例中，eHDF可以具有穿孔结构。

公开(公告)号：US20150162307A1

公开(公告)日：2015-06-11

申请号：US14103523

申请日：2013-12-11

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Kim Hong Chen ,  Wensen Hung ,  Szu-Po Huang ,  Shin-Puu Jeng

IPC: H01L25/065 ,  H01L23/04 ,  H01L25/00 ,  H01L23/373 ,  H01L23/367

CPC classification number: H01L25/0655 ,  H01L21/52 ,  H01L21/56 ,  H01L23/04 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3672 ,  H01L23/3675 ,  H01L23/3737 ,  H01L23/42 ,  H01L23/49827 ,  H01L25/50 ,  H01L2023/4056 ,  H01L2023/4062 ,  H01L2023/4068 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/00

Abstract: An embodiment package includes a first die stack on a surface of a package component, a second die stack on the surface of the package component, and a contour lid over the first die stack and second die stack. The contour lid includes a first thermal conductive portion over the first die stack, a second thermal conductive portion over the second die stack, and a thermal barrier portion between the first thermal conductive portion and the second thermal conductive portion. The thermal barrier portion includes a low thermal conductivity material.

Abstract translation: 实施方案包装包括在包装组件的表面上的第一模具堆叠，在包装组件的表面上的第二模具堆叠，以及在第一模具堆叠和第二模具堆叠之上的轮廓盖。 轮廓盖包括在第一模具堆叠之上的第一导热部分，在第二模具堆叠之上的第二导热部分，以及在第一导热部分和第二导热部分之间的热障壁部分。 热障部分包括低导热材料。

公开(公告)号：US20150035134A1

公开(公告)日：2015-02-05

申请号：US13957727

申请日：2013-08-02

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Szu-Po Huang ,  Kim Hong Chen ,  Shin-Puu Jeng

IPC: H01L23/34

CPC classification number: H01L25/0657 ,  H01L23/34 ,  H01L23/3672 ,  H01L23/3675 ,  H01L23/42 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/92225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A package includes a first die and a second die underlying the first die and in a same first die stack as the first die. The second die includes a first portion overlapped by the first die, and a second portion not overlapped by the first die. A first Thermal Interface Material (TIM) is over and contacting a top surface of the first die. A heat dissipating lid has a first bottom surface contacting the first TIM. A second TIM is over and contacting the second portion of the second die. A heat dissipating ring is over and contacting the second TIM.

Abstract translation: 包装包括第一管芯和第一管芯下​​面的第一管芯和与第一管芯相同的第一管芯堆叠。 第二模具包括与第一模具重叠的第一部分和不与第一模具重叠的第二部分。 第一个热界面材料（TIM）结束并接触第一个模具的顶面。 散热盖具有接触第一TIM的第一底面。 第二TIM结束并接触第二模具的第二部分。 散热环结束并与第二个TIM接触。

公开(公告)号：US20140217610A1

公开(公告)日：2014-08-07

申请号：US14249637

申请日：2014-04-10

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shin-Puu Jeng ,  Shang-Yun Hou ,  Kim Hong Chen ,  Wensen Hung ,  Szu-Po Huang

IPC: H01L23/48 ,  H01L23/00

CPC classification number: H01L25/0652 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/42 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/18 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68331 ,  H01L2224/0401 ,  H01L2224/11 ,  H01L2224/11002 ,  H01L2224/11003 ,  H01L2224/1111 ,  H01L2224/11334 ,  H01L2224/1183 ,  H01L2224/11848 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/1703 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81805 ,  H01L2224/83 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1443 ,  H01L2924/15153 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/157 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014

Abstract: Disclosed herein is a method of forming a device, comprising mounting a plurality of first interconnects on one or more first integrated circuit dies. One or more second integrated circuit dies are mounted on a first side of an interposer. The interposer is mounted to at a second side to the first integrated circuit dies, the plurality of first interconnects disposed outside of the interposer. The interposer is mounted to a first side of a substrate by attaching the first interconnects to the substrate, the substrate in signal communication with one or more of the first integrated circuit dies through the first interconnects.

Abstract translation: 本文公开了一种形成装置的方法，包括将多个第一互连件安装在一个或多个第一集成电路管芯上。 一个或多个第二集成电路管芯安装在插入件的第一侧上。 该插入件安装在第二侧，并与第一集成电路管芯相连，多个第一互连件设置在插入件外部。 通过将第一互连件附接到衬底，将衬底安装到衬底的第一侧，衬底通过第一互连与一个或多个第一集成电路管芯信号通信。

公开(公告)号：US11133237B2

公开(公告)日：2021-09-28

申请号：US16852964

申请日：2020-04-20

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Szu-Po Huang ,  Hsiang-Fan Lee ,  Kim Hong Chen ,  Chi-Hsi Wu ,  Shin-Puu Jeng

IPC: H01L23/367 ,  H01L23/36 ,  H01L25/065 ,  H01L25/00 ,  H01L23/13 ,  H01L23/433 ,  H01L23/31 ,  H01L25/10 ,  H01L23/498

Abstract: An integrated circuit package and a method of fabrication of the same are provided. An opening is formed in a substrate. An embedded heat dissipation feature (eHDF) is placed in the opening in the substrate and is attached to the substrate using a high thermal conductivity adhesive. One or more bonded chips are attached to the substrate using a flip-chip method. The eHDF is thermally attached to one or more hot spots of the bonded chips. In some embodiments, the eHDF may comprise multiple physically disconnected portions. In other embodiments, the eHDF may have a perforated structure.

公开(公告)号：US11037852B2

公开(公告)日：2021-06-15

申请号：US16587463

申请日：2019-09-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Szu-Po Huang ,  Hsiang-Fan Lee ,  Kim Hong Chen ,  Chi-Hsi Wu ,  Shin-Puu Jeng

IPC: H01L23/02 ,  H01L23/36 ,  H01L23/04 ,  H01L23/10 ,  H01L25/065 ,  H01L23/367 ,  H01L23/42 ,  H01L23/498 ,  H01L23/00 ,  H01L25/18

Abstract: A package includes a substrate having a conductive layer, and the conductive layer comprises an exposed portion. A die stack is disposed over the substrate and electrically connected to the conductive layer. A high thermal conductivity material is disposed over the substrate and contacting the exposed portion of the conductive layer. The package further includes a contour ring over and contacting the high thermal conductivity material.

公开(公告)号：US20190122959A1

公开(公告)日：2019-04-25

申请号：US16222754

申请日：2018-12-17

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Kim Hong Chen ,  Szu-Po Huang ,  Shin-Puu Jeng ,  Wensen Hung

IPC: H01L23/473 ,  H01L23/46 ,  H01L33/64 ,  B23P15/26 ,  H01L23/44

CPC classification number: H01L23/473 ,  H01L23/44 ,  H01L33/648 ,  H01L2224/73253 ,  Y10T29/49117

Abstract: Packages for semiconductor devices, packaged semiconductor devices, and methods of cooling packaged semiconductor devices are disclosed. In some embodiments, a package for a semiconductor device includes a substrate including a semiconductor device mounting region, a cover coupled to a perimeter of the substrate, and members disposed between the substrate and the cover. The package includes partitions, with each partition being disposed between two adjacent members. The package includes a fluid inlet port coupled to the cover, and a fluid outlet port coupled to one of the partitions.

公开(公告)号：US10157813B2

公开(公告)日：2018-12-18

申请号：US15676963

申请日：2017-08-14

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Szu-Po Huang ,  Hsiang-Fan Lee ,  Kim Hong Chen ,  Chi-Hsi Wu ,  Shin-Puu Jeng

IPC: H01L23/02 ,  H01L23/36 ,  H01L23/04 ,  H01L23/10 ,  H01L25/065 ,  H01L23/367 ,  H01L23/42 ,  H01L23/00 ,  H01L25/18 ,  H01L23/498

Abstract: A package includes a substrate having a conductive layer, and the conductive layer comprises an exposed portion. A die stack is disposed over the substrate and electrically connected to the conductive layer. A high thermal conductivity material is disposed over the substrate and contacting the exposed portion of the conductive layer. The package further includes a contour ring over and contacting the high thermal conductivity material.

公开(公告)号：US20180269127A1

公开(公告)日：2018-09-20

申请号：US15984592

申请日：2018-05-21

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wensen Hung ,  Szu-Po Huang ,  Hsiang-Fan Lee ,  Kim Hong Chen ,  Chi-Hsi Wu ,  Shin-Puu Jeng

IPC: H01L23/367 ,  H01L23/31 ,  H01L23/36 ,  H01L23/433 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L23/367 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/4334 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49894 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/15311

Abstract: An integrated circuit package and a method of fabrication of the same are provided. An opening is formed in a substrate. An embedded heat dissipation feature (eHDF) is placed in the opening in the substrate and is attached to the substrate using a high thermal conductivity adhesive. One or more bonded chips are attached to the substrate using a flip-chip method. The eHDF is thermally attached to one or more hot spots of the bonded chips. In some embodiments, the eHDF may comprise multiple physically disconnected portions. In other embodiments, the eHDF may have a perforated structure.

公开(公告)号：US20170162542A1

公开(公告)日：2017-06-08

申请号：US15439714

申请日：2017-02-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Kim Hong Chen ,  Wensen Hung ,  Szu-Po Huang ,  Shin-Puu Jeng

IPC: H01L25/065 ,  H01L23/04 ,  H01L21/56 ,  H01L25/00 ,  H01L21/52 ,  H01L23/367 ,  H01L23/42

CPC classification number: H01L25/0655 ,  H01L21/52 ,  H01L21/56 ,  H01L23/04 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3672 ,  H01L23/3675 ,  H01L23/3737 ,  H01L23/42 ,  H01L23/49827 ,  H01L25/50 ,  H01L2023/4056 ,  H01L2023/4062 ,  H01L2023/4068 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/00

Abstract: An embodiment package includes a first die stack on a surface of a package component, a second die stack on the surface of the package component, and a contour lid over the first die stack and second die stack. The contour lid includes a first thermal conductive portion over the first die stack, a second thermal conductive portion over the second die stack, and a thermal barrier portion between the first thermal conductive portion and the second thermal conductive portion. The thermal barrier portion includes a low thermal conductivity material.