SEMICONDUCTOR PACKAGE WITH STIFFENER STRUCTURE AND METHOD FORMING THE SAME

    公开(公告)号:US20230335449A1

    公开(公告)日:2023-10-19

    申请号:US18336960

    申请日:2023-06-17

    IPC分类号: H01L23/31 H01L21/56 H01L23/12

    CPC分类号: H01L23/31 H01L21/56 H01L23/12

    摘要: A semiconductor package includes a chip package disposed on a substrate, a plurality of electronic components disposed aside the chip package on the substrate and a stiffener structure disposed on the substrate. The stiffener structure includes a stiffener ring surrounding the chip package and the plurality of electronic components, a stiffener rib between the chip package and the plurality of electronic components, wherein the stiffener rib includes a first portion and a second portion on the first portion, and a width of the second portion is greater than a width of the first portion. The semiconductor package further includes a lid attached to the stiffener structure, the chip package and the plurality of electronic components. A method of forming the semiconductor package is also provided.

    SEMICONDUCTOR DEVICE
    3.
    发明申请

    公开(公告)号:US20230071542A1

    公开(公告)日:2023-03-09

    申请号:US17700498

    申请日:2022-03-22

    摘要: A semiconductor device including a package, a lid and a thermal interface material is provided. The package includes a packaging substrate, semiconductor dies and an insulating encapsulation, wherein the semiconductor dies are disposed on and electrically connected to the packaging substrate, and the insulating encapsulation encapsulates the semiconductor dies. The lid is disposed on the packaging substrate, the lid includes a cover portion and foot portion extending from the cover portion to the packaging substrate, wherein the cover portion covers the semiconductor dies and the insulating encapsulation, the foot portion includes foot segments laterally spaced apart from one another, and the foot segments are attached to the packaging substrate. The cover portion of the lid is attached to the package through the thermal interface material.

    PACKAGE STRUCTURE
    5.
    发明申请

    公开(公告)号:US20220149030A1

    公开(公告)日:2022-05-12

    申请号:US17584308

    申请日:2022-01-25

    摘要: A structure including a wiring substrate, an interposer disposed on and electrically connected to the wiring substrate, a semiconductor die disposed on and electrically connected to the interposer, a first insulating encapsulation disposed on the interposer, a second insulating encapsulation disposed on the wiring substrate, and a lid is provided. The semiconductor die is laterally encapsulated by the first insulating encapsulation. The semiconductor die and the first insulating encapsulation are laterally encapsulated by the second insulating encapsulation. A top surface of the first insulating encapsulation is substantially leveled with a top surface of the second insulating encapsulation and a surface of the semiconductor die. The lid is disposed on the semiconductor die, the first insulating encapsulation and the second insulating encapsulation.