公开(公告)号：US10468341B2

公开(公告)日：2019-11-05

申请号：US16232129

申请日：2018-12-26

Applicant: MEDIATEK INC.

Inventor： Nai-Wei Liu ,  Tzu-Hung Lin ,  I-Hsuan Peng ,  Che-Hung Kuo ,  Che-Ya Chou ,  Wei-Che Huang

IPC: H01L23/485 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L23/538 ,  H01L25/10

Abstract: A semiconductor package assembly includes a redistribution layer (RDL) structure, which RDL structure includes a conductive trace. A redistribution layer (RDL) contact pad is electrically coupled to the conductive trace, and the RDL contact pad is composed of a symmetrical portion and an extended wing portion connected to the symmetrical portion. The RDL structure includes a first region for a semiconductor die to be disposed thereon and a second region surrounding the first region, and the extended wing portion of the RDL contact pad is offset from a center of the first region.

公开(公告)号：US20190252351A1

公开(公告)日：2019-08-15

申请号：US16279925

申请日：2019-02-19

Applicant: MediaTek Inc.

Inventor： Tzu-Hung Lin ,  I-Hsuan Peng ,  Nai-Wei Liu ,  Ching-Wen Hsiao ,  Wei-Che Huang

IPC: H01L25/065 ,  H01L23/66 ,  H01L23/00 ,  H01L25/16 ,  H01L23/552 ,  H01L23/31 ,  H01L23/538 ,  H01L23/522

CPC classification number: H01L25/0652 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/5226 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/552 ,  H01L23/66 ,  H01L24/19 ,  H01L24/20 ,  H01L25/16 ,  H01L2223/6677 ,  H01L2224/02331 ,  H01L2224/02379 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H01L2924/1421 ,  H01L2924/1435 ,  H01L2924/1438 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025

Abstract: A semiconductor package structure including a first semiconductor package is provided. The first semiconductor package includes a first semiconductor package including a first redistribution layer (RDL) structure having a first surface and a second surface opposite thereto. A first semiconductor die and a first molding compound that surrounds the first semiconductor die are disposed on the first surface of the first RDL structure. An IMD structure having a conductive layer with an antenna pattern or a conductive shielding layer is disposed on the first molding compound and the first semiconductor die.

公开(公告)号：US09870980B2

公开(公告)日：2018-01-16

申请号：US14986295

申请日：2015-12-31

Applicant: MediaTek Inc.

Inventor： Ming-Tzong Yang ,  Yu-Hua Huang ,  Wei-Che Huang

IPC: H01L23/48 ,  H01L23/538 ,  H01L21/768 ,  H01L23/00 ,  H01L23/528 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/528 ,  H01L23/5384 ,  H01L24/11 ,  H01L27/088 ,  H01L29/0649 ,  H01L29/42356 ,  H01L2224/02372 ,  H01L2224/0912 ,  H01L2225/06541

Abstract: The invention provides a semiconductor package with a through silicon via (TSV) interconnect. An exemplary embodiment of the semiconductor package with a TSV interconnect includes a semiconductor substrate, having a front side and a back side. A contact array is disposed on the front side of the semiconductor substrate. An isolation structure is disposed in the semiconductor substrate, underlying the contact array. The TSV interconnect is formed through the semiconductor substrate, overlapping with the contact array and the isolation structure.

公开(公告)号：US20150091158A1

公开(公告)日：2015-04-02

申请号：US14040732

申请日：2013-09-30

Applicant: MEDIATEK INC.

Inventor： Tzu-Hung Lin ,  Yu-Hua Huang ,  Wei-Che Huang ,  Ming-Tzong Yang

IPC: H01L23/00 ,  H01L25/18

CPC classification number: H01L25/0657 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/32014 ,  H01L2224/32058 ,  H01L2224/32105 ,  H01L2224/32145 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A package structure, comprising: a substrate, having at least one conductive units provided at a first surface of the substrate; at least one first die, provided on a second surface of the substrate; a connecting layer; a second die, provided on the connecting layer, wherein the connecting layer comprises at least one bump for connecting the first die to the second die such that the first die and the second die are electrically connected; and at least one bonding wire, for electrically connecting the first die to the conductive units or the substrate.

Abstract translation: 一种封装结构，包括：衬底，其具有设置在所述衬底的第一表面处的至少一个导电单元; 至少一个第一管芯，设置在所述衬底的第二表面上; 连接层; 设置在所述连接层上的第二管芯，其中所述连接层包括用于将所述第一管芯连接到所述第二管芯的至少一个突起，使得所述第一管芯和所述第二管芯电连接; 以及用于将第一管芯电连接到导电单元或基板的至少一个接合线。

公开(公告)号：US08987851B2

公开(公告)日：2015-03-24

申请号：US13790060

申请日：2013-03-08

Applicant: MediaTek Inc.

Inventor： Ming-Tzong Yang ,  Cheng-Chou Hung ,  Tung-Hsing Lee ,  Wei-Che Huang ,  Yu-Hua Huang

IPC: H01L27/14 ,  H01L29/40 ,  H01L21/76 ,  H01L23/522 ,  H01L31/18 ,  H01L23/48 ,  H01L23/00

CPC classification number: H01L21/76898 ,  H01L21/02107 ,  H01L21/268 ,  H01L21/30625 ,  H01L23/481 ,  H01L23/5227 ,  H01L23/66 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L31/18 ,  H01L2223/6616 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/11 ,  H01L2924/12042 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The invention provides a radio-frequency (RF) device package and a method for fabricating the same. An exemplary embodiment of a radio-frequency (RF) device package includes a base, wherein a radio-frequency (RF) device chip is mounted on the base. The RF device chip includes a semiconductor substrate having a front side and a back side. A radio-frequency (RF) component is disposed on the front side of the semiconductor substrate. An interconnect structure is disposed on the RF component, wherein the interconnect structure is electrically connected to the RF component, and a thickness of the semiconductor substrate is less than that of the interconnect structure. A through hole is formed through the semiconductor substrate from the back side of the semiconductor substrate, and is connected to the interconnect structure. A TSV structure is disposed in the through hole.

Abstract translation: 本发明提供一种射频（RF）器件封装及其制造方法。 射频（RF）器件封装的示例性实施例包括基座，其中射频（RF）器件芯片安装在基座上。 RF器件芯片包括具有前侧和后侧的半导体衬底。 射频（RF）部件设置在半导体衬底的前侧。 互连结构设置在RF部件上，其中互连结构电连接到RF部件，并且半导体衬底的厚度小于互连结构的厚度。 从半导体衬底的背面穿过半导体衬底形成一个通孔，并连接到互连结构。 TSV结构设置在通孔中。

公开(公告)号：US12237401B2

公开(公告)日：2025-02-25

申请号：US17821195

申请日：2022-08-22

Applicant: MEDIATEK Inc.

Inventor： Cheng-Tien Wan ,  Yao-Tsung Huang ,  Yun-San Huang ,  Ming-Cheng Lee ,  Wei-Che Huang

IPC: H01L29/66 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/088 ,  H01L27/12 ,  H01L29/417 ,  H01L29/78

Abstract: A semiconductor chip includes a substrate and a transistor. The transistor is formed on the substrate and includes an insulation layer and a fin. The fin includes a base portion and a protrusion connected with the base portion, wherein the protrusion is projected with respect to an upper surface of the base portion and has a recess recessed with respect to the upper surface.

公开(公告)号：US20230307316A1

公开(公告)日：2023-09-28

申请号：US18116258

申请日：2023-03-01

Applicant: MEDIATEK INC.

Inventor： Chin-Lai Chen ,  Wei-Che Huang ,  Wen-Sung Hsu ,  Chun-Yin Lin ,  Li-Song Lin ,  Tai-Yu Chen

IPC: H01L23/427 ,  H01L23/16 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L23/427 ,  H01L23/16 ,  H01L25/0655 ,  H01L24/16 ,  H01L24/32 ,  H01L2924/182 ,  H01L2224/16225 ,  H01L2224/32245

Abstract: A semiconductor package includes a substrate having a top surface and a bottom surface. A semiconductor device is mounted on the top surface of the substrate. The semiconductor device has an active front surface directly facing the substrate, and an opposite rear surface. A vapor chamber lid is in thermal contact with the rear surface of the semiconductor device. The vapor chamber lid includes an internal vacuum-sealed cavity that stores a working fluid, and wick structures for recirculating the working fluid within the internal vacuum-sealed cavity.

公开(公告)号：US10217723B2

公开(公告)日：2019-02-26

申请号：US15644849

申请日：2017-07-10

Applicant: MEDIATEK INC.

Inventor： Tzu-Hung Lin ,  I-Hsuan Peng ,  Nai-Wei Liu ,  Wei-Che Huang

IPC: H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L23/538 ,  H01L29/06

Abstract: A semiconductor chip package includes a first die and a second die. The first die and second die are coplanar and disposed in proximity to each other in a side-by-side fashion. A non-straight line shaped interface gap is disposed between the first die and second die. A molding compound surrounds the first die and second die. A redistribution layer (RDL) structure is disposed on the first die, the second die and on the molding compound. The first semiconductor die is electrically connected to the second semiconductor die through the RDL structure.

公开(公告)号：US09941260B2

公开(公告)日：2018-04-10

申请号：US15203418

申请日：2016-07-06

Applicant: MediaTek Inc.

Inventor： Tzu-Hung Lin ,  Chi-Chin Lien ,  Nai-Wei Liu ,  I-Hsuan Peng ,  Ching-Wen Hsiao ,  Wei-Che Huang

IPC: H01L23/00 ,  H01L25/10 ,  H01L25/00 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065

CPC classification number: H01L25/105 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/5389 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first semiconductor package that includes a first semiconductor die having a first surface and a second surface opposite thereto. A first package substrate is disposed on the first surface of the first semiconductor die. A first molding compound surrounds the first semiconductor die and the first package substrate. A first redistribution layer (RDL) structure is disposed on the first molding compound, in which the first package substrate is interposed and electrically coupled between the first semiconductor die and the first RDL structure.

公开(公告)号：US09786560B2

公开(公告)日：2017-10-10

申请号：US15365435

申请日：2016-11-30

Applicant: MediaTek Inc.

Inventor： Cheng-Chou Hung ,  Ming-Tzong Yang ,  Tung-Hsing Lee ,  Wei-Che Huang ,  Yu-Hua Huang ,  Tzu-Hung Lin

IPC: H01L23/48 ,  H01L21/768 ,  H01L29/06 ,  H01L21/761 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L21/76898 ,  H01L21/761 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L29/0619 ,  H01L29/0623 ,  H01L2224/13 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for forming a semiconductor package structure is provided. The method for forming a semiconductor package structure includes providing a substrate, wherein the substrate has a front side and a back side, forming a first guard ring doped region and a second guard ring doped region in the substrate, wherein the first guard ring doped region and the second guard ring doped region have different conductive types, forming a trench through the substrate from a back side of the substrate, conformally forming an insulating layer lining the back side of the substrate, a bottom surface and sidewalls of the trench, removing a portion of the insulating layer on the back side of the substrate to form a through via, and forming a conductive material in the through via, wherein a through silicon via (TSV) interconnect structure is formed by the insulating layer and the conductive material.