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公开(公告)号:US11736998B2
公开(公告)日:2023-08-22
申请号:US17466044
申请日:2021-09-03
Applicant: MEDIATEK INC.
Inventor: Guan-Jie Huang , Tzu-Wen Chang , Kuan-Wei Chen , Yu-Hua Huang , Teng Ma , Sheng-Kai Chang
CPC classification number: H04W36/00837 , H04W8/08 , H04W36/0079 , H04W36/14 , H04W36/24 , H04W68/005 , H04W76/19 , H04W76/27
Abstract: A communications apparatus and associated method communicating with at least one cellular network includes a radio transceiver and a processor. The communications apparatus includes a radio transceiver, capable of transmitting or receiving wireless radio frequency signals to or from a cellular network; and a processor. The processor is configured to: receive an incoming call request message that will trigger a Circuit Switch Fall Back (CSFB) procedure or a Evolved Packet System Fall Back (EPS FB) procedure from the cellular network via the radio transceiver, query a user to accept or reject the incoming call request before triggering the CSFB procedure or the EPS FB procedure, and determine whether to trigger the CSFB procedure or the EPS FB procedure based on a response to the query from the user.
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公开(公告)号:US11348900B2
公开(公告)日:2022-05-31
申请号:US16899335
申请日:2020-06-11
Applicant: MediaTek Inc.
Inventor: Tzu-Hung Lin , Yu-Hua Huang , Wei-Che Huang , Ming-Tzong Yang
IPC: H01L25/065 , H01L23/00 , H01L25/18
Abstract: A package structure comprising: a substrate, having at least one conductive units provided at a first surface of the substrate; at least one first die, provided on a second surface of the substrate; a connecting layer, provided on the first die; a second die, provided on the connecting layer, wherein the connecting layer comprises at least one bump for connecting the first die; and at least one bonding wire. The connecting layer has a first touch side and a second touch side, the first touch side contacts a first surface of the first die and the second touch side contacts a second surface of the second die, an area of the first touch side is smaller than which for the first surface of the first die, and a size of the first die equals to which of the second die.
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公开(公告)号:US10727202B2
公开(公告)日:2020-07-28
申请号:US15347803
申请日:2016-11-10
Applicant: MEDIATEK INC.
Inventor: Tzu-Hung Lin , Yu-Hua Huang , Wei-Che Huang , Ming-Tzong Yang
IPC: H01L23/48 , H01L25/065 , H01L23/00 , H01L25/18
Abstract: A package structure comprising: a substrate, having at least one conductive units provided at a first surface of the substrate; at least one first die, provided on a second surface of the substrate; a connecting layer, provided on the first die; a second die, provided on the connecting layer, wherein the connecting layer comprises at least one bump for connecting the first die; and at least one bonding wire. The connecting layer has a first touch side and a second touch side, the first touch side contacts a first surface of the first die and the second touch side contacts a second surface of the second die, an area of the first touch side is smaller than which for the first surface of the first die, and a size of the first die equals to which of the second die.
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公开(公告)号:US09899261B2
公开(公告)日:2018-02-20
申请号:US15365394
申请日:2016-11-30
Applicant: MediaTek Inc.
Inventor: Cheng-Chou Hung , Ming-Tzong Yang , Tung-Hsing Lee , Wei-Che Huang , Yu-Hua Huang , Tzu-Hung Lin
IPC: H01L23/48 , H01L21/768 , H01L29/06 , H01L21/761 , H01L23/00 , H01L23/498
CPC classification number: H01L21/76898 , H01L21/761 , H01L23/481 , H01L23/49816 , H01L23/49827 , H01L24/11 , H01L29/0619 , H01L29/0623 , H01L2224/13 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor package structure having a substrate, wherein the substrate has a front side and a back side, a through silicon via (TSV) interconnect structure formed in the substrate, and a first guard ring doped region and a second guard ring doped region formed in the substrate. The second guard ring doped region is disposed between the first guard ring doped region and the TSV interconnect structure.
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公开(公告)号:US20240273675A1
公开(公告)日:2024-08-15
申请号:US18402697
申请日:2024-01-02
Applicant: MEDIATEK INC.
Inventor: Yu-Hua Huang , Pin-Wei Chen , Keh-Tsong Li , Shao-Yang Wang , Chia-Hui Kuo , Hung-Chih Ko , Yun-I Chou , Yen-Yang Chou , Chien-Ho Yu , Chi-Cheng Ju , Ying-Jui Chen
IPC: G06T5/50 , G06T5/73 , G06T7/33 , H04N5/265 , H04N23/741
CPC classification number: G06T5/50 , G06T5/73 , G06T7/337 , H04N5/265 , H04N23/741 , G06T2207/10024 , G06T2207/10048 , G06T2207/20201 , G06T2207/20208 , G06T2207/20221 , G06T2207/30232
Abstract: An image calibration method is applied to an image calibration device includes an image receiver and an operation processor. The image calibration method of providing a motion deblur function includes driving a first camera to capture a first image having a first exposure time, driving a second camera disposed adjacent to the first camera to capture a second image having a second exposure time different from and at least partly overlapped with the first exposure time, and fusing a first feature of the first image and a second feature of the second image to generate a fusion image.
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公开(公告)号:US20200303352A1
公开(公告)日:2020-09-24
申请号:US16899335
申请日:2020-06-11
Applicant: MediaTek Inc.
Inventor: Tzu-Hung Lin , Yu-Hua Huang , Wei-Che Huang , Ming-Tzong Yang
IPC: H01L25/065 , H01L23/00
Abstract: A package structure comprising: a substrate, having at least one conductive units provided at a first surface of the substrate; at least one first die, provided on a second surface of the substrate; a connecting layer, provided on the first die; a second die, provided on the connecting layer, wherein the connecting layer comprises at least one bump for connecting the first die; and at least one bonding wire. The connecting layer has a first touch side and a second touch side, the first touch side contacts a first surface of the first die and the second touch side contacts a second surface of the second die, an area of the first touch side is smaller than which for the first surface of the first die, and a size of the first die equals to which of the second die.
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公开(公告)号:US09859192B2
公开(公告)日:2018-01-02
申请号:US15066256
申请日:2016-03-10
Applicant: MediaTek Inc.
Inventor: Ming-Tzong Yang , Yu-Hua Huang
IPC: H01L21/70 , H01L23/48 , H01L27/02 , H01L27/092 , H01L23/532
CPC classification number: H01L23/481 , H01L23/53295 , H01L27/0207 , H01L27/092
Abstract: A semiconductor structure includes a semiconductor substrate and a conductive element formed in a portion of the semiconductor substrate. The semiconductor structure further includes a plurality of insulating elements formed in portions of the semiconductor substrate at a first region surrounding the conductive element and a semiconductor device formed over a portion of the semiconductor substrate at a second region adjacent to the first region. The first region is formed between the conductive element and the second region.
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公开(公告)号:US09524948B2
公开(公告)日:2016-12-20
申请号:US14040732
申请日:2013-09-30
Applicant: MEDIATEK INC.
Inventor: Tzu-Hung Lin , Yu-Hua Huang , Wei-Che Huang , Ming-Tzong Yang
IPC: H01L23/48 , H01L23/00 , H01L25/065 , H01L25/18
CPC classification number: H01L25/0657 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/18 , H01L2224/16145 , H01L2224/32014 , H01L2224/32058 , H01L2224/32105 , H01L2224/32145 , H01L2224/48227 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2225/0651 , H01L2225/06513 , H01L2225/06562 , H01L2225/06565 , H01L2225/06568 , H01L2924/00014 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/00 , H01L2224/05599 , H01L2224/85399
Abstract: A package structure, comprising: a substrate, having at least one conductive units provided at a first surface of the substrate; at least one first die, provided on a second surface of the substrate; a connecting layer; a second die, provided on the connecting layer, wherein the connecting layer comprises at least one bump for connecting the first die to the second die such that the first die and the second die are electrically connected; and at least one bonding wire, for electrically connecting the first die to the conductive units or the substrate.
Abstract translation: 一种封装结构,包括:衬底,其具有设置在所述衬底的第一表面处的至少一个导电单元; 至少一个第一管芯,设置在所述衬底的第二表面上; 连接层; 设置在所述连接层上的第二管芯,其中所述连接层包括用于将所述第一管芯连接到所述第二管芯的至少一个突起,使得所述第一管芯和所述第二管芯电连接; 以及用于将第一管芯电连接到导电单元或基板的至少一个接合线。
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公开(公告)号:US11805054B1
公开(公告)日:2023-10-31
申请号:US17724043
申请日:2022-04-19
Applicant: MEDIATEK INC.
Inventor: Yu-Hua Huang , Ming-Jun Lin , Huei-Jing Yang , Kai-Wen Liu , Yuan-Ting Huang
IPC: H04L61/256 , H04L45/00
CPC classification number: H04L45/56 , H04L61/256
Abstract: A method of routing data packets for a router is provided. The router includes a software network address translator (NAT) and a hardware NAT. The method includes routing, by the software NAT, a first data packet based on a routing rule stored in the software NAT, wherein the software NAT has a routing rule removing function to remove the routing rule stored in the software NAT; sending, by the software NAT, the routing rule to the hardware NAT; storing the routing rule, by the hardware NAT, in the hardware NAT; and routing, by the hardware NAT instead of the software NAT, a second data packet based on the routing rule stored in the hardware NAT. The routing rule removing function of the software NAT for the routing rule stored in the software NAT is disabled.
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公开(公告)号:US09786560B2
公开(公告)日:2017-10-10
申请号:US15365435
申请日:2016-11-30
Applicant: MediaTek Inc.
Inventor: Cheng-Chou Hung , Ming-Tzong Yang , Tung-Hsing Lee , Wei-Che Huang , Yu-Hua Huang , Tzu-Hung Lin
IPC: H01L23/48 , H01L21/768 , H01L29/06 , H01L21/761 , H01L23/00 , H01L23/498
CPC classification number: H01L21/76898 , H01L21/761 , H01L23/481 , H01L23/49816 , H01L23/49827 , H01L24/11 , H01L29/0619 , H01L29/0623 , H01L2224/13 , H01L2924/0002 , H01L2924/00
Abstract: A method for forming a semiconductor package structure is provided. The method for forming a semiconductor package structure includes providing a substrate, wherein the substrate has a front side and a back side, forming a first guard ring doped region and a second guard ring doped region in the substrate, wherein the first guard ring doped region and the second guard ring doped region have different conductive types, forming a trench through the substrate from a back side of the substrate, conformally forming an insulating layer lining the back side of the substrate, a bottom surface and sidewalls of the trench, removing a portion of the insulating layer on the back side of the substrate to form a through via, and forming a conductive material in the through via, wherein a through silicon via (TSV) interconnect structure is formed by the insulating layer and the conductive material.
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