公开(公告)号：US20170352728A1

公开(公告)日：2017-12-07

申请号：US15686838

申请日：2017-08-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Do-Sun Lee ,  Chang-Woo Sohn ,  Chul-Sung Kim ,  Shigenobu Maeda ,  Young-Moon Choi ,  Hyo-Seok Choi ,  Sang-Jin Hyun

IPC: H01L29/08 ,  H01L29/417 ,  H01L29/165 ,  H01L29/161 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L29/0847 ,  H01L29/0653 ,  H01L29/161 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/7848 ,  H01L29/785

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate. The semiconductor device includes an isolation layer defining active portions of the substrate that are spaced apart from each other in a direction. The semiconductor device includes an epitaxial layer on the active portions. The semiconductor device includes a metal silicide layer on the epitaxial layer. Moreover, the semiconductor device includes a contact structure that only partially overlaps the metal silicide layer on the epitaxial layer. Related methods of forming semiconductor devices are also provided.

公开(公告)号：US09728465B2

公开(公告)日：2017-08-08

申请号：US14873456

申请日：2015-10-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joon-Gon Lee ,  Ryuji Tomita ,  Sang-Jin Hyun ,  Kuo Tai Huang

IPC: H01L21/8238 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/823814 ,  H01L21/823821 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7833

Abstract: In a method of manufacturing a semiconductor device, a first gate structure and a second gate structure are formed on a substrate in a first region and a second region, respectively. A first semiconductor pattern including germanium is formed in the first region on the substrate. A first metal layer is formed on the substrate to cover the first semiconductor pattern. A first heat treatment process is performed such that the first semiconductor pattern and the first metal layer react with each other to form a first metal-semiconductor composite pattern in the first region and a semiconductor material of the substrate and the first metal layer react with each other to form a second metal-semiconductor composite pattern in the second region. The first metal-semiconductor composite pattern is removed from the substrate. A second metal layer is formed on the substrate to cover the second metal-semiconductor composite pattern. The second metal layer includes a material different from the first metal layer. A second heat treatment process is performed such that the substrate and the second metal layer react with each other to form a third metal-semiconductor composite pattern.

公开(公告)号：US20170125408A1

公开(公告)日：2017-05-04

申请号：US15335984

申请日：2016-10-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Moon-Kyu PARK ,  Jae-Yeol Song ,  Hoon-Joo Na ,  Yoon-Tae Hwang ,  Ki-Joong Yoon ,  Sang-Jin Hyun

IPC: H01L27/088 ,  H01L29/49 ,  H01L21/8234 ,  H01L29/78

CPC classification number: H01L27/088 ,  H01L21/02345 ,  H01L21/02356 ,  H01L21/823431 ,  H01L21/82345 ,  H01L21/823456 ,  H01L21/823462 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823842 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/435 ,  H01L29/4941 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/4983 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/7854 ,  H01L29/7856

Abstract: Semiconductor device having less defects in a gate insulating film and improved reliability and methods of forming the semiconductor devices are provided. The semiconductor devices may include a gate insulating film on a substrate and a gate electrode structure on the gate insulating film. The gate electrode structure may include a lower conductive film, a silicon oxide film, and an upper conductive film sequentially stacked on the gate insulating film. The lower conductive film may include a barrier metal layer.

公开(公告)号：US20210020631A1

公开(公告)日：2021-01-21

申请号：US17030556

申请日：2020-09-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Moon-Kyu Park ,  Jae-Yeol Song ,  Hoon-Joo Na ,  Yoon-Tae Hwang ,  Ki-Joong Yoon ,  Sang-Jin Hyun

IPC: H01L27/088 ,  H01L21/8238 ,  H01L21/02 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/43 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78

Abstract: Semiconductor device having less defects in a gate insulating film and improved reliability and methods of forming the semiconductor devices are provided. The semiconductor devices may include a gate insulating film on a substrate and a gate electrode structure on the gate insulating film. The gate electrode structure may include a lower conductive film, a silicon oxide film, and an upper conductive film sequentially stacked on the gate insulating film. The lower conductive film may include a barrier metal layer.

公开(公告)号：US10566433B2

公开(公告)日：2020-02-18

申请号：US16030291

申请日：2018-07-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-Hyuk Yim ,  Wan-Don Kim ,  Jong-Han Lee ,  Hyung-Suk Jung ,  Sang-Jin Hyun

IPC: H01L29/423 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/8238 ,  H01L29/66 ,  H01L27/092

Abstract: A semiconductor device includes a substrate having a first region and a second region, a first transistor formed in the first region and formed by a first gate line including a first lower metal-containing layer and a first upper metal-containing layer, and a second transistor formed in the second region and formed by a second gate line having an equal width to that of the first gate line and including a second lower metal-containing layer and a second upper metal-containing layer on the second upper metal-containing layer, wherein each of an uppermost end of the first upper metal-containing layer and an uppermost end of the second lower metal-containing layer has a higher level than an uppermost end of the first lower metal-containing layer.

公开(公告)号：US10403717B2

公开(公告)日：2019-09-03

申请号：US15686838

申请日：2017-08-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Do-Sun Lee ,  Chang-Woo Sohn ,  Chul-Sung Kim ,  Shigenobu Maeda ,  Young-Moon Choi ,  Hyo-Seok Choi ,  Sang-Jin Hyun

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/161 ,  H01L29/165 ,  H01L29/78 ,  H01L29/417

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate. The semiconductor device includes an isolation layer defining active portions of the substrate that are spaced apart from each other in a direction. The semiconductor device includes an epitaxial layer on the active portions. The semiconductor device includes a metal silicide layer on the epitaxial layer. Moreover, the semiconductor device includes a contact structure that only partially overlaps the metal silicide layer on the epitaxial layer. Related methods of forming semiconductor devices are also provided.

公开(公告)号：US10361194B2

公开(公告)日：2019-07-23

申请号：US15335984

申请日：2016-10-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Moon-Kyu Park ,  Jae-Yeol Song ,  Hoon-Joo Na ,  Yoon-Tae Hwang ,  Ki-Joong Yoon ,  Sang-Jin Hyun

IPC: H01L21/02 ,  H01L29/43 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78 ,  H01L27/088 ,  H01L27/092 ,  H01L21/8234 ,  H01L21/8238

Abstract: Semiconductor device having less defects in a gate insulating film and improved reliability and methods of forming the semiconductor devices are provided. The semiconductor devices may include a gate insulating film on a substrate and a gate electrode structure on the gate insulating film. The gate electrode structure may include a lower conductive film, a silicon oxide film, and an upper conductive film sequentially stacked on the gate insulating film. The lower conductive film may include a barrier metal layer.

公开(公告)号：US20190043959A1

公开(公告)日：2019-02-07

申请号：US15871628

申请日：2018-01-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joon-Gon Lee ,  Ryuji Tomita ,  Chul-Sung Kim ,  Sang-Jin Hyun

IPC: H01L29/417 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66

Abstract: An integrated circuit device includes a substrate, a gate structure, a spacer structure, a source/drain region, and a first contact structure. The substrate includes a fin-type active region. The gate structure intersects with the fin-type active region on the substrate, and has two sides and two side walls. The spacer structure is disposed on both side walls of the gate structure and includes a first spacer layer contacting at least a portion of both side walls of the gate structure and a second spacer layer disposed on the first spacer layer and having a lower dielectric constant than a dielectric constant of the first spacer layer. The source/drain region is disposed on both sides of the gate structure. The first contact structure is electrically connected to the source/drain region and includes a first contact plug disposed on the source/drain region and a first metallic capping layer disposed on the first contact plug.

公开(公告)号：US10032641B2

公开(公告)日：2018-07-24

申请号：US15137946

申请日：2016-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dae-Young Kwak ,  Kyung-Seok Oh ,  Seung-Jae Lee ,  Sang-Jin Hyun

IPC: H01L27/088 ,  H01L21/31 ,  H01L21/8234

CPC classification number: H01L21/31 ,  H01L21/823431 ,  H01L27/0886

Abstract: A semiconductor device is provided as follows. A first fin-type pattern is disposed on a substrate. A first field insulating film is adjacent to a sidewall of the first fin-type pattern. A second field insulating film is adjacent to a sidewall of the first field insulating film. The first field insulating film is interposed between the first fin-type pattern and the second field insulating film. The second field insulating film comprises a first region and a second region. The first region is closer to the sidewall of the first field insulating film. A height from a bottom of the second field insulating film to an upper surface of the second region is larger than a height from the bottom of the second field insulating film to an upper surface of the first region.

公开(公告)号：US20140203335A1

公开(公告)日：2014-07-24

申请号：US14155579

申请日：2014-01-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Yeol Song ,  June-Hee Lee ,  Hye-Lan Lee ,  Sang-Jin Hyun ,  Sang-Bom Kang

IPC: H01L29/78 ,  H01L21/28

CPC classification number: H01L29/78 ,  H01L21/28088 ,  H01L21/823842 ,  H01L27/1104 ,  H01L29/51 ,  H01L29/6681

Abstract: A semiconductor device includes an insulating film on a substrate and including a trench, a gate insulating film in the trench, a DIT (Density of Interface Trap) improvement film on the gate insulating film to improve a DIT of the substrate, and a first conductivity type work function adjustment film on the DIT improvement film. Related methods of forming semiconductor devices are also disclosed.

Abstract translation: 半导体器件包括在衬底上的绝缘膜，其包括沟槽，沟槽中的栅极绝缘膜，栅极绝缘膜上的DIT（界面陷阱密度）改进膜，​​以改善衬底的DIT，以及第一导电性 DIT改进膜上的工作功能调整膜。 还公开了形成半导体器件的相关方法。