公开(公告)号：US10734280B2

公开(公告)日：2020-08-04

申请号：US16154896

申请日：2018-10-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-hyuk Yim ,  Kuo Tai Huang ,  Wan-don Kim ,  Sang-jin Hyun

IPC: H01L21/768 ,  H01L23/522 ,  H01L29/66 ,  H01L29/417 ,  H01L23/532 ,  H01L29/78

Abstract: An integrated circuit (IC) device includes a substrate having a fin-type active region extending in a first direction, a gate structure intersecting the fin-type active region on the substrate, the gate structure extending in a second direction perpendicular to the first direction and parallel to a top surface of the substrate, source and drain regions on both sides of the gate structure, and a first contact structure electrically connected to one of the source and drain regions, the first contact structure including a first contact plug including a first material and a first wetting layer surrounding the first contact plug, the first wetting layer including a second material having a lattice constant that differs from a lattice constant of the first material by about 10% or less.

公开(公告)号：US20190115451A1

公开(公告)日：2019-04-18

申请号：US16051635

申请日：2018-08-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joon Gon Lee ,  Kuo Tai Huang ,  Ryuji Tomita

IPC: H01L29/66 ,  H01L21/8238 ,  H01L21/8234 ,  H01L21/308 ,  H01L23/532 ,  H01L29/08 ,  H01L29/423

Abstract: Methods of fabricating a semiconductor device are provided. The methods may include forming an active pattern on a substrate, forming a gate electrode traversing the active pattern on the active pattern, forming a recess adjacent to a sidewall of the gate electrode in the active pattern, and performing a chemical vapor deposition process using a source gas and a doping gas to form a source/drain region in the recess. The source gas may include a silicon precursor and a germanium precursor, and the doping gas may include a gallium precursor and a boron precursor.

公开(公告)号：US09728465B2

公开(公告)日：2017-08-08

申请号：US14873456

申请日：2015-10-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joon-Gon Lee ,  Ryuji Tomita ,  Sang-Jin Hyun ,  Kuo Tai Huang

IPC: H01L21/8238 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/823814 ,  H01L21/823821 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7833

Abstract: In a method of manufacturing a semiconductor device, a first gate structure and a second gate structure are formed on a substrate in a first region and a second region, respectively. A first semiconductor pattern including germanium is formed in the first region on the substrate. A first metal layer is formed on the substrate to cover the first semiconductor pattern. A first heat treatment process is performed such that the first semiconductor pattern and the first metal layer react with each other to form a first metal-semiconductor composite pattern in the first region and a semiconductor material of the substrate and the first metal layer react with each other to form a second metal-semiconductor composite pattern in the second region. The first metal-semiconductor composite pattern is removed from the substrate. A second metal layer is formed on the substrate to cover the second metal-semiconductor composite pattern. The second metal layer includes a material different from the first metal layer. A second heat treatment process is performed such that the substrate and the second metal layer react with each other to form a third metal-semiconductor composite pattern.