公开(公告)号：US09006902B2

公开(公告)日：2015-04-14

申请号：US14161034

申请日：2014-01-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-Il Choi ,  Su-Kyoung Kim ,  Kun-Sang Park ,  Seong-Min Son ,  Jin-Ho An ,  Do-Sun Lee

IPC: H01L23/48 ,  H01L21/4763 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L23/5226 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L25/0657 ,  H01L2224/02351 ,  H01L2224/03462 ,  H01L2224/0384 ,  H01L2224/0401 ,  H01L2224/05547 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/13 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

Abstract: A semiconductor device is provided having an insulating layer on a semiconductor substrate. The insulating layer and the semiconductor substrate define a through hole penetrating the semiconductor substrate and the insulating layer. A through electrode is provided in the through hole. A spacer is provided between the semiconductor substrate and the through electrode. An interconnection in continuity with the through electrode is provided on the insulating layer. A barrier layer covering a side and a bottom of the interconnection and a side of the through electrode is provided and the barrier layer is formed in one body.

Abstract translation: 提供了半导体器件，其在半导体衬底上具有绝缘层。 绝缘层和半导体衬底限定穿透半导体衬底和绝缘层的通孔。 通孔中设置有贯通电极。 在半导体衬底和贯通电极之间设置间隔物。 在绝缘层上设置与通孔电连接的互连。 设置覆盖互连的一侧和底部的阻挡层和通孔的一侧，并且阻挡层形成在一体中。

公开(公告)号：US10262937B2

公开(公告)日：2019-04-16

申请号：US15679444

申请日：2017-08-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joon-gon Lee ,  Ryuji Tomita ,  Do-Sun Lee ,  Chul-sung Kim ,  Do-hyun Lee

IPC: H01L23/522 ,  H01L29/78 ,  H01L23/532 ,  H01L21/768

Abstract: An integrated circuit device includes at least one fin-type active region, a gate line on the at least one fin-type active region, and a source/drain region on the at least one fin-type active region at at least one side of the gate line. A first conductive plug is connected to the source/drain region and includes cobalt. A second conductive plug is connected to the gate line and spaced apart from the first conductive plug. A third conductive plug is connected to each of the first conductive plug and the second conductive plug. The third conductive plug electrically connects the first conductive plug and the second conductive plug.

公开(公告)号：US20170352728A1

公开(公告)日：2017-12-07

申请号：US15686838

申请日：2017-08-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Do-Sun Lee ,  Chang-Woo Sohn ,  Chul-Sung Kim ,  Shigenobu Maeda ,  Young-Moon Choi ,  Hyo-Seok Choi ,  Sang-Jin Hyun

IPC: H01L29/08 ,  H01L29/417 ,  H01L29/165 ,  H01L29/161 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L29/0847 ,  H01L29/0653 ,  H01L29/161 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/7848 ,  H01L29/785

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate. The semiconductor device includes an isolation layer defining active portions of the substrate that are spaced apart from each other in a direction. The semiconductor device includes an epitaxial layer on the active portions. The semiconductor device includes a metal silicide layer on the epitaxial layer. Moreover, the semiconductor device includes a contact structure that only partially overlaps the metal silicide layer on the epitaxial layer. Related methods of forming semiconductor devices are also provided.

公开(公告)号：US10403717B2

公开(公告)日：2019-09-03

申请号：US15686838

申请日：2017-08-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Do-Sun Lee ,  Chang-Woo Sohn ,  Chul-Sung Kim ,  Shigenobu Maeda ,  Young-Moon Choi ,  Hyo-Seok Choi ,  Sang-Jin Hyun

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/161 ,  H01L29/165 ,  H01L29/78 ,  H01L29/417

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate. The semiconductor device includes an isolation layer defining active portions of the substrate that are spaced apart from each other in a direction. The semiconductor device includes an epitaxial layer on the active portions. The semiconductor device includes a metal silicide layer on the epitaxial layer. Moreover, the semiconductor device includes a contact structure that only partially overlaps the metal silicide layer on the epitaxial layer. Related methods of forming semiconductor devices are also provided.

公开(公告)号：US09728601B2

公开(公告)日：2017-08-08

申请号：US15058466

申请日：2016-03-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Woo Kim ,  Shigenobu Maeda ,  Young-Moon Choi ,  Yong-Bum Kwon ,  Chang-Woo Sohn ,  Do-Sun Lee

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L27/092 ,  H01L27/088 ,  H01L21/8238

CPC classification number: H01L21/823431 ,  H01L21/823418 ,  H01L21/823814 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/785

Abstract: Semiconductor devices may include a plurality of active fins each extending in a first direction on a substrate, a gate structure extending on the active fins in a second direction, and a first source/drain layer on first active fins of the active fins adjacent the gate structure. At least one of two opposing sidewalls of a cross-section of the first source/drain layer taken along the second direction may include a curved portion having a slope with respect to an upper surface of the substrate. The slope may decrease from a bottom toward a top thereof.

公开(公告)号：US08860221B2

公开(公告)日：2014-10-14

申请号：US13685174

申请日：2012-11-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kun-Sang Park ,  Byung-Lyul Park ,  Su-Kyoung Kim ,  Kwang-Jin Moon ,  Suk-Chul Bang ,  Do-Sun Lee ,  Dong-Chan Lim ,  Gil-Heyun Choi

IPC: H01L23/00 ,  H01L25/065

CPC classification number: H01L24/28 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L25/0655 ,  H01L2224/05009 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05547 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/08147 ,  H01L2224/08148 ,  H01L2224/0903 ,  H01L2224/8001 ,  H01L2224/80203 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/04941 ,  H01L2924/04953

Abstract: Provided are electrode-connecting structures or semiconductor devices, including a lower device including a lower substrate, a lower insulating layer formed on the lower substrate, and a lower electrode structure formed in the lower insulating layer, wherein the lower electrode structure includes a lower electrode barrier layer and a lower metal electrode formed on the lower electrode barrier layer, and an upper device including an upper substrate, an upper insulating layer formed under the upper substrate, and an upper electrode structure formed in the upper insulating layer, wherein the upper electrode structure includes an upper electrode barrier layer extending from the inside of the upper insulating layer under a bottom surface thereof and an upper metal electrode formed on the upper electrode barrier layer. The lower metal electrode is in direct contact with the upper metal electrode.

Abstract translation: 提供了电极连接结构或半导体器件，包括下部器件，包括下部衬底，形成在下部衬底上的下部绝缘层和形成在下部绝缘层中的下部电极结构，其中下部电极结构包括下部电极 阻挡层和形成在下电极阻挡层上的下金属电极，以及上装置，包括上基板，形成在上基板下的上绝缘层和形成在上绝缘层中的上电极结构，上电极 结构包括从其下表面上的上绝缘层的内部延伸的上电极阻挡层和形成在上电极阻挡层上的上金属电极。 下部金属电极与上部金属电极直接接触。

公开(公告)号：US10242917B2

公开(公告)日：2019-03-26

申请号：US15634343

申请日：2017-06-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Woo Kim ,  Shigenobu Maeda ,  Young-Moon Choi ,  Yong-Bum Kwon ,  Chang-Woo Sohn ,  Do-Sun Lee

IPC: H01L21/8234 ,  H01L29/06 ,  H01L29/78 ,  H01L27/088 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L27/092 ,  H01L29/66 ,  H01L21/8238

Abstract: Semiconductor devices may include a plurality of active fins each extending in a first direction on a substrate, a gate structure extending on the active fins in a second direction, and a first source/drain layer on first active fins of the active fins adjacent the gate structure. At least one of two opposing sidewalls of a cross-section of the first source/drain layer taken along the second direction may include a curved portion having a slope with respect to an upper surface of the substrate. The slope may decrease from a bottom toward a top thereof.

公开(公告)号：US20170294355A1

公开(公告)日：2017-10-12

申请号：US15634343

申请日：2017-06-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Woo KIM ,  Shigenobu Maeda ,  Young-Moon Choi ,  Yong-Bum Kwon ,  Chang-Woo Sohn ,  Do-Sun Lee

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/66

CPC classification number: H01L21/823431 ,  H01L21/823418 ,  H01L21/823814 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/785

Abstract: Semiconductor devices may include a plurality of active fins each extending in a first direction on a substrate, a gate structure extending on the active fins in a second direction, and a first source/drain layer on first active fins of the active fins adjacent the gate structure. At least one of two opposing sidewalls of a cross-section of the first source/drain layer taken along the second direction may include a curved portion having a slope with respect to an upper surface of the substrate. The slope may decrease from a bottom toward a top thereof.

公开(公告)号：US09496218B2

公开(公告)日：2016-11-15

申请号：US13919580

申请日：2013-06-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Do-Sun Lee ,  Kun-Sang Park ,  Byung-Lyul Park ,  Seong-min Son ,  Gil-heyun Choi

IPC: H01L23/522 ,  H01L23/48 ,  H01L21/768 ,  H01L21/288 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L23/5226 ,  H01L21/2885 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05009 ,  H01L2224/06181 ,  H01L2224/13 ,  H01L2224/16146 ,  H01L2224/73104 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/00

Abstract: An integrated circuit device including a through-silicon-via (TSV) structure and methods of manufacturing the same are provided. The integrated circuit device may include the TSV structure penetrating through a semiconductor structure. The TSV structure may include a first through electrode unit including impurities of a first concentration and a second through electrode unit including impurities of a second concentration greater than the first concentration.

Abstract translation: 提供了一种包括贯穿硅通孔（TSV）结构的集成电路器件及其制造方法。 集成电路器件可以包括穿透半导体结构的TSV结构。 TSV结构可以包括包括第一浓度的杂质的第一通过电极单元和包括大于第一浓度的第二浓度的杂质的第二通过电极单元。