公开(公告)号：US09728601B2

公开(公告)日：2017-08-08

申请号：US15058466

申请日：2016-03-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Woo Kim ,  Shigenobu Maeda ,  Young-Moon Choi ,  Yong-Bum Kwon ,  Chang-Woo Sohn ,  Do-Sun Lee

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L27/092 ,  H01L27/088 ,  H01L21/8238

CPC classification number: H01L21/823431 ,  H01L21/823418 ,  H01L21/823814 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/785

Abstract: Semiconductor devices may include a plurality of active fins each extending in a first direction on a substrate, a gate structure extending on the active fins in a second direction, and a first source/drain layer on first active fins of the active fins adjacent the gate structure. At least one of two opposing sidewalls of a cross-section of the first source/drain layer taken along the second direction may include a curved portion having a slope with respect to an upper surface of the substrate. The slope may decrease from a bottom toward a top thereof.

公开(公告)号：US10242917B2

公开(公告)日：2019-03-26

申请号：US15634343

申请日：2017-06-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Woo Kim ,  Shigenobu Maeda ,  Young-Moon Choi ,  Yong-Bum Kwon ,  Chang-Woo Sohn ,  Do-Sun Lee

IPC: H01L21/8234 ,  H01L29/06 ,  H01L29/78 ,  H01L27/088 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L27/092 ,  H01L29/66 ,  H01L21/8238

Abstract: Semiconductor devices may include a plurality of active fins each extending in a first direction on a substrate, a gate structure extending on the active fins in a second direction, and a first source/drain layer on first active fins of the active fins adjacent the gate structure. At least one of two opposing sidewalls of a cross-section of the first source/drain layer taken along the second direction may include a curved portion having a slope with respect to an upper surface of the substrate. The slope may decrease from a bottom toward a top thereof.

公开(公告)号：US20170294355A1

公开(公告)日：2017-10-12

申请号：US15634343

申请日：2017-06-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Woo KIM ,  Shigenobu Maeda ,  Young-Moon Choi ,  Yong-Bum Kwon ,  Chang-Woo Sohn ,  Do-Sun Lee

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/66

CPC classification number: H01L21/823431 ,  H01L21/823418 ,  H01L21/823814 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/785

Abstract: Semiconductor devices may include a plurality of active fins each extending in a first direction on a substrate, a gate structure extending on the active fins in a second direction, and a first source/drain layer on first active fins of the active fins adjacent the gate structure. At least one of two opposing sidewalls of a cross-section of the first source/drain layer taken along the second direction may include a curved portion having a slope with respect to an upper surface of the substrate. The slope may decrease from a bottom toward a top thereof.

公开(公告)号：US09337105B1

公开(公告)日：2016-05-10

申请号：US14732884

申请日：2015-06-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yong-Bum Kwon ,  Sung-Sam Lee

IPC: H01L21/00 ,  H01L21/8234 ,  H01L21/02 ,  H01L21/762 ,  H01L21/768 ,  H01L21/311 ,  H01L29/66 ,  H01L27/108

CPC classification number: H01L21/823475 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76224 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76879 ,  H01L21/76897 ,  H01L21/845 ,  H01L27/10897 ,  H01L27/1211 ,  H01L29/165 ,  H01L29/66515 ,  H01L29/66575 ,  H01L29/7848

Abstract: A method for fabricating a semiconductor device is provided. The method for fabricating a semiconductor device includes forming transistors on a semiconductor substrate, each of the transistors having a gate structure and source/drain regions, forming an oxide film on the transistors, forming a mask film pattern on the oxide film, the mask film pattern comprising a first pattern having a first width and a second pattern having a second width different from the first width, removing a part of the oxide film using the mask film pattern to form first and second trenches, filling the first and second trenches with a nitride film, removing the rest part of the oxide film to form third and fourth trenches, and forming conductive contacts by filling the third and fourth trenches. A top width of each of the third trenches is equal to the first width, and a top width of each of the fourth trenches is equal to the second width.

Abstract translation: 提供一种制造半导体器件的方法。 半导体器件的制造方法包括在半导体衬底上形成晶体管，每个晶体管具有栅极结构和源极/漏极区域，在晶体管上形成氧化物膜，在氧化膜上形成掩模膜图案，掩模膜 图案包括具有第一宽度的第一图案和具有不同于第一宽度的第二宽度的第二图案，使用掩模膜图案去除一部分氧化膜以形成第一和第二沟槽，用第一和第二沟槽填充第一和第二沟槽 去除氧化膜的其余部分以形成第三和第四沟槽，并且通过填充第三和第四沟槽形成导电接触。 每个第三沟槽的顶部宽度等于第一宽度，并且每个第四沟槽的顶部宽度等于第二宽度。