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公开(公告)号:US12082421B2
公开(公告)日:2024-09-03
申请号:US18324245
申请日:2023-05-26
发明人: Tzu-Yu Chen , Sheng-Hung Shih , Fu-Chen Chang , Kuo-Chi Tu , Wen-Ting Chu
CPC分类号: H10B53/30 , H01L21/0234 , H01L21/02356 , H01L28/60
摘要: A semiconductor device includes a bottom electrode, a top electrode, a sidewall spacer, and a data storage element. The sidewall spacer is disposed aside the top electrode. The data storage element is located between the bottom electrode and the top electrode, and includes a ferroelectric material. The data storage element has a peripheral region which is disposed beneath the sidewall spacer and which has at least 60% of ferroelectric phase. A method for manufacturing the semiconductor device and a method for transforming a non-ferroelectric phase of a ferroelectric material to a ferroelectric phase are also disclosed.
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公开(公告)号:US20240249937A1
公开(公告)日:2024-07-25
申请号:US18625405
申请日:2024-04-03
申请人: SK hynix Inc.
发明人: Won Tae KOO , Mir IM
IPC分类号: H01L21/02
CPC分类号: H01L21/02356 , H01L21/02354
摘要: In a method of manufacturing a semiconductor device, a plurality of pattern structures disposed on a substrate and having sidewall surfaces extending in a direction perpendicular to a surface of the substrate are provided. An amorphous dielectric layer is formed on at least the sidewall surfaces of the plurality of pattern structures. A plurality of metal particles are distributed on the amorphous dielectric layer. A first crystalline dielectric layer by thermally treating the amorphous dielectric layer using laser light. In thermally treating the amorphous dielectric layer, the laser light is irradiated onto the amorphous dielectric layer from upper sides of the plurality of pattern structures, wherein the irradiated laser light is scattered from the plurality of metal particles.
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公开(公告)号:US11908918B2
公开(公告)日:2024-02-20
申请号:US18059660
申请日:2022-11-29
发明人: Jinseong Heo , Yunseong Lee , Sanghyun Jo , Keunwook Shin , Hyeonjin Shin
CPC分类号: H01L29/513 , H01L21/0228 , H01L21/02115 , H01L21/02164 , H01L21/02178 , H01L21/02181 , H01L21/02189 , H01L21/02356 , H01L29/516
摘要: Provided are electronic devices and methods of manufacturing the same. An electronic device may include a substrate, a gate electrode on the substrate, a ferroelectric layer between the substrate and the gate electrode, and a carbon layer between the substrate and the ferroelectric layer. The carbon layer may have an sp2 bonding structure.
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公开(公告)号:US20240006489A1
公开(公告)日:2024-01-04
申请号:US18367843
申请日:2023-09-13
申请人: Intel Corporation
发明人: Aaron LILAK , Rishabh MEHANDRU , Willy RACHMADY , Harold KENNEL , Tahir GHANI
IPC分类号: H01L29/08 , H01L21/02 , H01L21/8238
CPC分类号: H01L29/0847 , H01L21/02356 , H01L21/02592 , H01L21/823871 , H01L21/823814 , H01L21/823828 , H01L21/823807
摘要: A device is disclosed. The device includes a channel, a first source-drain region adjacent a first portion of the channel, the first source-drain region including a first crystalline portion that includes a first region of metastable dopants, a second source-drain region adjacent a second portion of the channel, the second source-drain region including a second crystalline portion that includes a second region of metastable dopants. A gate conductor is on the channel.
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公开(公告)号:US20230386827A1
公开(公告)日:2023-11-30
申请号:US18446953
申请日:2023-08-09
发明人: Chun-Yen Peng , Te-Yang Lai , Sai-Hooi Yeong , Chi On Chui
IPC分类号: H01L21/02 , H01L29/66 , H01L21/768 , H01L29/78 , H01L29/423
CPC分类号: H01L21/02181 , H01L29/66795 , H01L21/76829 , H01L21/02356 , H01L21/02667 , H01L29/785 , H01L29/42364 , H01L21/76871 , H01L21/02609 , H01L29/66545
摘要: A method for forming a crystalline high-k dielectric layer and controlling the crystalline phase and orientation of the crystal growth of the high-k dielectric layer during an anneal process. The crystalline phase and orientation of the crystal growth of the dielectric layer may be controlled using seeding sections of the dielectric layer serving as nucleation sites and using a capping layer mask during the anneal process. The location of the nucleation sites and the arrangement of the capping layer allow the orientation and phase of the crystal growth of the dielectric layer to be controlled during the anneal process. Based on the dopants and the process controls used the phase can be modified to increase the permittivity and/or the ferroelectric property of the dielectric layer.
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公开(公告)号:US20230352296A1
公开(公告)日:2023-11-02
申请号:US17732873
申请日:2022-04-29
发明人: Oreste MADIA , Georgios VELLIANITIS
CPC分类号: H01L21/02181 , H01L21/02356 , H01L29/40111 , H01L29/517
摘要: A device structure and a formation method are provided. The method includes forming a first carbon-containing layer over a substrate and forming a hafnium-containing oxide layer over the first carbon-containing layer. The method also includes forming a second carbon-containing layer over the hafnium-containing oxide layer. The method further includes crystallizing the hafnium-containing oxide layer while the hafnium-containing oxide layer is between the first carbon-containing layer and the second carbon-containing layer.
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公开(公告)号:US20230335406A1
公开(公告)日:2023-10-19
申请号:US18341410
申请日:2023-06-26
发明人: Wen-Ju Chen , Chung-Ting Ko , Wan-Chen Hsieh , Chun-Ming Lung , Tai-Chun Huang , Chi On Chui
IPC分类号: H01L21/308 , H01L21/8238 , H01L29/06 , H01L29/417 , H01L29/423 , H01L29/786 , H01L21/02 , H01L21/311 , H01L21/3065 , H01L29/66 , H01L27/092
CPC分类号: H01L21/3085 , H01L21/823871 , H01L29/0673 , H01L29/41733 , H01L29/42392 , H01L29/78618 , H01L29/78696 , H01L21/02603 , H01L21/02521 , H01L21/02529 , H01L21/02532 , H01L21/31111 , H01L21/3065 , H01L21/3086 , H01L21/0234 , H01L21/02348 , H01L21/02356 , H01L29/66545 , H01L29/66553 , H01L29/66636 , H01L29/66742 , H01L21/823807 , H01L21/823814 , H01L21/823828 , H01L21/823864 , H01L27/092
摘要: A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.
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公开(公告)号:US11769664B2
公开(公告)日:2023-09-26
申请号:US17577073
申请日:2022-01-17
申请人: ASM IP Holding B.V.
CPC分类号: H01L21/02194 , H01L21/0228 , H01L21/02181 , H01L21/02192 , H01L21/02205 , H01L21/02356 , H01L21/28185 , H01L21/28194 , H01L29/517
摘要: A method for depositing a hafnium lanthanum oxide film on a substrate by a cyclical deposition in a reaction chamber is disclosed. The method may include: depositing a hafnium oxide film on the substrate utilizing a first sub-cycle of the cyclical deposition process and depositing a lanthanum oxide film utilizing a second sub-cycle of the cyclical deposition process.
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公开(公告)号:US20230282521A1
公开(公告)日:2023-09-07
申请号:US18318195
申请日:2023-05-16
发明人: Kun-Yu LEE , Chunyao WANG , Chi On CHUI
IPC分类号: H01L21/8234 , H01L27/088 , H01L21/02 , H01L21/762
CPC分类号: H01L21/823481 , H01L27/0886 , H01L21/02356 , H01L21/76224 , H01L21/02271 , H01L21/022 , H01L21/02148 , H01L21/02181 , H01L21/02194 , H01L21/02183 , H01L21/02192 , H01L21/02189 , H01L21/0217 , H01L21/02164 , H01L21/0214
摘要: A semiconductor device structure is provided. The semiconductor device structure includes a first fin structure and a second fin structure over a semiconductor substrate and a first epitaxial structure over the first fin structure. The semiconductor device structure also includes a second epitaxial structure over the second fin structure. The semiconductor device structure further includes a dielectric fin over the semiconductor substrate. The dielectric fin is between the first fin structure and the second fin structure. The dielectric fin has an inner portion and a protective layer. The protective layer extends along sidewalls and a bottom of the inner portion, and the protective layer has a dielectric constant higher than that of the inner portion.
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公开(公告)号:US11737276B2
公开(公告)日:2023-08-22
申请号:US17331813
申请日:2021-05-27
发明人: Sara Otsuki , Genji Nakamura , Muneyuki Otani , Kazuya Takahashi
CPC分类号: H10B43/27 , H01L21/02175 , H01L21/02178 , H01L21/02181 , H01L21/02186 , H01L21/02189 , H01L21/02194 , H01L21/02356 , H10B41/27
摘要: A method of manufacturing a semiconductor device according to the present disclosure includes forming a stack by alternately stacking insulating films and sacrificial films on a substrate; forming, in the stack, a through-hole extending in a thickness direction of the stack; forming a block insulating film, a charge trapping film, a tunnel insulating film, and a channel film on an inner surface of the through-hole in this order; forming, in the stack, a slit extending in the thickness direction of the stack separately from the through-hole; removing the sacrificial films through the slit so as to form a recess between adjacent insulating films; forming a first metal oxide film on an inner surface of the recess; forming, on the first metal oxide film, a second metal oxide film having a crystallization temperature lower than that of the first metal oxide film; and filling the recess with an electrode layer.
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