公开(公告)号：US20160218064A1

公开(公告)日：2016-07-28

申请号：US14603166

申请日：2015-01-22

Applicant: QUALCOMM Incorporated

Inventor： Chin-Kwan KIM ,  David Fraser RAE ,  Rajneesh KUMAR ,  Milind Pravin SHAH ,  Omar James BCHIR

IPC: H01L23/538 ,  H01L25/16 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00 ,  H01L23/00

CPC classification number: H01L23/5389 ,  H01L23/13 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/16 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/16227 ,  H01L2224/29006 ,  H01L2224/29007 ,  H01L2224/32105 ,  H01L2224/32106 ,  H01L2224/32225 ,  H01L2224/32227 ,  H01L2224/73253 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/83855 ,  H01L2224/92 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/15153 ,  H01L2924/19105 ,  H01L2224/81 ,  H01L2224/27 ,  H01L2224/83 ,  H01L2924/00014

Abstract: A semiconductor package may include a lower substrate with one or more electronic components attached to a surface thereof and an upper substrate with one or more cavities wherein the upper substrate is attached to the lower substrate at a plurality of connection points with the one or more electronic components fitting within a single cavity or a separate cavity for each component that allow the overall form factor of the semiconductor package to remain smaller. The plurality of connection points provide a mechanical and electrical connection between the upper and lower substrate and may include solder joints there between as well as conductive filler particles that create an adhesive reinforcement matrix when compressed for assembly.

Abstract translation: 半导体封装可以包括具有附接到其表面的一个或多个电子部件的下基板和具有一个或多个空腔的上基板，其中上基板在与一个或多个电子元件的多个连接点处附接到下基板 装配在单个空腔内的部件或用于允许半导体封装的整体形状保持较小的每个部件的单独的腔体。 多个连接点在上基板和下基板之间提供机械和电连接，并且可以包括在其之间的焊接接头以及当被压缩以组装时产生粘合剂增强矩阵的导电填料颗粒。

公开(公告)号：US20250125234A1

公开(公告)日：2025-04-17

申请号：US18486970

申请日：2023-10-13

Applicant: QUALCOMM Incorporated

Inventor： Manuel ALDRETE ,  Rajneesh KUMAR ,  Zhijie WANG ,  Aniket PATIL ,  Srikanth KULKARNI

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L25/10

Abstract: In an aspect, an integrated circuit (IC) package includes a base structure, an IC component disposed on the base structure, a plurality of interposer connection structures disposed on the base structure, and an interposer structure disposed over the IC component and the plurality of interposer connection structures. The plurality of interposer connection structures is configured to connect the base structure and the interposer structure. Each interposer connection structure of the plurality of interposer connection structures includes a bond ball portion that is connected to the base structure, and a bond wire portion that is coupled to the bond ball portion and extends toward the interposer structure. A width of the bond ball portion is greater than a width of the bond wire portion.

公开(公告)号：US20250046688A1

公开(公告)日：2025-02-06

申请号：US18363557

申请日：2023-08-01

Applicant: QUALCOMM Incorporated

Inventor： Zhijie WANG ,  Rajneesh KUMAR ,  Manuel ALDRETE ,  Sang-Jae LEE ,  Seongho KIM

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10 ,  H10B80/00

Abstract: An integrated device includes a die including active circuitry and a first set of contacts; a first substrate including a second set of contacts and a third set of contacts on a first side of the first substrate and a fourth set of contacts on a second side of the first substrate; a mold compound disposed on the first side of the first substrate and at least partially encapsulating the die; and a set of through mold conductors coupled to the third set of contacts and extending through the mold compound, wherein an upper surface of the mold compound, an upper surface of the die, and an upper surface of each of the set of through mold conductors are coplanar.

公开(公告)号：US20220131281A1

公开(公告)日：2022-04-28

申请号：US17568596

申请日：2022-01-04

Applicant: QUALCOMM Incorporated

Inventor： Milind SHAH ,  Chin-Kwan KIM ,  Jaehyun YEON ,  Rajneesh KUMAR ,  Suhyung HWANG

IPC: H01Q23/00 ,  H01Q21/06 ,  H01Q21/30 ,  H01Q1/24 ,  H01Q9/04

Abstract: An antenna-in-package (AiP) module is described. The AiP module includes an antenna sub-module. The antenna sub-module is composed of a first package substrate including an antenna side surface having a first group of antennas placed along a first portion of the antenna side surface and a second group of antennas placed along a second portion of the antenna side surface. The first package substrate is composed of a non-linear portion between the first group of antennas and the second group of antennas. The AiP module includes an active circuit sub-module placed on an active side surface of the first package substrate opposite the first group of antennas or the second group of antennas on the antenna side surface of the first package substrate. The active circuit includes a power management (PM) chip and a radio frequency (RF) chip coupled to a second package substrate coupled to the first package substrate.

公开(公告)号：US20220013472A1

公开(公告)日：2022-01-13

申请号：US16925217

申请日：2020-07-09

Applicant: QUALCOMM Incorporated

Inventor： Jeahyeong HAN ,  David Fraser RAE ,  Rajneesh KUMAR

IPC: H01L23/552 ,  H01L23/64 ,  H01L23/31

Abstract: Packages are configured to include an electromagnetic interference (EMI) shield. According to one example, a package includes a substrate, an electrical component, and an EMI shield. The substrate includes a first surface and a second surface. The electrical component may be coupled to the first side of the substrate. The EMI shield is formed with at least one passive device. The at least one passive device is coupled to the first surface of the substrate. The at least one passive device is located laterally to the at least one electrical component, and extends along at least a portion of the electrical component. Other aspects, embodiments, and features are also included.

公开(公告)号：US20190103653A1

公开(公告)日：2019-04-04

申请号：US16145100

申请日：2018-09-27

Applicant: QUALCOMM Incorporated

Inventor： Seong Heon JEONG ,  Rajneesh KUMAR ,  Mohammad Ali TASSOUDJI ,  Darryl JESSIE ,  Gurkanwal SAHOTA ,  Kevin Hsi Huai WANG ,  Jeong KIM, II ,  Taesik YANG ,  Thomas MYERS ,  Neil BURNS ,  Julio ZEGARRA ,  Clinton James WILBER ,  Jordan SZABO

IPC: H01Q1/22 ,  H01Q1/52 ,  H01L23/552 ,  H01L23/66 ,  H01L23/64 ,  H01L23/28

Abstract: An antenna module is described. The antenna module include a ground plane in a multilayer substrate. The antenna module also includes a mold on the multilayer substrate. The antenna module further includes a conductive wall separating a first portion of the mold from a second portion of the mold. The conductive wall is electrically coupled to the ground plane. A conformal shield may be placed on a surface of the second portion of the mold. The conformal shield is electrically coupled to the ground plane.

公开(公告)号：US20220166127A1

公开(公告)日：2022-05-26

申请号：US17666549

申请日：2022-02-07

Applicant: QUALCOMM Incorporated

Inventor： Seong Heon JEONG ,  Rajneesh KUMAR ,  Mohammad Ali TASSOUDJI ,  Darryl JESSIE ,  Gurkanwal SAHOTA ,  Kevin Hsi Huai WANG ,  Jeong IL KIM ,  Taesik YANG ,  Thomas MYERS ,  Neil BURNS ,  Julio ZEGARRA ,  Clinton James WILBER ,  Jordan SZABO

IPC: H01Q1/22 ,  H01L25/065 ,  H01Q1/24 ,  H01L23/28 ,  H01L23/552 ,  H01L23/64 ,  H01L23/66 ,  H01Q1/52

Abstract: An antenna module is described. The antenna module include a ground plane in a multilayer substrate. The antenna module also includes a mold on the multilayer substrate. The antenna module further includes a conductive wall separating a first portion of the mold from a second portion of the mold. The conductive wall is electrically coupled to the ground plane. A conformal shield may be placed on a surface of the second portion of the mold. The conformal shield is electrically coupled to the ground plane.

公开(公告)号：US20210345492A1

公开(公告)日：2021-11-04

申请号：US17093920

申请日：2020-11-10

Applicant: QUALCOMM Incorporated

Inventor： Jaehyun YEON ,  Suhyung HWANG ,  Rajneesh KUMAR ,  Jeahyeong HAN

IPC: H05K1/18 ,  H05K1/02

Abstract: A device that includes a flexible printed circuit board (PCB), a package coupled to the flexible PCB, a first antenna device coupled to the flexible PCB, and a second antenna device coupled to the flexible PCB. The first antenna device is configured to transmit and receive a first signal having a first frequency. The second antenna device is configured to transmit and receive a second signal having a second frequency. The first antenna device may be coupled to a second surface of the flexible PCB, and the second antenna device is coupled to the second surface of the flexible PCB. The first antenna device may be coupled to a second surface of the flexible PCB, and the second antenna device is coupled to a first surface of the flexible PCB.

公开(公告)号：US20210175152A1

公开(公告)日：2021-06-10

申请号：US16704789

申请日：2019-12-05

Applicant: QUALCOMM Incorporated

Inventor： Chaoqi ZHANG ,  Rajneesh KUMAR ,  Li-Sheng WENG ,  Darryl Sheldon JESSIE ,  Suhyung HWANG ,  Jeahyeong HAN ,  Xiaoming CHEN ,  Jaehyun YEON

IPC: H01L23/48 ,  H01L23/31 ,  H01L21/67 ,  H01L21/56

Abstract: A package that includes a substrate having a routing region and a non-routing region along a periphery of the substrate. The non-routing region includes a plurality of vias configured as a shield. The package includes an integrated device coupled to the substrate, and an encapsulation layer located over the substrate such that the encapsulation layer encapsulates the integrated device.

公开(公告)号：US20190081027A1

公开(公告)日：2019-03-14

申请号：US16185635

申请日：2018-11-09

Applicant: QUALCOMM Incorporated

Inventor： Rajneesh KUMAR ,  Chin-Kwan KIM ,  Milind SHAH

IPC: H01L25/10 ,  H01L23/66 ,  H01L23/552 ,  H01L25/065 ,  H04W4/80 ,  H04W4/00 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56 ,  H01L25/16

Abstract: A device that includes a printed circuit board (PCB), a package on package (PoP) device, a first encapsulation layer, and a second encapsulation layer. The package on package (PoP) device is coupled to the printed circuit board (PCB). The package on package (PoP) device includes a first package having a first electronic package component, a second package coupled to the first package, a gap controller configured to provide a spacing between the first electronic package component and the second package. The gap controller includes a spacer and an adhesive layer. The first encapsulation layer is formed between the first package and the second package. The first encapsulation layer is configured to at least partially encapsulate the gap controller including the spacer and the adhesive layer. The second encapsulation layer is configured to at least partially encapsulates the package on package (PoP) device. The device is configured to provide cellular functionality.