公开(公告)号：US20160093567A1

公开(公告)日：2016-03-31

申请号：US14498397

申请日：2014-09-26

Applicant: QUALCOMM Incorporated

Inventor： Chin-Kwan KIM ,  Rajneesh KUMAR ,  Layal ROUHANA ,  Joan Rey V. BUOT ,  Omar James BCHIR

IPC: H01L23/522 ,  H01L21/768

CPC classification number: H01L23/5226 ,  H01L21/76834 ,  H01L21/76898 ,  H01L23/145 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5223 ,  H01L23/5389 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/15333 ,  H01L2924/19041 ,  H01L2924/19106

Abstract: A semiconductor substrate according to some examples of the disclosure may include a substrate with a cavity in a top surface of the substrate, a plurality of cavity interconnections embedded below a bottom surface of the cavity and extending to a bottom surface of the substrate, and a plurality of side interconnections to either side of the cavity extending from the top surface of the substrate to the bottom surface of the substrate. Each of the plurality of side interconnections may include an electrically conductive stop etch layer in the same horizontal plane as the bottom of the cavity.

Abstract translation: 根据本公开的一些示例的半导体衬底可以包括在衬底的顶表面中具有空腔的衬底，多个腔互连嵌入在腔的底表面下方并延伸到衬底的底表面，并且 多个侧面互连到空腔的任一侧，从衬底的顶表面延伸到衬底的底表面。 多个侧面互连中的每一个可以包括在与空腔的底部相同的水平平面中的导电停止蚀刻层。

公开(公告)号：US20250096051A1

公开(公告)日：2025-03-20

申请号：US18471069

申请日：2023-09-20

Applicant: QUALCOMM Incorporated

Inventor： Jaehyun YEON ,  Kun FANG ,  Suhyung HWANG ,  Sang-Jae LEE ,  Rajneesh KUMAR ,  Manuel ALDRETE ,  Zhijie WANG ,  Seongho KIM

IPC: H01L23/13 ,  H01L23/00 ,  H01L23/31 ,  H01L23/373 ,  H01L23/498 ,  H01L25/16

Abstract: A package comprising a first substrate; a first integrated device coupled to the first substrate through at least a first plurality of solder interconnects; a second substrate coupled to the first substrate through at least a second plurality of solder interconnects, wherein the second substrate includes a cavity; and an encapsulation layer located at least between the first substrate and the second substrate, wherein the encapsulation layer is coupled to the first substrate, the second substrate and the first integrated device.

公开(公告)号：US20250079716A1

公开(公告)日：2025-03-06

申请号：US18460480

申请日：2023-09-01

Applicant: QUALCOMM Incorporated

Inventor： Jeahyeong HAN ,  Sang-June PARK ,  Sanjaya Kumar KHATUA ,  Darryl Sheldon JESSIE ,  Rajneesh KUMAR

IPC: H01Q13/10 ,  H01Q1/38 ,  H01Q21/06

Abstract: A package comprising a substrate, an integrated device coupled to a first surface of the substrate through at least a first plurality of solder interconnects; and an antenna device coupled to a second surface of the substrate through at least a second plurality of solder interconnects. The antenna device comprises an antenna device dielectric layer; at least one antenna located on a first surface of the antenna device dielectric layer; a shield located on at least one lateral surface of the antenna device; and a slot opening on the first surface of the antenna device.

公开(公告)号：US20210376493A1

公开(公告)日：2021-12-02

申请号：US16886086

申请日：2020-05-28

Applicant: QUALCOMM Incorporated

Inventor： Milind SHAH ,  Chin-Kwan KIM ,  Jaehyun YEON ,  Rajneesh KUMAR ,  Suhyung HWANG

IPC: H01Q23/00 ,  H01Q21/30 ,  H01Q21/06

Abstract: An antenna-in-package (AiP) module is described. The AiP module includes an antenna sub-module. The antenna sub-module is composed of a first package substrate including an antenna side surface having a first group of antennas placed along a first portion of the antenna side surface and a second group of antennas placed along a second portion of the antenna side surface. The first package substrate is composed of a non-linear portion between the first group of antennas and the second group of antennas. The AiP module includes an active circuit sub-module placed on an active side surface of the first package substrate opposite the first group of antennas or the second group of antennas on the antenna side surface of the first package substrate.

公开(公告)号：US20210151330A1

公开(公告)日：2021-05-20

申请号：US16687778

申请日：2019-11-19

Applicant: QUALCOMM Incorporated

Inventor： Srikanth KULKARNI ,  Rajneesh KUMAR ,  Sayok CHATTOPADHYAY

IPC: H01L21/56 ,  H01L23/31 ,  H01L21/768 ,  H01L21/66 ,  H01L25/16

Abstract: Certain aspects of the present disclosure provide apparatus and techniques for partially molding packages for integrated circuits. A packaged assembly for integrated circuits includes: a substrate having at least one mold barrier between a first region on a first surface of the substrate and a second region on the first surface; a die attached to the substrate; one or more components attached to the substrate in the first region; and a first encapsulant over the one or more components in the first region, wherein the at least one mold barrier is configured to block a portion of the first encapsulant from moving from the first region of the substrate to the second region of the substrate during an application of the first encapsulant.

公开(公告)号：US20210091017A1

公开(公告)日：2021-03-25

申请号：US16870642

申请日：2020-05-08

Applicant: QUALCOMM Incorporated

Inventor： Jaehyun YEON ,  Suhyung HWANG ,  Chin-Kwan KIM ,  Rajneesh KUMAR ,  Darryl Sheldon JESSIE

IPC: H01L23/66 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/552 ,  H01L21/48 ,  H01L21/56 ,  H01Q1/52 ,  H01Q1/22 ,  H01Q5/307 ,  H01Q9/16

Abstract: A package comprising a substrate, a first antenna device, and an integrated device. The substrate comprising a first surface and a second surface, where the substrate comprises a plurality of interconnects. The first antenna device is coupled to the first surface of the substrate, through a first plurality of solder interconnects. The integrated device is coupled to the second surface of the substrate. The package may include an encapsulation layer located over the second surface of the substrate, where the encapsulation layer encapsulates the integrated device. The package may include a shield formed over a surface of the encapsulation layer, where the shield includes an electromagnetic interference (EMI) shield.

公开(公告)号：US20250125244A1

公开(公告)日：2025-04-17

申请号：US18605481

申请日：2024-03-14

Applicant: QUALCOMM Incorporated

Inventor： Manuel ALDRETE ,  Rajneesh KUMAR ,  Zhijie WANG ,  Aniket PATIL ,  Srikanth KULKARNI

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10

Abstract: In an aspect, an integrated circuit (IC) package includes a base structure, an IC component disposed on the base structure, a plurality of interposer connection structures disposed on the base structure, and an interposer structure disposed over the IC component and the plurality of interposer connection structures. The plurality of interposer connection structures is configured to connect the base structure and the interposer structure. Each interposer connection structure of the plurality of interposer connection structures includes a bond ball portion that is connected to the interposer structure, and a bond wire portion that is coupled to the bond ball portion and extends toward the base structure. A width of the bond ball portion is greater than a width of the bond wire portion.

公开(公告)号：US20250079277A1

公开(公告)日：2025-03-06

申请号：US18457162

申请日：2023-08-28

Applicant: QUALCOMM Incorporated

Inventor： Aniket PATIL ,  Manuel ALDRETE ,  Zhijie WANG ,  Piyush GUPTA ,  Rajneesh KUMAR

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/31 ,  H01L25/10 ,  H10B80/00

Abstract: An integrated circuit (IC) device includes a substrate. The substrate includes a first side having a stepped configuration having a first surface that is elevated relative to a second surface. The first surface includes first solder resist openings (SROs), and the second surface includes second SROs. The IC device includes a first set of solder balls electrically connected to a first set of contacts in the first SROs. A solder ball of the first set of solder balls has a first characteristic dimension. The IC device also includes a second set of solder balls electrically connected to a second set of contacts in the second SROs. A solder ball of the second set of solder balls has a second characteristic dimension larger than the first characteristic dimension.

公开(公告)号：US20230155273A1

公开(公告)日：2023-05-18

申请号：US17981176

申请日：2022-11-04

Applicant: QUALCOMM Incorporated

Inventor： Jeahyeong HAN ,  Rajneesh KUMAR ,  Suhyung HWANG ,  Jaehyun YEON ,  Mohammad Ali TASSOUDJI ,  Darryl Sheldon JESSIE ,  Ameya GALINDE

IPC: H01Q1/22 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538 ,  H01L23/552 ,  H01L23/66 ,  H01Q1/36 ,  H01Q1/52 ,  H05K1/18 ,  H05K9/00

CPC classification number: H01Q1/2283 ,  H01L21/565 ,  H01L23/66 ,  H01L23/552 ,  H01L23/3121 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5387 ,  H01Q1/36 ,  H01Q1/526 ,  H05K1/185 ,  H05K9/0081 ,  H01L21/4857

Abstract: A device that includes a first substrate comprising a first antenna, an integrated device coupled to the first substrate, an encapsulation layer located over the first substrate and the integrated device, a second substrate comprising a second antenna, and a flexible connection coupled to the first substrate and the second substrate. The device includes a shield formed over a surface of the encapsulation layer and a surface of the first substrate. The shield includes an electromagnetic interference (EMI) shield.

公开(公告)号：US20210280959A1

公开(公告)日：2021-09-09

申请号：US16810621

申请日：2020-03-05

Applicant: QUALCOMM Incorporated

Inventor： Jeahyeong HAN ,  Rajneesh KUMAR ,  Suhyung HWANG ,  Jaehyun YEON ,  Mohammad Ali TASSOUDJI ,  Darryl Sheldon JESSIE ,  Ameya GALINDE

IPC: H01Q1/22 ,  H01Q1/52 ,  H01Q1/36 ,  H05K1/18 ,  H05K9/00 ,  H01L23/31 ,  H01L23/538 ,  H01L23/66 ,  H01L23/552 ,  H01L21/56

Abstract: A device that includes a first substrate comprising a first antenna, an integrated device coupled to the first substrate, an encapsulation layer located over the first substrate and the integrated device, a second substrate comprising a second antenna, and a flexible connection coupled to the first substrate and the second substrate. The device includes a shield formed over a surface of the encapsulation layer and a surface of the first substrate. The shield includes an electromagnetic interference (EMI) shield.