知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

28 records (took 0.028 seconds)

    PACKAGE COMPRISING INTEGRATED DEVICES COUPLED THROUGH A BRIDGE
    3.
    发明申请
    PACKAGE COMPRISING INTEGRATED DEVICES COUPLED THROUGH A BRIDGE 有权

    公开(公告)号：US20220375838A1

    公开(公告)日：2022-11-24

    申请号：US17328666

    申请日：2021-05-24

    Applicant: QUALCOMM Incorporated

    Inventor： Hong Bok WE ,  Aniket PATIL ,  Zhijie WANG ,  Marcus HSU

    IPC: H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L23/535 ,  H01L23/28

    Abstract: A package comprising a first integrated device comprising a first plurality of under bump metallization interconnects; a second integrated device comprising a second plurality of under bump metallization interconnects; a bridge coupled to the first integrated device and the second integrated device; an encapsulation layer at least partially encapsulating the first integrated device, the second integrated device, and the bridge; a metallization portion located over the first integrated device, the second integrated device, the bridge and the encapsulation layer, where the metallization portion includes at least one dielectric layer and a plurality of metallization interconnects; a first plurality of pillar interconnects coupled to the first plurality of under bump metallization interconnects, the first plurality of interconnects located in the encapsulation layer; and a second plurality of pillar interconnects coupled to the second plurality of under bump metallization interconnects, the second plurality of pillar interconnects located in the encapsulation layer.

    PACKAGE COMPRISING A SUBSTRATE AND A HIGH-DENSITY INTERCONNECT STRUCTURE COUPLED TO THE SUBSTRATE
    4.
    发明申请
    PACKAGE COMPRISING A SUBSTRATE AND A HIGH-DENSITY INTERCONNECT STRUCTURE COUPLED TO THE SUBSTRATE 有权

    公开(公告)号：US20210272931A1

    公开(公告)日：2021-09-02

    申请号：US16803804

    申请日：2020-02-27

    Applicant: QUALCOMM Incorporated

    Inventor： Aniket PATIL ,  Zhijie WANG ,  Hong Bok WE

    IPC: H01L25/065 ,  H01L23/498 ,  H01L23/538 ,  H01L21/56

    Abstract: A package comprising a substrate, an integrated device, and an interconnect structure. The substrate includes a first surface and a second surface. The substrate further includes a plurality of interconnects for providing at least one electrical connection to a board. The integrated device is coupled to the first surface of the substrate. The interconnect structure is coupled to the first surface of the substrate. The integrated device, the interconnect structure and the substrate are coupled together in such a way that when a first electrical signal travels between the integrated device and the board, the first electrical signal travels through at least the substrate, then through the interconnect structure and back through the substrate.

    DEVICE WITH SIDE-BY-SIDE INTEGRATED CIRCUIT DEVICES
    5.
    发明申请
    DEVICE WITH SIDE-BY-SIDE INTEGRATED CIRCUIT DEVICES 有权

    公开(公告)号：US20250132262A1

    公开(公告)日：2025-04-24

    申请号：US18649229

    申请日：2024-04-29

    Applicant: QUALCOMM Incorporated

    Inventor： Joan Rey Villarba BUOT ,  Hong Bok WE ,  Zhijie WANG ,  Sang-Jae LEE

    IPC: H01L23/538 ,  H01L21/48 ,  H01L23/00 ,  H01L25/10

    Abstract: A device includes a substrate that includes a first layer stack including metal and dielectric layers. A first metal layer includes first contacts disposed in a first region and to electrically connect to an IC device, via pads disposed in a second region offset along a first direction, and traces electrically connecting the first contacts and the via pads. The substrate includes, in both regions, a solder resist layer disposed on the first metal layer and a first dielectric layer. The solder resist layer defines openings to the first contacts and the via pads. The substrate includes a second layer stack disposed on the second region and including a second metal layer on the solder resist layer opposite the first layer stack. The second metal layer defines second contacts to electrically connect to second IC device(s) and includes conductive vias between the via pads and the second contacts.

    INTERPOSER CONNECTION STRUCTURES BASED ON WIRE BONDING
    6.
    发明申请
    INTERPOSER CONNECTION STRUCTURES BASED ON WIRE BONDING 有权

    公开(公告)号：US20250125244A1

    公开(公告)日：2025-04-17

    申请号：US18605481

    申请日：2024-03-14

    Applicant: QUALCOMM Incorporated

    Inventor： Manuel ALDRETE ,  Rajneesh KUMAR ,  Zhijie WANG ,  Aniket PATIL ,  Srikanth KULKARNI

    IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10

    Abstract: In an aspect, an integrated circuit (IC) package includes a base structure, an IC component disposed on the base structure, a plurality of interposer connection structures disposed on the base structure, and an interposer structure disposed over the IC component and the plurality of interposer connection structures. The plurality of interposer connection structures is configured to connect the base structure and the interposer structure. Each interposer connection structure of the plurality of interposer connection structures includes a bond ball portion that is connected to the interposer structure, and a bond wire portion that is coupled to the bond ball portion and extends toward the base structure. A width of the bond ball portion is greater than a width of the bond wire portion.

Patent Agency Ranking