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公开(公告)号：US20240249770A1
公开(公告)日：2024-07-25
申请号：US18587872
申请日：2024-02-26
申请人： PsiQuantum Corp,
发明人： Faraz Najafi
摘要： An example memory cell includes a superconducting loop configured to receive a write current and form a persistent current that stores a data bit in the superconducting loop. The example memory cell further includes a superconducting wire coupled to the superconducting loop and configured to selectively read-out the data bit in the superconducting loop in response to a control signal. An example method of reading data from the memory cell includes receiving, at the superconducting loop, a write current to store a data bit in a superconducting loop, and forming a persistent current that circulates in the superconducting loop as a stored data bit. The example method further includes, in accordance with a control signal, transferring, via a superconducting wire of the memory cell that is coupled to the superconducting loop, at least a portion of the persistent current to an output of the memory cell.
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公开(公告)号：US11972794B2
公开(公告)日：2024-04-30
申请号：US17967778
申请日：2022-10-17
申请人： PsiQuantum Corp.
发明人： Faraz Najafi
摘要： An electronic device includes a substrate and a layer of superconducting material disposed over the substrate. The layer of superconducting material includes a first wire and a loop that is (1) distinct and separate from the first wire and (ii) capacitively coupled to the first wire while the loop and the first wire are in a superconducting state.
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公开(公告)号：US12048254B2
公开(公告)日：2024-07-23
申请号：US17071528
申请日：2020-10-15
发明人： Vivekananda P. Adiga , Martin O. Sandberg , Jeng-Bang Yau , David L. Rath , John Bruley , Cihan Kurter , Kenneth P. Rodbell , Hongwen Yan
CPC分类号： H10N60/0912 , H10N60/805 , H10N60/83 , H10N60/85
摘要： Devices, systems, methods, and/or computer-implemented methods that can facilitate protection of a substrate in a qubit device using sacrificial material are provided. According to an embodiment, a device can comprise a superconducting lead provided on a pillar of a sacrificial material provided on a substrate. The device can further comprise a collapsed superconducting junction provided on the substrate and coupled to the superconducting lead.
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公开(公告)号：US11864472B2
公开(公告)日：2024-01-02
申请号：US17373619
申请日：2021-07-12
摘要： A method for etching a surface including obtaining a structure comprising a plurality of nanowires on or above a substrate and a dielectric layer on or above the nanowires, wherein the dielectric layer comprises protrusions formed by the underlying nanowires; reacting a surface of the dielectric layer with a reactant, comprising a gas or a plasma, to form a reactive layer on the dielectric layer, wherein the reactive layer comprises a chemical compound including the reactant and elements of the dielectric layer and the reactive layer comprises sidewalls defined by the protrusions; and selectively etching the reactive layer, wherein the etching etches the protrusions laterally through the sidewalls so as to planarize the surface and remove or shrink the protrusions.
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公开(公告)号：US11690301B2
公开(公告)日：2023-06-27
申请号：US17405448
申请日：2021-08-18
申请人： Google LLC
CPC分类号： H10N60/83 , G06N10/00 , H10N60/01 , H10N69/00 , H01L21/76891 , H10N60/0912 , H10N60/10 , H10N60/855
摘要： A qubit coupling device includes: a dielectric substrate including a trench; a first superconductor layer on a surface of the dielectric substrate where an edge of the first superconductor layer extends along a first direction and at least a portion of the superconductor layer is in contact with the surface of the dielectric substrate, and where the superconductor layer is formed from a superconductor material exhibiting superconductor properties at or below a corresponding critical temperature; a length of the trench within the dielectric substrate is adjacent to and extends along an edge of the first superconductor layer in the first direction, and where the electric permittivity of the trench is less than the electric permittivity of the dielectric substrate.
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公开(公告)号：US20240332423A1
公开(公告)日：2024-10-03
申请号：US18739078
申请日：2024-06-10
申请人： Epinovatech AB
IPC分类号： H01L29/78 , G01N27/414 , G06N10/00 , H01L21/02 , H01L27/092 , H01L29/06 , H01L29/16 , H01L29/20 , H01L29/417 , H01L29/775 , H01L33/06 , H01L33/24 , H01L33/32 , H10N60/10 , H10N60/83 , H10N60/85
CPC分类号： H01L29/7851 , H01L21/02381 , H01L21/02527 , H01L21/02532 , H01L21/0254 , H01L21/02546 , H01L21/02603 , H01L21/0262 , H01L21/02639 , H01L27/0924 , H01L29/0676 , H01L29/16 , H01L29/1606 , H01L29/20 , H01L29/775 , H01L33/06 , H01L33/24 , H01L33/32 , H10N60/128 , H10N60/83 , H10N60/85 , G01N27/4146 , G06N10/00 , H01L29/41791
摘要： A reinforced thin-film device is disclosed. The reinforced thin-film device comprising: a substrate having a top surface for supporting an epilayer; a mask layer patterned with a plurality of nanosize cavities disposed on said substrate to form a needle pad; a thin-film of, relative to the substrate, lattice-mismatched semiconductor disposed on said mask layer, wherein said thin-film comprises a plurality of in parallel spaced semiconductor needles of said lattice-mismatched semiconductor embedded in said thin-film, wherein said plurality of semiconductor needles are vertically disposed in the axial direction towards said substrate in said plurality of nanosize cavities of said mask layer; a, relative to the substrate, lattice-mismatched semiconductor epilayer provided on said thin-film and supported thereby; and a FinFET transistor arranged on the lattice-mismatched semiconductor epilayer. The FinFET transistor comprising: a fin semiconductor structure comprising an elongate protruding core portion, the fin semiconductor structure being arranged on the lattice-mismatched semiconductor epilayer, a first and a second nanostructured electrode radially enclosing respectively a source end and a drain end of the protruding core portion, and a nanostructured gate electrode radially enclosing a central portion of the protruding core portion, the central portion being a portion of the protruding core portion between the source end and the drain end.
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公开(公告)号：US12041856B2
公开(公告)日：2024-07-16
申请号：US17037191
申请日：2020-09-29
摘要： Devices, systems, methods, and/or computer-implemented methods that can facilitate a qubit device comprising a superconducting circuit provided on an encapsulated vacuum cavity are provided. According to an embodiment, a device can comprise a substrate having an encapsulated vacuum cavity provided on the substrate. The device can further comprise a superconducting circuit provided on the encapsulated vacuum cavity.
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公开(公告)号：US20230217841A1
公开(公告)日：2023-07-06
申请号：US17986774
申请日：2022-11-14
申请人： PsiQuantum Corp.
发明人： Faraz Najafi , Syrus Ziai
IPC分类号： H10N60/83 , H01L29/861 , B32B17/10 , B32B37/26 , H01L21/683 , H01L23/24 , H01L27/12 , H10N60/01 , H10N60/20 , H10N60/30 , H10N60/82
CPC分类号： H10N60/83 , H01L29/861 , B32B17/1055 , B32B37/26 , H01L21/6835 , H01L23/24 , H01L27/1266 , H10N60/01 , H10N60/20 , H10N60/30 , H10N60/82 , H01L2221/6835 , H01L2221/68395
摘要： An electronic device (e.g., a diode) is provided that includes a substrate and a patterned layer of superconducting material disposed over the substrate. The patterned layer forms a first electrode, a second electrode, and a loop coupling the first electrode with the second electrode by a first channel and a second channel. The first channel and the second channel have different minimum widths. For a range of current magnitudes, when a magnetic field is applied to the patterned layer of superconducting material, the conductance from the first electrode to the second electrode is greater than the conductance from the second electrode to the first electrode.
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公开(公告)号：US11678590B2
公开(公告)日：2023-06-13
申请号：US17355218
申请日：2021-06-23
CPC分类号： H10N60/0912 , G06N10/00 , H10N60/12 , H10N60/805 , H10N60/83
摘要： A method for producing a hybrid structure, the hybrid structure including at least one structured Majorana material and at least one structured superconductive material arranged thereon includes producing, on a substrate, a first mask for structured application of the Majorana material and a further mask for structured growth of the at least one superconductive material, which are aligned relatively to one another, and applying the at least one structured superconductive material to the structured Majorana material with the aid of the further mask. The structured application of the Majorana material and of the at least one superconductive material takes place without interruption in an inert atmosphere.
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公开(公告)号：US20240284806A1
公开(公告)日：2024-08-22
申请号：US18568635
申请日：2021-06-29
CPC分类号： H10N60/128 , H10N60/01 , H10N60/83
摘要： Described is a semiconductor device comprising a substrate having a surface; a mesa arranged on the surface of the substrate, the mesa having a perimeter; and one or more gate electrodes. The mesa is obtainable by selective area growth, and comprises a semiconductor heterostructure for hosting a 2-dimensional electron gas or a 2-dimensional hole gas. The one or more gate electrodes are configured to deplete electrically portions of the semiconductor heterostructure to define a boundary of an active region of the semiconductor heterostructure, the boundary being spaced from the perimeter of the mesa. By using a selective-area-grown mesa and defining the boundary of the active region electrostatically, improved electronic properties may be obtained, for example by avoiding the diffuse scattering of charge carriers. Also provided is a method for fabricating the device, and a use of one or more gate electrodes to define an active region of a semiconductor component.
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