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公开(公告)号：US11696517B2
公开(公告)日：2023-07-04
申请号：US17349281
申请日：2021-06-16
申请人： NEC Corporation
发明人： Kenji Nanba , Ayami Yamaguchi , Akira Miyata , Katsumi Kikuchi , Suguru Watanabe , Takanori Nishi , Hideyuki Satou
摘要： A quantum device (100) includes: an interposer (112); a quantum chip (111); and a connection part (130) that is provided between the interposer (112) and the quantum chip (111) and electrically connects a wiring layer of the interposer (112) to a wiring layer of the quantum chip (111), in which the connection part (130) includes: a plurality of pillars (131) arranged on a main surface of the interposer (112); and a metal film (132) provided on a surface of the plurality of pillars (131) in such a way that it contacts the wiring layer of the quantum chip (111) and the thickness of the metal film at outer peripheral parts of the tip of each of the plurality of pillars (131) becomes larger than the thickness of the metal film at a center part of the tip of each of the plurality of pillars (131).
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公开(公告)号：US20240090348A1
公开(公告)日：2024-03-14
申请号：US18488931
申请日：2023-10-17
摘要： A quantum device, a manufacturing method thereof, and an electronic device are provided. The quantum device includes: a quantum chip, wherein a signal transmission element and a connecting segment electrically connected to the signal transmission element are formed on the quantum chip; a package substrate, wherein a lead-out segment and a lead-out signal line configured to be electrically connected to a signal connector are formed on the package substrate, and the lead-out signal line is electrically connected to the lead-out segment; and a ball grid array configured to electrically connect the connecting segment to the lead-out segment corresponding to each other. The ball grid array electrically connects the connecting segment to the lead-out segment whose signal transmission properties correspond to each other, thereby realizing electrically connecting the quantum chip to the transmission line, and leading out the connecting segment to an external signal connector.
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公开(公告)号：US20230309419A1
公开(公告)日：2023-09-28
申请号：US18123038
申请日：2023-03-17
申请人： NEC Corporation
发明人： Katsumi KIKUCHI , Akira Miyata , Takanori Nishi , Kenji Nanba , Ayami Yamaguchi
CPC分类号： H10N60/81 , H01L24/16 , H01L24/13 , H01L24/14 , H01L2224/16227 , H01L2224/13147 , H01L2224/13186 , H01L2924/05442 , H01L2924/0504 , H01L2924/059 , H01L2224/1413
摘要： A quantum device includes a chip including a superconducting circuit, a first wiring substrate, a second wiring substrate, first connection portions connecting the chip and a wiring layer on a first surface of the first wiring substrate and second connection portions connecting the second wiring substrate and a wiring layer on a second surface of the first wiring substrate, wherein one or more second connection portions arranged in a first row as viewed from the edge of the first substrate are provided at positions corresponding respectively to one or more of the first connection portions arranged in a first row as viewed from the edge and are arranged closer to the edge than the first connection portions arranged in the first row.
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公开(公告)号：US20240284807A1
公开(公告)日：2024-08-22
申请号：US18573683
申请日：2022-05-23
申请人： QDEVIL APS
摘要： A sample holder for a quantum device, the sample holder comprising a first portion comprising a first cavity, a second portion comprising a second cavity, first fixing elements comprising a printed circuit board comprising one or more electrical conductor(s) and/or wave guide(s), and second fixing elements configured to fix the first and second portions to each other, wherein the quantum device is provided over and covering at least part of the first cavity, the quantum device is provided over and covering at least part of the second cavity, the quantum device is fixed to the first portion by the first fixing elements and the electrical conductor(s) and/or wave guide(s) is/are connected to the quantum device and extend to outside of the first and second portions.
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公开(公告)号：US20230199936A1
公开(公告)日：2023-06-22
申请号：US18063136
申请日：2022-12-08
发明人： Trevor Timpane , Layne A. Berge , Patryk Gumann , Sean Hart , Curtis Eugene Larsen , Michael Good
CPC分类号： H05K1/0201 , G06N10/00 , H05K1/0225 , H05K1/09 , H05K1/18 , H05K3/02 , H05K3/32 , H10N60/81 , H05K1/023 , H05K1/115
摘要： A quantum mechanical circuit includes a substrate; a first electrical conductor and a second electrical conductor provided on the substrate and spaced apart to provide a gap therebetween; and a third electrical conductor to electrically connect the first electrical conductor and the second electrical conductor. The third electrical conductor is a poor thermal conductor.
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公开(公告)号：US20240346351A1
公开(公告)日：2024-10-17
申请号：US18088807
申请日：2022-12-27
发明人： Chang-Sheng Chen , Che-Hao Li , Cheng-Hua Tsai , Meng-Hsuan Chen , Wei Chaun Yu , Meng-Sheng Chen
摘要： The disclosure provides a quantum device and a microwave device. The quantum device includes a first partition, a second partition, an upper circuit board, a lower circuit board and a flexible circuit. The second partition is arranged below the first partition. The first partition and the second partition are used to define an ultra-low temperature chamber of the quantum device. The upper circuit board, the lower circuit board and the flexible circuit are arranged in the ultra-low temperature chamber. The upper circuit board is disposed on a lower surface of the first partition. The lower circuit board is disposed on an upper surface of the second partition. The flexible circuit is electrically connected between the upper circuit board and the lower circuit board to provide multiple signal paths for mutual signal transmission between the upper circuit board and the lower circuit board.
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公开(公告)号：US20240215460A1
公开(公告)日：2024-06-27
申请号：US18069996
申请日：2022-12-21
发明人： Baleegh Abdo , Jae-Woong Nah
摘要： A structure includes a first device having a first chip and a second chip. The second chip has a first side with a plurality of bumps and a second side with a plurality of first superconducting lines. A solder bonded layer attaches the first chip to the second chip. A second device has a first side with a plurality of pads facing the plurality of bumps in the second chip and a second side opposite the first side having a plurality of second superconducting lines. A solder shield material surrounds the plurality of bumps and the plurality of pads, and the plurality of bumps on the second chip are bonded to the plurality of pads on the second device. The solder shield material is connected to the plurality of first superconducting lines of the first device and to the plurality of second superconducting lines of the second device.
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公开(公告)号：US11867775B2
公开(公告)日：2024-01-09
申请号：US17435807
申请日：2020-03-04
申请人： UNIVERSITY OF MARYLAND, COLLEGE PARK , GOVERNMENT OF THE UNITED STATES OF AMERICA, AS REPRESENTED BY THE SECRETARY OF COMMERCE, NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY
IPC分类号： G01R33/00 , G01R33/035 , G01R33/07 , H10N60/81 , H10N60/85
CPC分类号： G01R33/0052 , G01R33/035 , G01R33/07 , H10N60/81 , H10N60/85
摘要： A quantum Hall resistance apparatus is to improve resistance standards and includes a substrate, a graphene epitaxially grown on the substrate and having a plurality of first contact patterns at edges of the graphene, a plurality of contacts, each including a second contact pattern and configured to connect to a corresponding first contact pattern, and a protective layer configured to protect the graphene and to increase adherence between the first contact patterns and the second contact patterns. The contacts become a superconductor at a temperature lower than or equal to a predetermined temperature and under up to a predetermined magnetic flux density.
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公开(公告)号：US11849652B2
公开(公告)日：2023-12-19
申请号：US17902765
申请日：2022-09-02
申请人： Google LLC
摘要： A device includes: a substrate including a superconductor quantum device, the superconductor quantum device including a superconductor material that exhibits superconducting properties at or below a corresponding critical temperature; a cap layer bonded to the substrate; and a sealed cavity between the cap layer and the substrate.
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公开(公告)号：US20230270020A1
公开(公告)日：2023-08-24
申请号：US18055961
申请日：2022-11-16
申请人： IMEC VZW
IPC分类号： H10N60/81
CPC分类号： H10N60/81
摘要： A package includes a metal plate and a carrier substrate mounted on the top surface thereof, which includes one or more superconducting chips mounted on the carrier substrate or configured to receive the one or more chips mounted thereon. The carrier substrate and the plate are sandwiched between the planar portions of a first and second magnetic shield structure, at least the first structure including a planar portion and a receptacle-shaped shell portion arranged above and around the chip location. The package includes one or more pillars formed of a magnetic shielding material which are clamped between the planar portions of the shield structures, wherein the one or more pillars are penetrating the carrier substrate and the metal support plate, and wherein the one or more pillars are in physical contact with both of the planar portions.
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