公开(公告)号：US20150270172A1

公开(公告)日：2015-09-24

申请号：US14733619

申请日：2015-06-08

Applicant: International Business Machines Corporation

Inventor： Sampath D. Purushotaman ,  Roy R. Yu

IPC: H01L21/768 ,  H01L29/06 ,  H01L23/00 ,  H01L21/304 ,  H01L25/00 ,  H01L21/306 ,  H01L27/06 ,  H01L21/762 ,  H01L25/065 ,  H01L21/84 ,  H01L23/544

CPC classification number: H01L21/76897 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/76251 ,  H01L21/76256 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/7684 ,  H01L21/76879 ,  H01L21/76898 ,  H01L21/84 ,  H01L23/5226 ,  H01L23/544 ,  H01L24/03 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/89 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0688 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/0649 ,  H01L2221/68372 ,  H01L2223/54426 ,  H01L2224/03 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/11002 ,  H01L2224/1148 ,  H01L2224/11616 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/17181 ,  H01L2224/8013 ,  H01L2224/81005 ,  H01L2224/81065 ,  H01L2224/81075 ,  H01L2224/8109 ,  H01L2224/81093 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/81209 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A process and resultant article of manufacture made by such process comprises forming through vias needed to connect a bottom device layer in a bottom silicon wafer to the one in the top device layer in a top silicon wafer comprising a silicon-on-insulator (SOI) wafer. Through vias are disposed in such a way that they extend from the middle of the line (MOL) interconnect of the top wafer to the buried oxide (BOX) layer of the SOI wafer with appropriate insulation provided to isolate them from the SOI device layer.

Abstract translation: 通过这种方法制造的工艺和最终的制品包括将包含硅绝缘体（SOI）的顶部硅晶片中的将底部硅晶片中的底部器件层连接到顶部器件层中的底部器件层所需的通孔形成， 晶圆。 通孔以这样的方式设置，使得它们从顶部晶片的线（MOL）互连的中间延伸到SOI晶片的掩埋氧化物（BOX）层，其中提供了适当的绝缘以将它们与SOI器件层隔离开。

公开(公告)号：US20140263583A1

公开(公告)日：2014-09-18

申请号：US13866858

申请日：2013-04-19

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Yi-Li Hsiao ,  Da-Yuan Shih ,  Chih-Hang Tung ,  Chen-Hua Yu

IPC: H05K13/04

CPC classification number: H05K13/0465 ,  H01L24/75 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/75102 ,  H01L2224/75251 ,  H01L2224/757 ,  H01L2224/75703 ,  H01L2224/7598 ,  H01L2224/75985 ,  H01L2224/75987 ,  H01L2224/75988 ,  H01L2224/81065 ,  H01L2224/8109 ,  H01L2224/81093 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/97 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01013

Abstract: A method includes placing a plurality of first package components over second package components, which are included in a third package component. First metal connectors in the first package components are aligned to respective second metal connectors of the second package components. After the plurality of first package components is placed, a metal-to-metal bonding is performed to bond the first metal connectors to the second metal connectors.

Abstract translation: 一种方法包括将多个第一包装部件放置在包括在第三包装部件中的第二包装部件上。 第一包装部件中的第一金属连接器与第二包装部件的相应的第二金属连接器对准。 在放置多个第一封装部件之后，执行金属对金属接合以将第一金属连接器接合到第二金属连接器。

公开(公告)号：US20120247664A1

公开(公告)日：2012-10-04

申请号：US13184084

申请日：2011-07-15

Applicant: Kazuhiko KOBAYASHI

Inventor： Kazuhiko KOBAYASHI

IPC: B29C65/18 ,  B32B37/02

CPC classification number: H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/95 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75102 ,  H01L2224/75252 ,  H01L2224/753 ,  H01L2224/75313 ,  H01L2224/75315 ,  H01L2224/75317 ,  H01L2224/7532 ,  H01L2224/755 ,  H01L2224/75502 ,  H01L2224/75704 ,  H01L2224/75755 ,  H01L2224/75756 ,  H01L2224/75804 ,  H01L2224/7598 ,  H01L2224/75984 ,  H01L2224/81048 ,  H01L2224/8109 ,  H01L2224/81093 ,  H01L2224/83048 ,  H01L2224/8309 ,  H01L2224/83093 ,  H01L2224/83855 ,  H01L2224/9211 ,  H01L2224/95093 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/15787 ,  H01L2924/00

Abstract: The bonding apparatus is capable of effectively increasing temperature of a substrate and reducing occurrence of position gaps and poor connection in a process of flip-chip-bonding semiconductor devices to the substrate. The bonding apparatus comprises: a supporting unit for supporting the substrate, on which the semiconductor devices have been adhered by a non-conductive; and a heating/pressing unit for heating and pressing the substrate, the heating/pressing unit having a built-in heat source and a clamping face, onto which the substrate supported by the supporting unit is pressed. The substrate supported by the supporting unit is moved toward the clamping face of the heating/pressing unit so as to preheat the substrate and the semiconductor devices by radiation heat. Then, the semiconductor devices are pressed onto the clamping face of the heating/pressing unit so as to cure the non-conductive adhesive and bond bumps of the semiconductor devices to terminal sections of the substrate.

Abstract translation: 接合装置能够有效地增加衬底的温度并减少在将半导体器件倒装芯片接合到衬底的工艺中位置间隙的发生和连接不良。 接合装置包括：用于支撑基板的支撑单元，半导体器件已经通过非导电粘附在该基板上; 以及用于加热和加压基板的加热/加压单元，加热/加压单元具有内置的热源和夹紧面，由支撑单元支撑的基板被压在该加热/加压单元上。 由支撑单元支撑的基板朝向加热/加压单元的夹紧面移动，以便通过辐射热预热基板和半导体器件。 然后，将半导体器件按压到加热/加压单元的夹紧面上，以固化不导电粘合剂并将半导体器件的凸起接合到衬底的端子部分。

公开(公告)号：US09613928B2

公开(公告)日：2017-04-04

申请号：US14904670

申请日：2014-07-16

Applicant: Agency for Science, Technology and Research

Inventor： Sunil Wickramanayaka

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/00 ,  H01L21/56 ,  H01L25/00

CPC classification number: H01L24/83 ,  H01L21/563 ,  H01L24/743 ,  H01L24/75 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/13009 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/27515 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/7501 ,  H01L2224/75102 ,  H01L2224/7511 ,  H01L2224/75184 ,  H01L2224/75264 ,  H01L2224/753 ,  H01L2224/7598 ,  H01L2224/81002 ,  H01L2224/81093 ,  H01L2224/81097 ,  H01L2224/81193 ,  H01L2224/81209 ,  H01L2224/81903 ,  H01L2224/81907 ,  H01L2224/83002 ,  H01L2224/8309 ,  H01L2224/83093 ,  H01L2224/83097 ,  H01L2224/8312 ,  H01L2224/83193 ,  H01L2224/83209 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/83907 ,  H01L2224/83911 ,  H01L2224/9205 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06593 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00014

Abstract: An apparatus and a method for chip-to-wafer integration is provided. The apparatus includes a coating module, a bonding module and a cleaning module. The method includes the steps of placing at least one chip on a wafer to form an integrated product, forming a film on the integrated product, such that the integrated product is substantially fluid-tight, and exerting a predetermined positive pressure on the film during permanent bonding of the at least one chip to the wafer. The method further includes the step of removing the film from the integrated product after permanent bonding of the at least one chip to the wafer.

公开(公告)号：US08563396B2

公开(公告)日：2013-10-22

申请号：US13016994

申请日：2011-01-29

Applicant: Sampath Purushothaman ,  Roy R. Yu

Inventor： Sampath Purushothaman ,  Roy R. Yu

IPC: H01L21/60

CPC classification number: H01L21/76897 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/76251 ,  H01L21/76256 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/7684 ,  H01L21/76879 ,  H01L21/76898 ,  H01L21/84 ,  H01L23/5226 ,  H01L23/544 ,  H01L24/03 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/89 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0688 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/0649 ,  H01L2221/68372 ,  H01L2223/54426 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/11002 ,  H01L2224/1148 ,  H01L2224/11616 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/17181 ,  H01L2224/8013 ,  H01L2224/81005 ,  H01L2224/81065 ,  H01L2224/81075 ,  H01L2224/8109 ,  H01L2224/81093 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/81209 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A process and resultant article of manufacture made by such process comprises forming through vias needed to connect a bottom device layer in a bottom silicon wafer to the one in the top device layer in a top silicon wafer comprising a silicon-on-insulator (SOI) wafer. Through vias are disposed in such a way that they extend from the middle of the line (MOL) interconnect of the top wafer to the buried oxide (BOX) layer of the SOI wafer with appropriate insulation provided to isolate them from the SOI device layer.

Abstract translation: 通过这种方法制造的工艺和最终的制品包括将包含硅绝缘体（SOI）的顶部硅晶片中的将底部硅晶片中的底部器件层连接到顶部器件层中的底部器件层所需的通孔形成， 晶圆。 通孔以这样的方式设置，使得它们从顶部晶片的线（MOL）互连的中间延伸到SOI晶片的掩埋氧化物（BOX）层，其中提供了适当的绝缘以将它们与SOI器件层隔离开。

公开(公告)号：US20120061820A1

公开(公告)日：2012-03-15

申请号：US13319531

申请日：2010-07-09

Applicant: Kenzou Maejima ,  Satoru Katsurayama ,  Toru Meura

Inventor： Kenzou Maejima ,  Satoru Katsurayama ,  Toru Meura

IPC: H01L23/52 ,  B23K1/20 ,  B23K31/02

CPC classification number: C09D163/00 ,  H01L21/563 ,  H01L24/13 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81091 ,  H01L2224/81093 ,  H01L2224/81097 ,  H01L2224/81121 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81204 ,  H01L2224/81209 ,  H01L2224/81211 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/8349 ,  H01L2224/83862 ,  H01L2224/92125 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/00 ,  H01L2924/3512

Abstract: Provided is a method for manufacturing an electronic component by using a solder joining method for bonding a first electronic component having a metal electrode with a second electronic component having a solder electrode, the method comprising; (i) forming a resin layer containing a thermosetting resin on at least one of the solder joint surfaces of said first electronic component and said second electronic component; (ii) positioning said metal electrode of said first electronic component and said solder electrode of said second electronic component to face each other, heating said positioned electrodes and applying pressure, and thereby bringing said metal electrode and said solder electrode into contact; (iii) heating electronic components while applying pressure thereby fusion bonding said solder to said metal electrode; and (iv) heating said resin layer.

Abstract translation: 本发明提供一种电子部件的制造方法，其特征在于，使用焊料接合方法，该焊接方法用于将具有金属电极的第一电子部件与具有焊料电极的第二电子部件接合。 （i）在所述第一电子部件和所述第二电子部件的至少一个焊接面上形成含有热硬化性树脂的树脂层; （ii）将所述第一电子部件的所述金属电极和所述第二电子部件的所述焊料电极相对配置，加热所述定位电极并施加压力，从而使所述金属电极和所述焊料电极接触; （iii）在施加压力的同时加热电子部件，从而将所述焊料熔合到所述金属电极上; 和（iv）加热所述树脂层。

公开(公告)号：US20030164396A1

公开(公告)日：2003-09-04

申请号：US10344938

申请日：2003-02-19

Inventor： Tadatomo Suga ,  Akira Yamauchi

IPC: B23K031/02

CPC classification number: B23K1/206 ,  H01L21/67028 ,  H01L21/67109 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/13111 ,  H01L2224/75 ,  H01L2224/75252 ,  H01L2224/75743 ,  H01L2224/81 ,  H01L2224/81054 ,  H01L2224/81075 ,  H01L2224/81093 ,  H01L2224/81121 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K3/3426 ,  H01L2924/00

Abstract: A mounting method for bonding a first object having a metal joint part to a second object, comprising the steps of cleaning at least the surface of the metal joint part of the first object by irradiating an energy wave or energy particle beam, and thermally bonding the cleaned metal joint part of the first object to a portion to be bonded of the second object by heating in a special gas atmosphere, and a device thereof. In the mounting, the primary and secondary oxidations of the metal joint part can be efficiently prevented, and thereby highly reliable bonding can be carried out.

Abstract translation: 一种用于将具有金属接合部的第一物体接合到第二物体的安装方法，包括以下步骤：通过照射能量波或能量粒子束来清洁至少第一物体的金属接合部的表面，并将 通过特殊气体气氛中的加热将第一物体的金属接合部分清洁到第二物体的待粘合部分及其装置。 在安装中，可以有效地防止金属接合部的一次和二次氧化，从而可以进行高度可靠的接合。

公开(公告)号：US09016342B2

公开(公告)日：2015-04-28

申请号：US13184084

申请日：2011-07-15

Applicant: Kazuhiko Kobayashi

Inventor： Kazuhiko Kobayashi

IPC: B32B37/10 ,  H01L23/00

CPC classification number: H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/95 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75102 ,  H01L2224/75252 ,  H01L2224/753 ,  H01L2224/75313 ,  H01L2224/75315 ,  H01L2224/75317 ,  H01L2224/7532 ,  H01L2224/755 ,  H01L2224/75502 ,  H01L2224/75704 ,  H01L2224/75755 ,  H01L2224/75756 ,  H01L2224/75804 ,  H01L2224/7598 ,  H01L2224/75984 ,  H01L2224/81048 ,  H01L2224/8109 ,  H01L2224/81093 ,  H01L2224/83048 ,  H01L2224/8309 ,  H01L2224/83093 ,  H01L2224/83855 ,  H01L2224/9211 ,  H01L2224/95093 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/15787 ,  H01L2924/00

Abstract: The bonding apparatus is capable of effectively increasing temperature of a substrate and reducing occurrence of position gaps and poor connection in a process of flip-chip-bonding semiconductor devices to the substrate. The bonding apparatus comprises: a supporting unit for supporting the substrate, on which the semiconductor devices have been adhered by a non-conductive; and a heating/pressing unit for heating and pressing the substrate, the heating/pressing unit having a built-in heat source and a clamping face, onto which the substrate supported by the supporting unit is pressed. The substrate supported by the supporting unit is moved toward the clamping face of the heating/pressing unit so as to preheat the substrate and the semiconductor devices by radiation heat. Then, the semiconductor devices are pressed onto the clamping face of the heating/pressing unit so as to cure the non-conductive adhesive and bond bumps of the semiconductor devices to terminal sections of the substrate.

Abstract translation: 接合装置能够有效地增加衬底的温度并减少在将半导体器件倒装芯片接合到衬底的工艺中位置间隙的发生和连接不良。 接合装置包括：用于支撑基板的支撑单元，半导体器件已经通过非导电粘附在该基板上; 以及用于加热和加压基板的加热/加压单元，加热/加压单元具有内置的热源和夹紧面，由支撑单元支撑的基板被压在该加热/加压单元上。 由支撑单元支撑的基板朝向加热/加压单元的夹紧面移动，以便通过辐射热预热基板和半导体器件。 然后，将半导体器件按压到加热/加压单元的夹紧面上，以固化不导电粘合剂并将半导体器件的凸起接合到衬底的端子部分。

公开(公告)号：US20130324641A1

公开(公告)日：2013-12-05

申请号：US13962530

申请日：2013-08-08

Applicant: Sumitomo Bakelite Co., Ltd.

Inventor： Kenzou MAEJIMA ,  Satoru KATSURAYAMA ,  Toru MEURA

IPC: C09D163/00

CPC classification number: C09D163/00 ,  H01L21/563 ,  H01L24/13 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81091 ,  H01L2224/81093 ,  H01L2224/81097 ,  H01L2224/81121 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81204 ,  H01L2224/81209 ,  H01L2224/81211 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/8349 ,  H01L2224/83862 ,  H01L2224/92125 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/00 ,  H01L2924/3512

Abstract: Provided is a method for manufacturing an electronic component by using a solder joining method for bonding a first electronic component having a metal electrode with a second electronic component having a solder electrode, the method comprising; (i) forming a resin layer containing a thermosetting resin on at least one of the solder joint surfaces of said first electronic component and said second electronic component; (ii) positioning said metal electrode of said first electronic component and said solder electrode of said second electronic component to face each other, heating said positioned electrodes and applying pressure, and thereby bringing said metal electrode and said solder electrode into contact; (iii) heating electronic components while applying pressure thereby fusion bonding said solder to said metal electrode; and (iv) heating said resin layer.

Abstract translation: 本发明提供一种电子部件的制造方法，其特征在于，使用焊料接合方法，该焊接方法用于将具有金属电极的第一电子部件与具有焊料电极的第二电子部件接合。 （i）在所述第一电子部件和所述第二电子部件的至少一个焊接面上形成含有热硬化性树脂的树脂层; （ii）将所述第一电子部件的所述金属电极和所述第二电子部件的所述焊料电极相对配置，加热所述定位电极并施加压力，从而使所述金属电极和所述焊料电极接触; （iii）在施加压力的同时加热电子部件，从而将所述焊料熔合到所述金属电极上; 和（iv）加热所述树脂层。

公开(公告)号：US20120193752A1

公开(公告)日：2012-08-02

申请号：US13016994

申请日：2011-01-29

Applicant: Sampath Purushothaman ,  Roy Rongqing Yu

Inventor： Sampath Purushothaman ,  Roy Rongqing Yu

IPC: H01L27/12 ,  H01L21/60

CPC classification number: H01L21/76897 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/76251 ,  H01L21/76256 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/7684 ,  H01L21/76879 ,  H01L21/76898 ,  H01L21/84 ,  H01L23/5226 ,  H01L23/544 ,  H01L24/03 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/89 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0688 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/0649 ,  H01L2221/68372 ,  H01L2223/54426 ,  H01L2224/03002 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/11002 ,  H01L2224/1148 ,  H01L2224/11616 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/17181 ,  H01L2224/8013 ,  H01L2224/81005 ,  H01L2224/81065 ,  H01L2224/81075 ,  H01L2224/8109 ,  H01L2224/81093 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/81209 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A process and resultant article of manufacture made by such process comprises forming through vias needed to connect a bottom device layer in a bottom silicon wafer to the one in the top device layer in a top silicon wafer comprising a silicon-on-insulator (SOI) wafer. Through vias are disposed in such a way that they extend from the middle of the line (MOL) interconnect of the top wafer to the buried oxide (BOX) layer of the SOI wafer with appropriate insulation provided to isolate them from the SOI device layer.

Abstract translation: 通过这种方法制造的工艺和最终的制品包括将包含硅绝缘体（SOI）的顶部硅晶片中的将底部硅晶片中的底部器件层连接到顶部器件层中的底部器件层所需的通孔形成， 晶圆。 通孔以这样的方式设置，使得它们从顶部晶片的线（MOL）互连的中间延伸到SOI晶片的掩埋氧化物（BOX）层，其中提供了适当的绝缘以将它们与SOI器件层隔离开。