公开(公告)号：US20230402423A1

公开(公告)日：2023-12-14

申请号：US18336067

申请日：2023-06-16

Applicant: Infineon Technologies AG

Inventor： Edward Fuergut ,  Ralf Otremba ,  Irmgard Escher-Poeppel ,  Martin Gruber

IPC: H01L23/00

CPC classification number: H01L24/45 ,  H01L24/13 ,  H01L24/43 ,  H01L24/73

Abstract: A semiconductor package is provided. The semiconductor package may include at least one semiconductor chip including a contact pad configured to conduct a current, a conductor element, wherein the conductor element is arranged laterally overlapping the contact pad and with a distance to the contact pad, at least one electrically conductive spacer, a first adhesive system configured to electrically and mechanically connect the at least one electrically conductive spacer with the contact pad, and a second adhesive system configured to electrically and mechanically connect the at least one electrically conductive spacer with the conductor element, wherein the conductor element is electrically conductively connected to a clip or is at least part of a clip, and wherein the spacer is configured to electrically conductively connect the contact pad with the laterally overlapping portion of the conductor element.

公开(公告)号：US11715719B2

公开(公告)日：2023-08-01

申请号：US16875531

申请日：2020-05-15

Applicant: Infineon Technologies AG

Inventor： Edward Fuergut ,  Ralf Otremba ,  Irmgard Escher-Poeppel ,  Martin Gruber

IPC: H01L23/00

CPC classification number: H01L24/45 ,  H01L24/13 ,  H01L24/43 ,  H01L24/73

Abstract: A semiconductor package is provided. The semiconductor package may include at least one semiconductor chip including a contact pad configured to conduct a current, a conductor element, wherein the conductor element is arranged laterally overlapping the contact pad and with a distance to the contact pad, at least one electrically conductive spacer, a first adhesive system configured to electrically and mechanically connect the at least one electrically conductive spacer with the contact pad, and a second adhesive system configured to electrically and mechanically connect the at least one electrically conductive spacer with the conductor element, wherein the conductor element is electrically conductively connected to a clip or is at least part of a clip, and wherein the spacer is configured to electrically conductively connect the contact pad with the laterally overlapping portion of the conductor element.

公开(公告)号：US20230178428A1

公开(公告)日：2023-06-08

申请号：US17543199

申请日：2021-12-06

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Fee Hoon Wendy Wong ,  Thomas Behrens ,  Eric Lopez Bonifacio ,  Chau Fatt Chiang ,  Irmgard Escher-Poeppel ,  Giovanni Ragasa Garbin ,  Martin Gruber ,  Tien Shyang Law ,  Mohamad Azian Mohamed Azizi ,  Si Hao Vincent Yeo

IPC: H01L21/768 ,  H01L21/56 ,  H01L23/31 ,  H01L21/48

CPC classification number: H01L21/76838 ,  H01L21/563 ,  H01L23/31 ,  H01L21/4839

Abstract: A method includes providing a lead frame with a central metal plate and a plurality of leads extending away from the central metal plate, the central metal plate including an upper surface that includes a first mesa that is elevated from recessed regions, mounting a semiconductor die on the upper surface of central metal plate such that a lower surface of the semiconductor die is at least partially disposed on the first mesa, forming electrical interconnections between terminals of the semiconductor die and the leads, forming an encapsulant body on the central metal plate such that the semiconductor die is encapsulated by the encapsulant body and such that the leads protrude out from edge sides of the encapsulant body, and thinning the central metal plate from a rear surface of the central metal plate so as to isolate the first mesa at a lower surface of the encapsulant body.

公开(公告)号：US20170271298A1

公开(公告)日：2017-09-21

申请号：US15459151

申请日：2017-03-15

Applicant: Infineon Technologies AG

Inventor： Alexander Heinrich ,  Irmgard Escher-Poeppel ,  Martin Gruber ,  Andreas Munding ,  Catharina Wille

IPC: H01L23/00 ,  H01L25/00

CPC classification number: H01L24/81 ,  H01L24/09 ,  H01L24/16 ,  H01L24/85 ,  H01L25/50 ,  H01L2224/095 ,  H01L2224/16104 ,  H01L2224/16112 ,  H01L2224/16137 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/49113 ,  H01L2224/4912 ,  H01L2924/00014 ,  H01L2224/45099

Abstract: One aspect of the invention relates to a method for producing a chip assemblage. Two or more chip assemblies are produced in each case by cohesively and electrically conductively connecting an electrically conductive first compensation lamina to a first main electrode of a semiconductor chip. A control electrode interconnection structure is arranged in a free space between the chip assemblies. Electrically conductive connections are produced between the control electrode interconnection structure and control electrodes of the semiconductor chips of the individual chip assemblies. The chip assemblies are cohesively connected by means of a dielectric embedding compound.

公开(公告)号：US09768037B2

公开(公告)日：2017-09-19

申请号：US14279752

申请日：2014-05-16

Applicant: Infineon Technologies AG

Inventor： Petteri Palm ,  Edward Fuergut ,  Irmgard Escher-Poeppel

IPC: H01L23/538 ,  H01L21/56 ,  H01L21/78 ,  H01L25/065 ,  H01L23/31 ,  H01L23/433 ,  H01L23/552 ,  H01L21/683 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L21/561 ,  H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/538 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L2221/68318 ,  H01L2221/68372 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/2518 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/18162 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00

Abstract: A method of manufacturing an electronic device package includes structuring a metal layer to generate a structured metal layer having a plurality of openings. Semiconductor chips are placed into at least some of the openings. An encapsulating material is applied over the structured metal layer and the semiconductor chips to form an encapsulation body. The encapsulation body is separated into a plurality of electronic device packages.

公开(公告)号：US09584889B2

公开(公告)日：2017-02-28

申请号：US14011566

申请日：2013-08-27

Applicant: Infineon Technologies AG

Inventor： Irmgard Escher-Poeppel ,  Edward Fuergut ,  Alfons Dehe

IPC: H01L29/84 ,  H04R1/02 ,  H04R19/00 ,  H04R31/00 ,  H04R1/08

CPC classification number: H04R1/021 ,  H04R1/086 ,  H04R19/005 ,  H04R31/006 ,  H04R2201/003 ,  H04R2201/02 ,  H04R2231/003

Abstract: A packaged MEMS device may include an embedding arrangement, a MEMS device disposed in the embedding arrangement, a sound port disposed in the embedding arrangement and acoustically coupled to the MEMS device, and a grille within the sound port. Some embodiments relate to a sound transducer component including an embedding material and a substrate-stripped MEMS die embedded into the embedding material. The MEMS die may include a diaphragm for sound transduction. The sound transducer component may further include a sound port within the embedding material in fluidic or acoustic contact with the diaphragm. Further embodiments relate to a method for packaging a MEMS device or to a method for manufacturing a sound transducer component.

Abstract translation: 封装的MEMS器件可以包括嵌入布置，布置在嵌入布置中的MEMS器件，布置在嵌入布置中并声耦合到MEMS器件的声音端口和声音端口内的格栅。 一些实施例涉及包括嵌入材料和嵌入到嵌入材料中的剥离衬底的MEMS芯片的声音传感器部件。 MEMS管芯可以包括用于声音传导的隔膜。 声音传感器组件还可以包括与隔膜流体或声学接触的嵌入材料内的声音端口。 另外的实施例涉及用于封装MEMS装置的方法或用于制造声换能器部件的方法。

公开(公告)号：US09536953B2

公开(公告)日：2017-01-03

申请号：US14745428

申请日：2015-06-20

Applicant: Infineon Technologies AG

Inventor： Klaus Elian ,  Guenther Ruhl ,  Horst Theuss ,  Irmgard Escher-Poeppel

IPC: H01L29/06 ,  H01L29/16 ,  G01N27/12 ,  H01L23/29 ,  H01L23/31 ,  H01L21/56 ,  H01L23/28 ,  H01L23/495 ,  H01L23/00 ,  G01N33/00

CPC classification number: H01L29/1606 ,  G01N27/127 ,  G01N33/0059 ,  H01L21/561 ,  H01L21/568 ,  H01L23/28 ,  H01L23/293 ,  H01L23/3135 ,  H01L23/315 ,  H01L23/49562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/24 ,  H01L24/48 ,  H01L24/49 ,  H01L24/94 ,  H01L24/96 ,  H01L2224/02379 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24011 ,  H01L2224/24105 ,  H01L2224/24226 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2224/11 ,  H01L2924/01082 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A graphene layer is generated on a substrate. A plastic material is deposited on the graphene layer to at least partially cover the graphene layer. The substrate is separated into at least two substrate pieces.

Abstract translation: 在基板上产生石​​墨烯层。 在石墨烯层上沉积塑料材料以至少部分地覆盖石墨烯层。 将基板分成至少两个基片。

公开(公告)号：US09355984B2

公开(公告)日：2016-05-31

申请号：US13944927

申请日：2013-07-18

Applicant: Infineon Technologies AG

Inventor： Irmgard Escher-Poeppel ,  Eduard Knauer ,  Thomas Kunstmann ,  Peter Scherl ,  Raimund Foerg

IPC: H01L23/00 ,  H01L23/373

CPC classification number: H01L24/29 ,  H01L23/3736 ,  H01L24/27 ,  H01L24/743 ,  H01L24/83 ,  H01L24/94 ,  H01L2224/27332 ,  H01L2224/27848 ,  H01L2224/29247 ,  H01L2224/29647 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/83011 ,  H01L2224/83065 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/8384 ,  H01L2224/85547 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/01001 ,  H01L2924/20106 ,  H01L2924/00

Abstract: An embodiment method for fabricating electronic devices having two components connected by a metal layer includes applying a metal layer to each component and connecting the metal layers such that a single metal layer is formed.

Abstract translation: 用于制造具有通过金属层连接的两个部件的电子器件的实施例方法包括将金属层施加到每个部件并连接金属层，使得形成单个金属层。

公开(公告)号：US10096584B2

公开(公告)日：2018-10-09

申请号：US15337733

申请日：2016-10-28

Applicant: Infineon Technologies AG

Inventor： Olaf Hohlfeld ,  Guido Boenig ,  Irmgard Escher-Poeppel ,  Edward Fuergut ,  Martin Gruber ,  Thorsten Meyer

IPC: H01L21/00 ,  H01L25/00 ,  H01L21/50 ,  H01L21/56 ,  H01L23/14 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L25/07 ,  H01L21/60

Abstract: In order to produce a power semiconductor module, a circuit carrier is populated with a semiconductor chip and with an electrically conductive contact element. After populating, the semiconductor chip and the contact element are embedded into a dielectric embedding compound, and the contact element is exposed. In addition, an electrically conductive base layer is produced which electrically contacts the exposed contact element and which bears on the embedding compound and the exposed contact element. A prefabricated metal film is applied to the base layer by means of an electrically conductive connection layer.

公开(公告)号：US20170125395A1

公开(公告)日：2017-05-04

申请号：US15337733

申请日：2016-10-28

Applicant: Infineon Technologies AG

Inventor： Olaf Hohlfeld ,  Guido Boenig ,  Irmgard Escher-Poeppel ,  Edward Fuergut ,  Martin Gruber ,  Thorsten Meyer

IPC: H01L25/00 ,  H01L25/065 ,  H01L23/14 ,  H01L21/50 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L23/538

CPC classification number: H01L25/50 ,  H01L21/50 ,  H01L21/56 ,  H01L21/561 ,  H01L23/142 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/5386 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/072 ,  H01L2021/60015 ,  H01L2021/60022 ,  H01L2021/60277 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/214 ,  H01L2224/291 ,  H01L2224/29139 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/4813 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48245 ,  H01L2224/73267 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/92244 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10344 ,  H01L2924/1301 ,  H01L2924/13062 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/19107 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2924/014 ,  H01L2224/85399

Abstract: In order to produce a power semiconductor module, a circuit carrier is populated with a semiconductor chip and with an electrically conductive contact element. After populating, the semiconductor chip and the contact element are embedded into a dielectric embedding compound, and the contact element is exposed. In addition, an electrically conductive base layer is produced which electrically contacts the exposed contact element and which bears on the embedding compound and the exposed contact element. A prefabricated metal film is applied to the base layer by means of an electrically conductive connection layer.