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公开(公告)号：US20240178155A1
公开(公告)日：2024-05-30
申请号：US18071972
申请日：2022-11-30
IPC分类号： H01L23/552 , H01L21/48 , H01L23/00 , H01L23/498
CPC分类号： H01L23/552 , H01L21/4839 , H01L23/49822 , H01L23/49838 , H01L23/49861 , H01L24/16 , H01L2224/16235 , H01L2924/3025
摘要： An electronic device includes a multilevel package substrate having a first level, a second level, a third level, a conductive signal trace that extends in the second level, and a conductive box shield that surrounds a portion of the conductive signal trace. The electronic device includes a semiconductor die attached to the multilevel package substrate and having a conductive structure coupled to an end of the conductive signal trace. The electronic device includes a package structure that encloses the semiconductor die and a portion of the multilevel package substrate.
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公开(公告)号：US20240178109A1
公开(公告)日：2024-05-30
申请号：US17994743
申请日：2022-11-28
发明人： Stefan Schwab , Michael Juerss , Thorsten Scharf
IPC分类号： H01L23/495 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/498
CPC分类号： H01L23/49568 , H01L21/4825 , H01L21/4839 , H01L21/4882 , H01L21/565 , H01L23/4952 , H01L23/49558 , H01L23/49586 , H01L23/49861 , H01L24/40 , H01L24/48 , H01L2224/40245 , H01L2224/48245 , H01L2924/1815 , H01L2924/182 , H01L2924/186
摘要： A semiconductor package includes a semiconductor die thermally coupled to a planar metal pad, an encapsulant body that encapsulates the semiconductor die and includes a recess that extends from an outer upper side of the encapsulant body towards a rear side of the planar metal pad, and an insert arranged within the recess that is thermally coupled to the planar metal pad and extends to the outer upper side of the encapsulant body, wherein the insert that is arranged within the recess includes a curable polymer compound.
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公开(公告)号：US20240105579A1
公开(公告)日：2024-03-28
申请号：US18527712
申请日：2023-12-04
申请人： NXP B.V.
发明人： Mei Yeut Lim
IPC分类号： H01L23/498 , H01L21/48 , H01L23/00 , H01L25/065
CPC分类号： H01L23/49861 , H01L21/4839 , H01L23/49816 , H01L23/49838 , H01L24/32 , H01L24/48 , H01L24/85 , H01L25/0657 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/48175 , H01L2224/4845 , H01L2224/48455 , H01L2224/48463 , H01L2224/85439 , H01L2224/85444 , H01L2224/85455 , H01L2225/06524
摘要： A method of manufacturing a semiconductor device is provided. The method includes attaching a first end of a first bond wire to a first conductive lead and a second end of the first bond wire to a first bond pad of a first semiconductor die. A conductive lead extender is affixed to the first conductive lead by way of a conductive adhesive, the lead extender overlapping the first end of the first bond wire. A first end of a second bond wire is attached to the lead extender, the first end of the second bond wire conductively connected to the first end of the first bond wire.
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公开(公告)号：US20240096775A1
公开(公告)日：2024-03-21
申请号：US17932913
申请日：2022-09-16
申请人： Analog Devices, Inc.
CPC分类号： H01L23/49838 , G01R31/2884 , H01L21/4825 , H01L21/4828 , H01L21/4839 , H01L21/565 , H01L23/3121 , H01L23/49811 , H01L23/49861 , H01L24/40 , H01L24/41 , H01L25/16 , H01L2224/4001 , H01L2224/40095 , H01L2224/40145 , H01L2224/4112 , H01L2924/1427 , H01L2924/19042
摘要： Methods, and systems, are presented for a Structural Bridge for Electrically Isolated Metal Clips by mounting on a substrate a first and a second circuit. These first and second circuits can include Component on Package (CoP) electronic parts that are electrically contacted to the substrate with metal clips mounted on the surface of the substrate. The metal clips are electrically connected to respective circuit first and second circuits by an electrical connection on or in the substrate. The metal clips are folded over the respective first and second circuits. The folded-over portion of the first metal clip and the folded-over portion of the second metal clip are electrically isolated from each other. A third circuit package that is mounted on and electrically connected to a folded-over portion of the first metal clip and to a folded-over portion of the second metal clip.
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公开(公告)号：US20240088007A1
公开(公告)日：2024-03-14
申请号：US17931665
申请日：2022-09-13
发明人： Jonghwan BAEK , Jeonghyuk PARK , Seungwon IM , Keunhyuk LEE , Dukyong LEE
IPC分类号： H01L23/498 , H01L21/48 , H01L23/00 , H01L25/00 , H01L25/16
CPC分类号： H01L23/49833 , H01L21/4825 , H01L21/4839 , H01L23/49811 , H01L23/49822 , H01L23/49844 , H01L23/49861 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/162 , H01L25/50 , H01L2224/32225 , H01L2224/48139 , H01L2224/48145 , H01L2224/48175 , H01L2224/48225 , H01L2224/73265 , H01L2924/12036 , H01L2924/13055
摘要： A package includes a first direct bonded metal (DBM) substrate, a first semiconductor die disposed on a top surface of the first DBM substrate, a second DBM substrate disposed at a height above the first DBM substrate, and a second semiconductor die disposed on a top surface of the second DBM substrate. A wire bond is made between the first semiconductor die disposed on the top surface of the first DBM substrate and the second semiconductor die disposed on the top surface of the second DBM substrate.
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公开(公告)号：US20240071892A1
公开(公告)日：2024-02-29
申请号：US17900446
申请日：2022-08-31
发明人： Kwang-Soo KIM , Vivek ARORA , Woochan KIM
IPC分类号： H01L23/498 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31 , H01L25/065
CPC分类号： H01L23/49838 , H01L21/4825 , H01L21/4839 , H01L21/4842 , H01L21/565 , H01L23/3121 , H01L23/49811 , H01L23/49822 , H01L23/49861 , H01L23/49866 , H01L24/48 , H01L25/0655 , H01L2224/48137 , H01L2224/48225 , H01L2224/48245 , H01L2224/48464 , H01L2924/1811 , H01L2924/1815 , H01L2924/182
摘要： In examples, a method of manufacturing a semiconductor package comprises providing a lead frame having multiple conductive pins coupled thereto; positioning the lead frame within a mold chase and applying a strip of mold compound to the multiple conductive pins along a length of the lead frame; trimming connections between the lead frame and the multiple conductive pins; bending the multiple conductive pins; trimming the strip of mold compound to singulate the multiple conductive pins from each other and from the lead frame to form singulated conductive pins; coupling a singulated conductive pin from among the singulated conductive pins to a substrate such that a portion of the strip of mold compound coupled to the singulated conductive pin is in contact with the substrate and such that a segment of the singulated conductive pin extends vertically in a plane that is orthogonal to the substrate; coupling a semiconductor die to the substrate; and covering the substrate, the semiconductor die, the portion of the strip of mold compound, and part of the singulated conductive pin with a second mold compound, such that a portion of the segment of the singulated conductive pin extends beyond a top surface of the second mold compound.
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公开(公告)号：US11854925B2
公开(公告)日：2023-12-26
申请号：US17468372
申请日：2021-09-07
申请人： Kioxia Corporation
发明人： Satoshi Kato
IPC分类号： H01L23/48 , H01L23/31 , H01L23/00 , H01L23/498 , H01L21/48 , H01L21/56 , H01L25/065
CPC分类号： H01L23/315 , H01L21/4839 , H01L21/56 , H01L23/49816 , H01L23/49822 , H01L23/49838 , H01L23/49866 , H01L24/48 , H01L25/0657 , H01L2224/48235 , H01L2225/0651 , H01L2225/06562 , H01L2924/1431 , H01L2924/1443 , H01L2924/182
摘要： According to one embodiment, a semiconductor device includes a plurality of stacked semiconductor chips each of which has a first surface having an electrode formed thereon, a plurality of wires each of which has one end portion connected to each of the electrodes of the plurality of semiconductor chips and extends in a stacking direction of the semiconductor chips, a sealing resin that covers the plurality of semiconductor chips, has a second surface having recesses formed therein, and is formed so that the other end portions of the plurality of wires and the recesses overlap each other when viewed from the stacking direction, and a plurality of terminals that is provided so as to fill the recesses, each of which has one end portion connected to the other end portion of each of the plurality of wires and has the other end portion exposed from the sealing resin.
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公开(公告)号：US20230369195A1
公开(公告)日：2023-11-16
申请号：US17948332
申请日：2022-09-20
发明人： Hyeon Uk Kim , Hyun Koo Lee , Jun Hee Park
IPC分类号： H01L23/498 , H01L23/00 , H01L21/48
CPC分类号： H01L23/49844 , H01L24/48 , H01L24/32 , H01L24/73 , H01L23/49833 , H01L23/49861 , H01L23/49811 , H01L24/40 , H01L21/4839 , H01L21/4825 , H01L2924/381 , H01L2224/73215 , H01L2224/73265 , H01L2224/32225 , H01L2224/48155 , H01L2224/73263 , H01L2224/73213 , H01L2224/40155
摘要： Disclosed are a power module and a method for manufacturing the same. A power module according to an embodiment of the present disclosure includes: a first substrate; a second substrate disposed spaced apart from the first substrate and including at least one metal layer; at least one chip disposed between the first substrate and the second substrate and in electrical contact with the metal layer; and a third substrate configured to be disposed spaced apart from the first substrate and the second substrate, electrically connect the chip and at least one external input terminal, include one or more conductive patterns each of which is connected to one of the at least one lead frame, and be formed in a multi-layer structure such that the one or more conductive patterns are not short-circuited to each other.
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公开(公告)号：US20180166620A1
公开(公告)日：2018-06-14
申请号：US15834132
申请日：2017-12-07
发明人： Eiki KAWANO , Norifumi HATTORI
IPC分类号： H01L33/64 , H01L21/66 , H01L23/495 , H01L21/48 , H01L33/62
CPC分类号： H01L33/647 , H01L21/48 , H01L21/4839 , H01L21/4842 , H01L22/32 , H01L23/3107 , H01L23/48 , H01L23/49503 , H01L23/49551 , H01L23/49558 , H01L23/49562 , H01L23/49568 , H01L23/49575 , H01L23/49861 , H01L25/167 , H01L33/62 , H01L2933/0066
摘要： An electronic device includes: a first element which generates heat, and a second element which generates heat; a lead frame which includes: a first portion on which the first element is mounted; a second portion on which the second element is mounted; and a high-heat resistance portion between the first portion and the second portion; and a resin portion which covers a part of the lead frame.
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公开(公告)号：US09922909B2
公开(公告)日：2018-03-20
申请号：US15299371
申请日：2016-10-20
发明人： Nam Jin Kim
IPC分类号： H01L23/29 , H01L21/00 , H01L23/495 , H01L21/48 , H01L23/498 , H01L41/047 , H01L51/52 , H01L27/32
CPC分类号： H01L23/49555 , H01L21/4839 , H01L23/49861 , H01L27/3276 , H01L41/0475 , H01L51/0097 , H01L51/5253 , H01L51/5256 , H01L2251/5338
摘要： A display device is disclosed. In one aspect, the display device includes a substrate including a display area configured to display an image and a peripheral area surrounding the display area. The display device also includes a plurality of signal lines provided in the display area, an encapsulation layer provided over the signal lines and a pad portion provided in the peripheral area. The display device further includes a plurality of connection wires connecting the signal lines and the pad portion, wherein each of the connection wires includes a first portion provided in the peripheral area and a second portion provided in the display area. A portion of the encapsulation layer provided on the display area extends to the peripheral area and placed over the first portions of the connection wires.
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