公开(公告)号：US20120270388A1

公开(公告)日：2012-10-25

申请号：US13533222

申请日：2012-06-26

申请人： Roden Topacio ,  Gabriel Wong

发明人： Roden Topacio ,  Gabriel Wong

IPC分类号： H01L21/768

CPC分类号： H01L23/49816 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/0233 ,  H01L2224/02331 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05008 ,  H01L2224/05012 ,  H01L2224/05013 ,  H01L2224/05014 ,  H01L2224/05015 ,  H01L2224/05022 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05559 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05599 ,  H01L2224/06131 ,  H01L2224/1132 ,  H01L2224/13007 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81815 ,  H01L2924/00 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/0105 ,  H01L2924/01083 ,  H01L2924/01028 ,  H01L2924/01031 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00012

摘要： A routing layer for a semiconductor die is disclosed. The routing layer includes pads for attaching solder bumps; bond-pads bonded to bump-pads of a die having an integrated circuit, and traces interconnecting bond-pads to pads. The routing layer is formed on a layer of dielectric material. The routing layer includes conductive traces at least partially surrounding some pads so as to absorb stress from solder bumps attached to the pads. Parts of the traces that surround pads protect parts of the underlying dielectric material proximate the solder bumps, from the stress.

摘要翻译： 公开了一种用于半导体管芯的布线层。 布线层包括用于附接焊料凸块的焊盘; 键合焊盘键合到具有集成电路的管芯的凸点焊盘，并且将焊接接合焊盘贴到焊盘上。 布线层形成在介电材料层上。 路由层包括至少部分地围绕一些焊盘的导电迹线，以便吸收附着到焊盘的焊料凸起的应力。 围绕焊盘的迹线的一部分保护靠近焊料凸块的基底电介质材料的部分免受应力的影响。

公开(公告)号：US20120241949A1

公开(公告)日：2012-09-27

申请号：US13416405

申请日：2012-03-09

申请人： Naoto Sasaki ,  Hiroshi Ozaki

发明人： Naoto Sasaki ,  Hiroshi Ozaki

IPC分类号： H01L23/498 ,  B23K31/02 ,  H01L21/60

CPC分类号： H05K3/3436 ,  H01L21/4846 ,  H01L21/563 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/02175 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03472 ,  H01L2224/0361 ,  H01L2224/03906 ,  H01L2224/0391 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05559 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/11462 ,  H01L2224/11472 ,  H01L2224/11906 ,  H01L2224/1191 ,  H01L2224/13007 ,  H01L2224/1308 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13565 ,  H01L2224/16014 ,  H01L2224/16145 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81024 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/3841 ,  H05K3/3473 ,  H05K2201/10674 ,  H05K2201/10984 ,  Y02P70/613 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552

摘要： A semiconductor device includes: a solder bump including a barrier metal layer formed on an electrode pad portion of a substrate, and a solder layer formed at a central portion of an upper surface of the barrier metal layer so as to have a smaller outer diameter than that of the barrier metal layer.

摘要翻译： 半导体器件包括：焊料凸块，其包括形成在基板的电极焊盘部分上的阻挡金属层，以及形成在阻挡金属层的上表面的中心部分处的焊料层，以具有比 阻隔金属层。

公开(公告)号：US20120235278A1

公开(公告)日：2012-09-20

申请号：US13406356

申请日：2012-02-27

申请人： Hisao Shigihara ,  Hiromi Shigihara ,  Akira Yajima

发明人： Hisao Shigihara ,  Hiromi Shigihara ,  Akira Yajima

IPC分类号： H01L29/92 ,  H01L21/56 ,  H01L23/498

CPC分类号： H01L24/03 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49503 ,  H01L23/525 ,  H01L23/53238 ,  H01L24/05 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02311 ,  H01L2224/02331 ,  H01L2224/0236 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2224/03462 ,  H01L2224/03472 ,  H01L2224/03906 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05007 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/05557 ,  H01L2224/0556 ,  H01L2224/05562 ,  H01L2224/05564 ,  H01L2224/05566 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/10126 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/10162 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/014 ,  H01L2924/01047 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： Adhesive strength between a rewiring and a solder bump is improved in a semiconductor integrated circuit device in which a bump electrode is connected to a land section of the rewiring. The land section 20A of the rewiring 20 is formed by a five-layer metal film (a barrier metal film 13, a seed film 14, a Cu film 15, a first Ni film 16, and a second Ni film 17) constituting the rewiring 20, the uppermost-layer second Ni film 17 has a larger area than that of the other metal films (the barrier metal film 13, the seed film 14, the Cu film 15, and the first Ni film 16). A solder bump 21 is connected to the surface of the second Ni film 17. At the end portion of the solder bump 21, a polyimide resin film 22 is formed directly under the second Ni film 17.

摘要翻译： 在其中凸起电极连接到重新布线的接地部分的半导体集成电路器件中，重新布线和焊料凸块之间的粘合强度得到改善。 再配线20的陆部20A由构成重新布线的五层金属膜（阻挡金属膜13，种子膜14，Cu膜15，第一Ni膜16，第二Ni膜17）形成 如图20所示，最上层的第二Ni膜17的面积比其他金属膜（阻挡金属膜13，种子膜14，Cu膜15，第一Ni膜16）的面积大。 焊料凸块21连接到第二Ni膜17的表面。在焊料凸块21的端部处，在第二Ni膜17的正下方形成聚酰亚胺树脂膜22。

公开(公告)号：US08269345B2

公开(公告)日：2012-09-18

申请号：US11871096

申请日：2007-10-11

申请人： Pradip D. Patel

发明人： Pradip D. Patel

IPC分类号： H01L23/52 ,  H01L21/00 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/05568 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13007 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13181 ,  H01L2224/16058 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/0106 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/00014 ,  H01L2924/01083 ,  H01L2924/01007 ,  H01L2224/13099

摘要： A bump contact electrically connects a conductor on a substrate and a contact pad on a semiconductor device mounted to the substrate. The first end of an electrically conductive pillar effects electrical contact and mechanical attachment of the pillar to the contact pad with the pillar projecting outwardly from the semiconductor device. A solder crown reflowable at a predetermined temperature into effecting electrical contact and mechanical attachment with the conductor is positioned in axial alignment with the second end of the pillar. A diffusion barrier electrically and mechanically joins the solder bump to the second end of the pillar and resists electro-migration into the first end of the solder crown of copper from the pillar. One diffusion barrier takes the form of a 2-20 micron thick control layer of nickel, palladium, titanium-tungsten, nickel-vanadium, or tantalum nitride positioned between the pillar and the solder crown.

摘要翻译： 凸点接触电连接基板上的导体和安装到基板的半导体器件上的接触焊盘。 导电柱的第一端使柱与电接触垫的电接触和机械连接，柱从半导体器件向外突出。 在预定温度下可回流的焊接表面与导体实现电接触和机械附接定位成与柱的第二端轴向对准。 扩散阻挡层电气地和机械地将焊料凸块连接到柱的第二端，并抵抗从柱子进入到铜的焊锡冠的第一端的电迁移。 一个扩散阻挡层是位于柱和焊料冠之间的镍，钯，钛 - 钨，镍 - 钒或氮化钽的2-20微米厚对照层的形式。

公开(公告)号：US08268717B2

公开(公告)日：2012-09-18

申请号：US13209456

申请日：2011-08-15

申请人： Jing-Hong Yang

发明人： Jing-Hong Yang

IPC分类号： H01L21/44

CPC分类号： H05K3/4007 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/10126 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/1148 ,  H01L2224/13007 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13565 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H05K3/243 ,  H05K2201/0367 ,  H05K2201/09845 ,  H05K2203/054 ,  H05K2203/0597

摘要： A manufacturing method of a bump structure with an annular support includes the following steps. A substrate including pads and a passivation layer is provided. The passivation has first openings exposing a portion of the pads. An UBM material layer is formed to cover the passivation layer and the pads. A patterned photoresist layer, having second openings respectively exposing the UBM material layer over the pads, is formed on the UBM material layer. A diameter of each second opening located on a lower surface of the patterned photoresist layer is less than that located on an upper surface of the patterned photoresist layer. Bumps are formed in the second openings. A portion of the patterned photoresist layer is removed to form an annular support at a periphery of each bump. The UBM material layer is patterned using the annular supports and the bumps as masks to form UBM layers.

摘要翻译： 具有环形支撑件的凸块结构的制造方法包括以下步骤。 提供了包括焊盘和钝化层的衬底。 钝化具有暴露一部分焊盘的第一开口。 形成UBM材料层以覆盖钝化层和焊盘。 在UBM材料层上形成具有分别将UBM材料层暴露在焊盘上的第二开口的图案化光致抗蚀剂层。 位于图案化光致抗蚀剂层的下表面上的每个第二开口的直径小于位于图案化光致抗蚀剂层的上表面上的每个第二开口的直径。 在第二开口中形成凸起。 去除图案化光致抗蚀剂层的一部分以在每个凸起的周边形成环形支撑。 UBM材料层使用环形支撑件和凸块作为掩模来图案化以形成UBM层。

公开(公告)号：US08258005B2

公开(公告)日：2012-09-04

申请号：US13026726

申请日：2011-02-14

申请人： Fumihiro Bekku

发明人： Fumihiro Bekku

IPC分类号： H01L23/48 ,  H01L21/00

CPC分类号： H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/742 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/10126 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/1184 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15788 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor device includes forming an electrode pad in a surface layer of an insulating layer; disposing a conductive particle, of which at least a portion of the surface is coated with a thermoplastic resin, over the electrode pad; and fixing the conductive particle over the electrode pad using the resin, by heating the resin to soften the resin, and then cooling and solidifying the resin after the conductive particle and the electrode pad are electrically connected to each other, to form the conductive particle as an external connection terminal.

摘要翻译： 一种制造半导体器件的方法包括在绝缘层的表面层中形成电极焊盘; 在电极垫上设置其表面的至少一部分被热塑性树脂涂覆的导电颗粒; 并使用树脂将导电粒子固定在电极垫上，通过加热树脂来软化树脂，然后在导电粒子和电极垫彼此电连接之后冷却固化树脂，从而形成导电粒子作为 外部连接端子。

公开(公告)号：US20120217650A1

公开(公告)日：2012-08-30

申请号：US13403338

申请日：2012-02-23

申请人： Hideo IMAI

发明人： Hideo IMAI

IPC分类号： H01L23/538

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L23/562 ,  H01L25/0657 ,  H01L25/074 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05553 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06181 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/13007 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13144 ,  H01L2224/16146 ,  H01L2224/16147 ,  H01L2224/16237 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81895 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/01327 ,  H01L2924/00

摘要： A first substrate with a penetration electrode formed thereon is stacked on a second substrate with a protruding electrode formed thereon. The penetration electrode has a recessed portion. The substrates are stacked with the protruding electrode entered in the recessed portion. A distal width of the protruding electrode is smaller than an opening width of the recessed portion.

摘要翻译： 在其上形成有穿透电极的第一基板层叠在其上形成有突出电极的第二基板上。 穿透电极具有凹部。 基板被突出电极堆叠在凹入部分中。 突出电极的前端宽度小于凹部的开口宽度。

公开(公告)号：US20120217640A1

公开(公告)日：2012-08-30

申请号：US13037181

申请日：2011-02-28

申请人： JoonYoung Choi ,  YoungJoon Kim ,  SungWon Cho

发明人： JoonYoung Choi ,  YoungJoon Kim ,  SungWon Cho

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L24/81 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/97 ,  H01L2224/02126 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/03903 ,  H01L2224/0401 ,  H01L2224/05011 ,  H01L2224/05018 ,  H01L2224/05027 ,  H01L2224/05073 ,  H01L2224/0508 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05552 ,  H01L2224/05558 ,  H01L2224/05566 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/10126 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13007 ,  H01L2224/13014 ,  H01L2224/13022 ,  H01L2224/13076 ,  H01L2224/136 ,  H01L2224/13611 ,  H01L2224/13613 ,  H01L2224/13616 ,  H01L2224/13624 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/01082 ,  H01L2924/00012 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/81805

摘要： A semiconductor wafer has a plurality of semiconductor die with contact pads for electrical interconnect. An insulating layer is formed over the semiconductor wafer. A bump structure is formed over the contact pads. The bump structure has a buffer layer formed over the insulating layer and contact pad. A portion of the buffer layer is removed to expose the contact pad and an outer portion of the insulating layer. A UBM layer is formed over the buffer layer and contact pad. The UBM layer follows a contour of the buffer layer and contact pad. A ring-shaped conductive pillar is formed over the UBM layer using a patterned photoresist layer filled with electrically conductive material. A conductive barrier layer is formed over the ring-shaped conductive pillar. A bump is formed over the conductive barrier layer. The buffer layer reduces thermal and mechanical stress on the bump and contact pad.

摘要翻译： 半导体晶片具有多个具有用于电互连的接触焊盘的半导体管芯。 在半导体晶片上形成绝缘层。 在接触焊盘上形成凸块结构。 凸块结构具有形成在绝缘层和接触垫上的缓冲层。 去除缓冲层的一部分以暴露接触焊盘和绝缘层的外部部分。 在缓冲层和接触垫上形成UBM层。 UBM层遵循缓冲层和接触垫的轮廓。 使用填充有导电材料的图案化光致抗蚀剂层在UBM层之上形成环形导电柱。 导电阻挡层形成在环形导电柱上。 在导电阻挡层上形成凸块。 缓冲层减少凸块和接触垫上的热应力和机械应力。

公开(公告)号：US20120153498A1

公开(公告)日：2012-06-21

申请号：US13240533

申请日：2011-09-22

申请人： Un-Byoung Kang ,  Kwang-chul Choi ,  Jung-Hwan Kim ,  Tae Hong Min ,  Hojin Lee ,  Minseung Yoon

发明人： Un-Byoung Kang ,  Kwang-chul Choi ,  Jung-Hwan Kim ,  Tae Hong Min ,  Hojin Lee ,  Minseung Yoon

IPC分类号： H01L23/48

CPC分类号： H01L21/4835 ,  H01L21/6836 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/3192 ,  H01L23/49827 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0657 ,  H01L27/14618 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02166 ,  H01L2224/02313 ,  H01L2224/02372 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/024 ,  H01L2224/03462 ,  H01L2224/03466 ,  H01L2224/03602 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/06138 ,  H01L2224/06181 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29011 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： In a semiconductor device, an organic insulation pattern is disposed between first and second rerouting patterns. The organic insulation pattern may absorb the physical stress that occurs when the first and second rerouting patterns expand under heat. Since the organic insulation pattern is disposed between the first and second rerouting patterns, insulating properties can be increased relative to a semiconductor device in which a semiconductor pattern is disposed between rerouting patterns. Also, since a seed layer pattern is disposed between the first and second rerouting patterns and the organic insulation pattern and between the substrate and the organic insulation pattern, the adhesive strength of the first and second rerouting patterns is enhanced. This also reduces any issues with delamination. Also, the seed layer pattern prevents the metal that forms the rerouting pattern from being diffused to the organic insulation pattern. Therefore, a semiconductor device with enhanced reliability may be implemented.

摘要翻译： 在半导体器件中，有机绝缘图案设置在第一和第二重新布线图案之间。 有机绝缘图案可以吸收当第一和第二重新布线图案在加热下膨胀时发生的物理应力。 由于有机绝缘图案设置在第一和第二重新布线图案之间，所以可以相对于其中在重新布线图案之间设置半导体图案的半导体器件来增加绝缘性能。 此外，由于在第一和第二重新布线图案和有机绝缘图案之间以及基板和有机绝缘图案之间设置种子层图案，所以第一和第二布线图案的粘合强度提高。 这也减少了分层问题。 此外，种子层图案防止形成重新布线图案的金属扩散到有机绝缘图案。 因此，可以实现具有增强的可靠性的半导体器件。

公开(公告)号：US20120091578A1

公开(公告)日：2012-04-19

申请号：US13107678

申请日：2011-05-13

申请人： Hsien-Wei CHEN

发明人： Hsien-Wei CHEN

IPC分类号： H01L23/498 ,  H01L21/28

CPC分类号： H01L24/06 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/0603 ,  H01L2224/0612 ,  H01L2224/0613 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/06179 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/13005 ,  H01L2224/13007 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1412 ,  H01L2224/16225 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/2064 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599

摘要： The present application describes an semiconductor chip having a substrate, a first conductive pad formed over the substrate, a second conductive pad formed over the substrate and positioned farther from a geometric center of the semiconductor chip than the first conductive pad, a first under bump metallurgy (UBM) structure formed over the first conductive pad, and a second UBM structure formed over the second conductive pad. The first conductive pad and the first UBM structure has a first pad width to UBM width ratio, and the second conductive pad and the second UBM structure has a second pad width to UBM width ratio that is greater than the first ratio.

摘要翻译： 本申请描述了一种具有衬底的半导体芯片，在衬底上形成的第一导电焊盘，形成在衬底上并位于比第一导电焊盘更远离半导体芯片的几何中心的第二导电焊盘，第一凸块下金属冶金 （UBM）结构，以及形成在第二导电焊盘上的第二UBM结构。 第一导电焊盘和第一UBM结构具有第一焊盘宽度与UBM宽度比，并且第二导电焊盘和第二UBM结构具有大于第一比例的第二焊盘宽度与UBM宽度比。