公开(公告)号：US08735287B2

公开(公告)日：2014-05-27

申请号：US13488930

申请日：2012-06-05

Applicant: Belgacem Haba ,  Giles Humpston ,  Moti Margalit

Inventor： Belgacem Haba ,  Giles Humpston ,  Moti Margalit

IPC: H01L21/441

CPC classification number: H01L21/76898 ,  H01L21/76805 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/12 ,  H01L24/24 ,  H01L24/82 ,  H01L24/95 ,  H01L24/96 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/2518 ,  H01L2224/82039 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/00

Abstract: A microelectronic unit can include a semiconductor element having a front surface, a microelectronic semiconductor device adjacent to the front surface, contacts at the front surface and a rear surface remote from the front surface. The semiconductor element can have through holes extending from the rear surface through the semiconductor element and through the contacts. A dielectric layer can line the through holes. A conductive layer may overlie the dielectric layer within the through holes. The conductive layer can conductively interconnect the contacts with unit contacts.

Abstract translation: 微电子单元可以包括具有前表面的半导体元件，与前表面相邻的微电子半导体器件，在前表面处的接触和远离前表面的后表面。 半导体元件可以具有从后表面穿过半导体元件并通过触点延伸的通孔。 电介质层可以对通孔进行排列。 导电层可覆盖通孔内的电介质层。 导电层可以将触点与单元触点导电互连。

公开(公告)号：US08680684B2

公开(公告)日：2014-03-25

申请号：US13346167

申请日：2012-01-09

Applicant: Belgacem Haba ,  Kyong-Mo Bang

Inventor： Belgacem Haba ,  Kyong-Mo Bang

IPC: H01L23/48

CPC classification number: H01L25/0655 ,  B81C1/00301 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/367 ,  H01L24/13 ,  H01L24/16 ,  H01L24/20 ,  H01L24/48 ,  H01L24/49 ,  H01L24/96 ,  H01L25/0652 ,  H01L25/105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/221 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2224/4911 ,  H01L2224/96 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/19107 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A microelectronic assembly includes a first microelectronic package having a substrate with first and second opposed surfaces and substrate contacts thereon. The first package further includes first and second microelectronic elements, each having element contacts electrically connected with the substrate contacts and being spaced apart from one another on the first surface so as to provide an interconnect area of the first surface between the first and second microelectronic elements. A plurality of package terminals at the second surface are electrically interconnected with the substrate contacts for connecting the package with a component external thereto. A plurality of stack terminals are exposed at the first surface in the interconnect area for connecting the package with a component overlying the first surface of the substrate. The assembly further includes a second microelectronic package overlying the first microelectronic package and having terminals joined to the stack terminals of the first microelectronic package.

Abstract translation: 微电子组件包括具有其上具有第一和第二相对表面的衬底的衬底接触件的第一微电子封装。 第一封装还包括第一和第二微电子元件，每个微电子元件具有与基板触点电连接并且在第一表面上彼此间隔开的元件触点，以便在第一和第二微电子元件之间提供第一表面的互连区域 。 在第二表面处的多个封装端子与衬底触头电连接，用于将封装与外部的部件连接。 多个堆叠端子在互连区域中的第一表面处露出，用于将封装件与覆盖在基板的第一表面上的部件连接。 组件还包括覆盖第一微电子封装并具有连接到第一微电子封装的堆叠端子的端子的第二微电子封装。

公开(公告)号：US08652935B2

公开(公告)日：2014-02-18

申请号：US12970529

申请日：2010-12-16

Applicant: Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell ,  Vage Oganesian ,  Belgacem Haba

Inventor： Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell ,  Vage Oganesian ,  Belgacem Haba

IPC: H01L21/30

CPC classification number: H01L23/562 ,  B81C1/00269 ,  B81C1/00357 ,  H01L21/2007 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L23/13 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L29/0657 ,  H01L2224/29186 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/83051 ,  H01L2224/83191 ,  H01L2224/83345 ,  H01L2224/83385 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/1027 ,  H01L2924/1032 ,  H01L2924/1037 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/3511 ,  H01L2224/83 ,  H01L2924/00

Abstract: A method of bonding first and second microelectronic elements includes pressing together a first substrate containing active circuit elements therein with a second substrate, with a flowable dielectric material between confronting surfaces of the respective substrates, each of the first and second substrates having a coefficient of thermal expansion less than 10 parts per million/° C., at least one of the confronting surfaces having a plurality of channels extending from an edge of such surface, such that the dielectric material between planes defined by the confronting surfaces is at least substantially free of voids and has a thickness over one micron, and at least some of the dielectric material flows into at least some of the channels.

Abstract translation: 接合第一和第二微电子元件的方法包括将含有有源电路元件的第一衬底与第二衬底压在一起，在相应衬底的相对表面之间具有可流动介电材料，第一和第二衬底中的每一个具有热系数 膨胀小于10ppm /℃，至少一个相对表面具有从该表面的边缘延伸的多个通道，使得由相对表面限定的平面之间的电介质材料至少基本上不含 空隙并且具有超过一微米的厚度，并且至少一些介电材料流入至少一些通道。

公开(公告)号：US08610260B2

公开(公告)日：2013-12-17

申请号：US13439299

申请日：2012-04-04

Applicant: Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba ,  Frank Lambrecht

Inventor： Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba ,  Frank Lambrecht

IPC: H01L23/48

CPC classification number: H01L23/49838 ,  G11C5/04 ,  G11C5/063 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/48 ,  H01L23/4824 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/52 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L27/108 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05554 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/06156 ,  H01L2224/06164 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81447 ,  H01L2224/81805 ,  H01L2224/9202 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1064 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/3011 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic package can include a substrate and a microelectronic element having a face and one or more columns of contacts thereon which face and are joined to corresponding contacts on a surface of the substrate. An axial plane may intersect the face along a line in the first direction and centered relative to the columns of element contacts. Columns of package terminals can extend in the first direction. First terminals in a central region of the second surface can be configured to carry address information usable to determine an addressable memory location within the microelectronic element. The central region may have a width not more than three and one-half times a minimum pitch between the columns of package terminals. The axial plane can intersect the central region.

Abstract translation: 微电子封装可以包括衬底和微电子元件，其具有面和在其上的一个或多个接触柱，其面对并连接到衬底的表面上的对应接触。 轴向平面可以沿着第一方向的线与面相交，并且相对于元件触点的列居中。 封装端子的列可以沿第一方向延伸。 可以将第二表面的中心区域中的第一端子配置为携带可用于确定微电子元件内的可寻址存储器位置的地址信息。 中心区域可以具有不大于封装端子列之间的最小间距的三倍和五倍的宽度。 轴向平面可以与中心区域相交。

公开(公告)号：US08610259B2

公开(公告)日：2013-12-17

申请号：US12884695

申请日：2010-09-17

Applicant: Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/48

CPC classification number: H01L23/49827 ,  H01L21/6835 ,  H01L23/481 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2223/6622 ,  H01L2224/05009 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/0557 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A microelectronic unit includes a semiconductor element consisting essentially of semiconductor material and having a front surface, a rear surface, a plurality of active semiconductor devices adjacent the front surface, a plurality of conductive pads exposed at the front surface, and an opening extending through the semiconductor element. At least one of the conductive pads can at least partially overlie the opening and can be electrically connected with at least one of the active semiconductor devices. The microelectronic unit can also include a first conductive element exposed at the rear surface for connection with an external component, the first conductive element extending through the opening and electrically connected with the at least one conductive pad, and a second conductive element extending through the opening and insulated from the first conductive element. The at least one conductive pad can overlie a peripheral edge of the second conductive element.

Abstract translation: 微电子单元包括基本上由半导体材料组成的半导体元件，其具有前表面，后表面，与前表面相邻的多个有源半导体器件，在前表面暴露的多个导电焊盘，以及延伸穿过 半导体元件。 至少一个导电焊盘可以至少部分地覆盖开口并且可以与至少一个有源半导体器件电连接。 微电子单元还可以包括暴露在后表面处以与外部部件连接的第一导电元件，第一导电元件延伸穿过开口并与至少一个导电焊盘电连接，第二导电元件延伸穿过开口 并与第一导电元件绝缘。 至少一个导电焊盘可以覆盖在第二导电元件的周边边缘上。

公开(公告)号：US20130328186A1

公开(公告)日：2013-12-12

申请号：US13492064

申请日：2012-06-08

Applicant: Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Terrence Caskey ,  Kishor V. Desai ,  Huailiang Wei ,  Craig Mitchell ,  Belgacem Haba

Inventor： Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Terrence Caskey ,  Kishor V. Desai ,  Huailiang Wei ,  Craig Mitchell ,  Belgacem Haba

IPC: H01L23/48 ,  H01L21/28 ,  H01L23/498

CPC classification number: H01L23/34 ,  H01L21/76841 ,  H01L21/76883 ,  H01L21/76885 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/1134 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/13565 ,  H01L2224/32105 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/81805

Abstract: A component can include a substrate and a conductive via extending within an opening in the substrate. The substrate can have first and second opposing surfaces. The opening can extend from the first surface towards the second surface and can have an inner wall extending away from the first surface. A dielectric material can be exposed at the inner wall. The conductive via can define a relief channel within the opening adjacent the first surface. The relief channel can have an edge within a first distance from the inner wall in a direction of a plane parallel to and within five microns below the first surface, the first distance being the lesser of one micron and five percent of a maximum width of the opening in the plane. The edge can extend along the inner wall to span at least five percent of a circumference of the inner wall.

Abstract translation: 部件可以包括在基板的开口内延伸的基板和导电通孔。 基底可以具有第一和第二相对表面。 开口可以从第一表面延伸到第二表面，并且可以具有远离第一表面延伸的内壁。 电介质材料可以在内壁暴露。 导电通孔可以在邻近第一表面的开口内限定释放通道。 释放通道可以具有在与第一表面平行且在五微米以内的平面的方向上离内壁的第一距离内的边缘，第一距离是最小宽度的一微米和百分之五的最小宽度 在飞机上开了 边缘可以沿着内壁延伸以跨越内壁的圆周的至少百分之五。

公开(公告)号：US08604348B2

公开(公告)日：2013-12-10

申请号：US13155825

申请日：2011-06-08

Applicant: Yoichi Kubota ,  Teck-Gyu Kang ,  Jae M. Park ,  Belgacem Haba

Inventor： Yoichi Kubota ,  Teck-Gyu Kang ,  Jae M. Park ,  Belgacem Haba

IPC: H05K1/00 ,  H05K1/16

CPC classification number: H05K1/0366 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/1532 ,  H05K3/06 ,  H05K3/4007 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2203/063 ,  H05K2203/0733 ,  Y10T29/49126 ,  Y10T29/49156 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A packaged microelectronic element includes connection component incorporating a dielectric layer (22) carrying traces (58) remote from an outer surface (26), posts (48) extending from the traces and projecting beyond the outer surface of the dielectric, and pads (30) exposed at the outer surface of the dielectric layer, the pads being connected to the posts by the traces. The dielectric element overlies the front surface of a microelectronic element, and contacts (74) exposed on the front surface of the microelectronic element are connected to the pads by elongated leads (76) such as wire bonds. Methods of making the connection component are also disclosed.

Abstract translation: 封装的微电子元件包括连接部件，其包括承载远离外表面（26）的迹线（58）的介电层（22），从该迹线延伸并突出超过电介质外表面的柱（48） ）暴露在介电层的外表面处，焊盘通过迹线连接到柱。 电介质元件覆盖在微电子元件的前表面上，暴露在微电子元件的前表面上的触点（74）通过诸如引线键的细长引线（76）连接到焊盘。 还公开了制造连接部件的方法。

公开(公告)号：US08581377B2

公开(公告)日：2013-11-12

申请号：US12883556

申请日：2010-09-16

Applicant: Belgacem Haba ,  Brian Marcucci

Inventor： Belgacem Haba ,  Brian Marcucci

IPC: H01L23/495

CPC classification number: H01L24/89 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/4951 ,  H01L23/49555 ,  H01L23/49589 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/04042 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/4826 ,  H01L2224/49109 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A semiconductor device of an illustrative embodiment includes a die, a lead frame including a plurality of leads having substantial portions arranged in a lead plane and electrically connected to the die. Most preferably, the package includes at least a substantial portion of one conductive element arranged in a plane positioned adjacent the lead frame and substantially parallel to the lead plane, the conductive element being capacitively coupled to the leads such that the conductive element and at least one of the leads cooperatively define a controlled-impedance conduction path, and an encapsulant which encapsulates the leads and the conductive element. The leads and, desirably, the conductive element have respective connection regions which are not covered by the encapsulant.

Abstract translation: 示例性实施例的半导体器件包括管芯，引线框架，其包括多个引线，其具有布置在引线平面中并且电连接到管芯的实质部分。 最优选地，封装包括布置在邻近引线框架并且基本上平行于引线平面的平面中的一个导电元件的至少大部分，导电元件电容耦合到引线，使得导电元件和至少一个 引线协调地限定受控阻抗传导路径，以及密封剂，其封装引线和导电元件。 引线和理想的导电元件具有不被密封剂覆盖的各自的连接区域。

公开(公告)号：US08531039B2

公开(公告)日：2013-09-10

申请号：US12759196

申请日：2010-04-13

Applicant: Philip Damberg ,  Belgacem Haba ,  David B. Tuckerman ,  Teck-Gyu Kang

Inventor： Philip Damberg ,  Belgacem Haba ,  David B. Tuckerman ,  Teck-Gyu Kang

IPC: H01L29/40

CPC classification number: H01L23/4985 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K1/118 ,  H05K3/326 ,  H05K3/3436 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09063 ,  H05K2201/09081 ,  H05K2201/10674 ,  H01L2924/00

Abstract: A microelectronic package includes a microelectronic element having faces and contacts, a flexible substrate overlying and spaced from a first face of the microelectronic element, and a plurality of conductive terminals exposed at a surface of the flexible substrate. The conductive terminals are electrically interconnected with the microelectronic element and the flexible substrate includes a gap extending at least partially around at least one of the conductive terminals. In certain embodiments, the package includes a support layer, such as a compliant layer, disposed between the first face of the microelectronic element and the flexible substrate. In other embodiments, the support layer includes at least one opening that is at least partially aligned with one of the conductive terminals.

Abstract translation: 微电子封装包括具有面和触点的微电子元件，覆盖并与微电子元件的第一面间隔开的柔性基板，以及暴露在柔性基板的表面处的多个导电端子。 导电端子与微电子元件电互连，并且柔性基板包括至少部分地围绕至少一个导电端子延伸的间隙。 在某些实施例中，封装包括设置在微电子元件的第一面和柔性基板之间的支撑层，例如顺应层。 在其他实施例中，支撑层包括至少一个与导电端子之一至少部分对准的开口。

公开(公告)号：US08525327B2

公开(公告)日：2013-09-03

申请号：US13439286

申请日：2012-04-04

Applicant: Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba ,  Frank Lambrecht

Inventor： Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba ,  Frank Lambrecht

IPC: H01L23/34 ,  H01L23/498

CPC classification number: H01L23/49838 ,  G11C5/04 ,  G11C5/063 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/48 ,  H01L23/4824 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/52 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L27/108 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05554 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/06156 ,  H01L2224/06164 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81447 ,  H01L2224/81805 ,  H01L2224/9202 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1064 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/3011 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic package can include a substrate and a microelectronic element having a face and one or more columns of contacts thereon which face and are joined to corresponding contacts on a surface of the substrate. An axial plane may intersect the face along a line in the first direction and centered relative to the columns of element contacts. Columns of package terminals can extend in the first direction. First terminals in a central region of the second surface can be configured to carry address information usable to determine an addressable memory location within the microelectronic element. The central region may have a width not more than three and one-half times a minimum pitch between the columns of package terminals. The axial plane can intersect the central region.