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公开(公告)号：US20240234525A9
公开(公告)日：2024-07-11
申请号：US18234596
申请日：2023-08-16
发明人： Jun Ki Park , Sung Hwan Kim , Wan Don Kim , Heung Seok Ryu
IPC分类号： H01L29/417 , H01L21/285 , H01L29/06 , H01L29/40 , H01L29/423 , H01L29/45 , H01L29/66 , H01L29/775
CPC分类号： H01L29/41733 , H01L21/28518 , H01L29/0673 , H01L29/401 , H01L29/42392 , H01L29/45 , H01L29/66439 , H01L29/775
摘要： A semiconductor device includes an active pattern extending in a first direction, a plurality of gate structures on the active pattern spaced in the first direction, and including a gate electrode extending in a second direction, a source/drain pattern between adjacent gate structures, a silicide mask pattern on the source/drain pattern, an upper surface of the silicide mask pattern being lower than an upper surface of the gate electrode, a source/drain contact on the source/drain pattern connected to the source/drain pattern, and a contact silicide film between the source/drain contact and the source/drain pattern in contact with a bottom surface of the silicide mask pattern, wherein a height from a lowermost part of the source/drain pattern to a lowermost part of the source/drain contact is smaller than a height from the lowermost part of the source/drain pattern to the bottom surface of the silicide mask pattern.
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公开(公告)号：US20240234417A9
公开(公告)日：2024-07-11
申请号：US18379731
申请日：2023-10-13
发明人： Byeol Hae EOM , Byung Ha CHOI , Keun Hwi CHO , Sung Won KIM , Yuri MASUOKA , Won Cheol JEONG
IPC分类号： H01L27/092 , H01L29/06 , H01L29/417 , H01L29/423 , H01L29/775
CPC分类号： H01L27/092 , H01L29/0673 , H01L29/41733 , H01L29/42392 , H01L29/775
摘要： A semiconductor device includes a first element separation structure, a second element separation structure, and a third element separation structure sequentially disposed along a first direction and extending in a second direction intersecting the first direction; a first active pattern extending in the first direction between the first element separation structure and the second element separation structure; a second active pattern extending in the first direction between the second element separation structure and the third element separation structure and separated from the first active pattern by the second element separation structure; a first gate electrode extending in the second direction on the first active pattern; and a plurality of second gate electrodes extending in the second direction on the second active pattern, wherein a width of the first active pattern in the second direction is greater than a width of the second active pattern in the second direction.
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公开(公告)号：US12033867B2
公开(公告)日：2024-07-09
申请号：US18142213
申请日：2023-05-02
发明人： Shunpei Yamazaki , Junichi Koezuka
IPC分类号： H01L29/49 , G02F1/1343 , G02F1/1368 , H01L21/385 , H01L27/12 , H01L29/417 , H01L29/51 , H01L29/66 , H01L29/786
CPC分类号： H01L21/385 , G02F1/134309 , G02F1/13439 , G02F1/1368 , H01L27/1225 , H01L27/124 , H01L29/41733 , H01L29/4908 , H01L29/4958 , H01L29/4966 , H01L29/513 , H01L29/518 , H01L29/66969 , H01L29/7869 , H01L29/78696 , G02F2201/123
摘要： In a transistor including an oxide semiconductor layer, an oxide insulating layer is formed so as to be in contact with the oxide semiconductor layer. Then, oxygen is introduced (added) to the oxide semiconductor layer through the oxide insulating layer, and heat treatment is performed. Through these steps of oxygen introduction and heat treatment, impurities such as hydrogen, moisture, a hydroxyl group, or hydride are intentionally removed from the oxide semiconductor layer, so that the oxide semiconductor layer is highly purified.
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公开(公告)号：US20240222522A1
公开(公告)日：2024-07-04
申请号：US18192653
申请日：2023-03-30
发明人： Shuaiyi WANG
IPC分类号： H01L29/786 , H01L29/417
CPC分类号： H01L29/78696 , H01L29/41733
摘要： The present application provides a display panel, the display panel includes an electrostatic protection circuit. The electrostatic protection circuit includes at least one thin film transistor. The thin film transistor includes an active layer. The active layer includes a channel portion. Disposing at least one auxiliary electrode on the channel portion and making the auxiliary electrode contact the channel portion can use the additional auxiliary electrode to increase plasma to affect uniformity of the channel portion such that a leakage current of the thin film transistor is reduced to improve display quality of the display panel.
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公开(公告)号：US20240222448A1
公开(公告)日：2024-07-04
申请号：US18148577
申请日：2022-12-30
发明人： Eric Miller , Nelson Felix , Andrew Herbert Simon
IPC分类号： H01L29/417 , H01L21/768 , H01L21/8234 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/775 , H01L29/786
CPC分类号： H01L29/41733 , H01L21/76831 , H01L21/823412 , H01L21/823418 , H01L29/0673 , H01L29/42392 , H01L29/66439 , H01L29/775 , H01L29/78696
摘要： A semiconductor device includes first and second nanosheet stacks above an upper surface of a semiconductor substrate, a first source/drain on an end of the first nanosheet stack, and a second source/drain on an end of the second nanosheet stack. A first gate stack wraps around individual channels of the first nanosheet stack and a second gate stack wraps around individual channels the second nanosheet stack. An interlayer dielectric covers the first and second nanosheet stacks, the first and second source/drains, and the first and second gate stacks. The semiconductor device further includes a first source/drain contact that contacts the first source/drain and a second source/drain contact that contacts the second source/drain. The first and second source/drain contacts extend continuously from the first and second source/drains, respectively, to an upper surface of the interlayer dielectric.
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公开(公告)号：US20240222447A1
公开(公告)日：2024-07-04
申请号：US18090048
申请日：2022-12-28
申请人： Intel Corporation
发明人： Reken Patel , Conor P. Puls , Krishna Ganesan , Akitomo Matsubayashi , Diana Ivonne Paredes , Sunzida Ferdous , Brian Greene , Lateef Uddin Syed , Kyle T. Horak , Lin Hu , Anupama Bowonder , Swapnadip Ghosh , Amritesh Rai , Shruti Subramanian , Gordon S. Freeman
IPC分类号： H01L29/417 , H01L21/28 , H01L21/8238 , H01L27/092 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/775
CPC分类号： H01L29/41733 , H01L21/28123 , H01L21/823828 , H01L21/823871 , H01L21/823878 , H01L27/092 , H01L29/0673 , H01L29/42392 , H01L29/66439 , H01L29/775
摘要： An integrated circuit includes a first device, and a laterally adjacent second device. The first device includes a first body of semiconductor material extending laterally from a first source or drain region, a first gate structure on the first body, and a first contact extending vertically upward from the first source or drain region. The second device includes a second body of semiconductor material extending laterally from a second source or drain region, a second gate structure on the second body, and a second contact extending vertically upward from the second source or drain region. A gate cut structure including dielectric material is laterally between the first gate structure and the second gate structure, and also laterally between the first contact and the second contact. In some examples, a third contact extends laterally from the first contact to the second contact and passes over the gate cut structure.
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公开(公告)号：US20240222446A1
公开(公告)日：2024-07-04
申请号：US17996787
申请日：2022-08-30
发明人： Fei Ai , Dewei Song
IPC分类号： H01L29/417 , H01L29/08 , H01L29/49 , H01L29/66 , H01L29/786
CPC分类号： H01L29/41733 , H01L29/0847 , H01L29/4908 , H01L29/66757 , H01L29/66969 , H01L29/78675 , H01L29/7869
摘要： The present application provides a thin film transistor and an electronic device. The thin film transistor includes: a crystalline active pattern, wherein the crystalline active pattern includes a channel and two contact portions, and the two contact portions are connected to opposite two sides of the channel in a direction intersecting a thickness direction of the crystalline active pattern; a groove located on at least one of the two contact portions and extending in the thickness direction of the crystalline active pattern; a source electrode and a drain electrode connected to the two contact portions, respectively; and an insulating layer being in contact with the channel.
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公开(公告)号：US12029024B2
公开(公告)日：2024-07-02
申请号：US17538064
申请日：2021-11-30
发明人： Deokhan Bae , Juhun Park , Yuri Lee , Yoonyoung Jung , Sooyeon Hong
IPC分类号： H01L27/12 , H01L29/06 , H01L29/417 , H01L29/423 , H01L29/78 , H01L29/786 , H10B10/00
CPC分类号： H10B10/125 , H01L29/0665 , H01L29/41733 , H01L29/41791 , H01L29/42392 , H01L29/7851 , H01L29/78696
摘要： A semiconductor memory device includes an active pattern on a substrate, the active pattern including a source/drain pattern in an upper portion thereof, a gate electrode on the active pattern and extended in a first direction, the gate electrode and the source/drain pattern adjacent to each other in a second direction that crosses the first direction, and a shared contact coupled to the source/drain pattern and the gate electrode to electrically connect the source/drain pattern and the gate electrode. The shared contact includes active and gate contacts, which are electrically connected to the source/drain pattern and the gate electrode, respectively. The gate contact includes a body portion coupled to the gate electrode and a protruding portion, which protrudes from the body portion in the second direction and extends into and buried in the active contact.
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公开(公告)号：US20240203882A1
公开(公告)日：2024-06-20
申请号：US18197381
申请日：2023-05-15
发明人： Jongjin LEE , Jaejik BAEK , Myunghoon JUNG , Kang-ill SEO
IPC分类号： H01L23/528 , H01L29/06 , H01L29/40 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/775
CPC分类号： H01L23/5286 , H01L23/5283 , H01L29/0673 , H01L29/401 , H01L29/41733 , H01L29/42392 , H01L29/66439 , H01L29/775
摘要： Provided is a method of manufacturing an integrated circuit device. The method includes forming a semiconductor device, wherein the semiconductor device has one or more source/drain structures, one or more channel structures and wherein the substrate is on a first side of the semiconductor device. The method also includes forming a back-end-of-line (BEOL) region and forming a bottle-neck shaped backside contact structure in the substrate and in contact with a first source/drain structure of the semiconductor device, wherein the bottle-neck shaped backside contact structure has a first side contacting the first source/drain structure, a second side contacting a backside power rail, and sidewalls extending from the first source/drain structure to the backside power rail; and wherein the backside contact structure has a first region having a positive slope and a second region, adjacent to the first region, having no slope.
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公开(公告)号：US12014982B2
公开(公告)日：2024-06-18
申请号：US17463203
申请日：2021-08-31
发明人： Cheng-Yu Lin , Jung-Chan Yang , Hui-Zhong Zhuang , Sheng-Hsiung Chen , Kuo-Nan Yang , Chih-Liang Chen , Lee-Chung Lu
IPC分类号： G06F30/30 , G06F30/347 , G06F30/392 , G06F30/394 , H01L23/50 , H01L23/528 , H01L27/07 , H01L27/118 , H01L29/417 , H01L27/02
CPC分类号： H01L23/528 , G06F30/347 , G06F30/392 , G06F30/394 , H01L23/50 , H01L27/07 , H01L27/11807 , H01L29/41733 , H01L27/0207 , H01L2027/11879 , H01L2027/11881 , H01L2027/11887
摘要： An IC device includes first and second cells adjacent each other and over a substrate. The first cell includes a first IO pattern along a first track among a plurality of tracks in a first metal layer, the plurality of tracks elongated along a first axis and spaced from each other along a second axis. The second cell includes a plurality of conductive patterns along corresponding different tracks among the plurality of tracks in the first metal layer, each of the plurality of conductive patterns being an IO pattern of the second cell or a floating conductive pattern. The first metal layer further includes a first connecting pattern along the first track and connects the first IO pattern and a second IO pattern of the second cell. The second IO pattern is one of the plurality of conductive patterns of the second cell and is along the first track.
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