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    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
    2.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20140070309A1

    公开(公告)日：2014-03-13

    申请号：US13784751

    申请日：2013-03-04

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Takayuki Sakai

    IPC分类号： H01L27/07 ,  H01L21/8232

    CPC分类号： H01L27/07 ,  H01L21/2257 ,  H01L21/3065 ,  H01L21/8232 ,  H01L29/0657 ,  H01L29/0865 ,  H01L29/0869 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7813

    摘要： A semiconductor device is provided with a semiconductor substrate including a drain layer of a first conductivity type, a base layer of a second conductivity type, and a source layer of the first conductivity type, a gate insulating film, a gate electrode, an insulating section, a source electrode, and a drain electrode. Gate trenches are formed on an upper surface of the semiconductor substrate. A curved section is formed on the upper surface of the semiconductor substrate between the gate trenches in the semiconductor substrate. The base layer is disposed between the gate trenches, and the source layer is formed above the base layer at both ends of the curved section.

    摘要翻译： 半导体器件设置有包括第一导电类型的漏极层，第二导电类型的基极层和第一导电类型的源极层的栅极绝缘膜，栅电极，绝缘部分 源电极和漏电极。 栅极沟槽形成在半导体衬底的上表面上。 在半导体衬底的栅极沟槽之间的半导体衬底的上表面上形成弯曲部分。 基极层设置在栅极沟槽之间，源极层在弯曲部分的两端形成在基底层的上方。

    SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20110215418A1

    公开(公告)日：2011-09-08

    申请号：US13029925

    申请日：2011-02-17

    申请人： Wataru SAITO ,  Syotaro Ono ,  Munehisa Yabuzaki ,  Shunji Taniuchi ,  Miho Watanabe

    发明人： Wataru SAITO ,  Syotaro Ono ,  Munehisa Yabuzaki ,  Shunji Taniuchi ,  Miho Watanabe

    IPC分类号： H01L27/07 ,  H01L29/72

    CPC分类号： H01L27/07 ,  H01L29/72

    摘要： According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type, a first main electrode, a third semiconductor region of a second conductivity type, a second main electrode, and a plurality of embedded semiconductor regions of the second conductivity type. The second semiconductor region is formed on a first major surface of the first semiconductor region. The first main electrode is formed on a face side opposite to the first major surface of the first semiconductor region. The third semiconductor region is formed on a second major surface of the second semiconductor region on a side opposite to the first semiconductor region. The second main electrode is formed to bond to the third semiconductor region. The embedded semiconductor regions are provided in a termination region. A distance between the embedded semiconductor region and the second major surface along a direction from the second major surface toward the first major surface becomes longer toward outside from the device region.

    摘要翻译： 根据一个实施例，半导体器件包括第一导电类型的第一半导体区域，第一导电类型的第二半导体区域，第一主电极，第二导电类型的第三半导体区域，第二主电极和 多个第二导电类型的嵌入式半导体区域。 第二半导体区域形成在第一半导体区域的第一主表面上。 第一主电极形成在与第一半导体区域的第一主表面相对的正面上。 第三半导体区域形成在第二半导体区域的与第一半导体区域相对的一侧的第二主表面上。 第二主电极形成为结合到第三半导体区域。 嵌入式半导体区域设置在终端区域中。 沿着从第二主表面朝向第一主表面的方向在嵌入式半导体区域和第二主表面之间的距离从器件区域向外部变长。