公开(公告)号：US11942323B2

公开(公告)日：2024-03-26

申请号：US17455436

申请日：2021-11-18

申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

发明人： Shay Reboh

IPC分类号： H01L21/00 ,  H01L21/02 ,  H01L21/225

CPC分类号： H01L21/2256 ,  H01L21/02164 ,  H01L21/2257

摘要： A method for forming a doped zone of a transistor includes providing a stack having at least one active layer made from a semiconductor material, and a transistor gate pattern having at least one lateral side, and modifying a portion of the active layer so as to form a modified portion made of a modified semiconductor material. The modified portion extends down to the at least one lateral side of the gate pattern, at the edge of a non-modified portion above which the gate pattern is located. The method also includes forming a spacer on the lateral side, removing the modified portion by selective etching of the modified semiconductor material with respect to the semiconductor material of the non-modified portion, so as to expose an edge of the non-modified portion, and forming the doped zone by epitaxy starting from the exposed edge.

公开(公告)号：US20230298935A1

公开(公告)日：2023-09-21

申请号：US18322882

申请日：2023-05-24

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： J. J. LEE ,  Chun-Tse TSAI ,  M. C. HANG

IPC分类号： H01L21/768 ,  H01L21/28 ,  H01L21/225 ,  H01L21/02 ,  H01L29/49

CPC分类号： H01L21/76829 ,  H01L21/28035 ,  H01L21/2257 ,  H01L21/02216 ,  H01L28/84 ,  H01L29/4925 ,  H01L21/28044

摘要： A semiconductor device includes a first polysilicon structure, wherein the first polysilicon structure has a first grain size. The semiconductor device further includes a first barrier layer over the first polysilicon structure, wherein the first barrier layer has a non-uniform thickness. The semiconductor device includes a second polysilicon structure over the first barrier layer, wherein the second polysilicon structure has a second grain size different from the first grain size.

公开(公告)号：US11676856B2

公开(公告)日：2023-06-13

申请号：US17380340

申请日：2021-07-20

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： J. J. Lee ,  Chun-Tse Tsai ,  M. C. Hang

IPC分类号： H01L21/768 ,  H01L21/28 ,  H01L21/225 ,  H01L21/02 ,  H01L29/49 ,  H01L49/02

CPC分类号： H01L21/76829 ,  H01L21/02216 ,  H01L21/2257 ,  H01L21/28035 ,  H01L21/28044 ,  H01L28/84 ,  H01L29/4925

摘要： A semiconductor device includes a substrate. The semiconductor device further includes a first polysilicon structure over the substrate, wherein the first polysilicon structure has a first grain size. The semiconductor device further includes a first barrier layer over the first polysilicon structure, wherein the first barrier layer has a non-uniform thickness. The semiconductor device further includes a second polysilicon structure over the first barrier layer, wherein the second polysilicon structure has a second grain size smaller than the first grain size.

公开(公告)号：US10014400B2

公开(公告)日：2018-07-03

申请号：US15650504

申请日：2017-07-14

申请人： Infineon Technologies AG

发明人： Helmut Oefner ,  Nico Caspary ,  Mohammad Momeni ,  Reinhard Ploss ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC分类号： H01L29/739 ,  H01L21/02 ,  H01L29/66 ,  H01L21/324 ,  H01L21/268 ,  H01L29/10 ,  H01L21/18 ,  H01L21/322 ,  H01L21/28 ,  H01L21/225

CPC分类号： H01L29/7393 ,  H01L21/02002 ,  H01L21/02005 ,  H01L21/02008 ,  H01L21/0201 ,  H01L21/02016 ,  H01L21/187 ,  H01L21/2257 ,  H01L21/268 ,  H01L21/28238 ,  H01L21/3221 ,  H01L21/3225 ,  H01L21/324 ,  H01L21/3242 ,  H01L21/76256 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7813

摘要： A semiconductor device includes: a semiconductor substrate having a first side, a second side opposite the first side, and a thickness; at least one semiconductor component integrated in the semiconductor substrate; a first metallization at the first side of the semiconductor substrate; and a second metallization at the second side of the semiconductor substrate. The semiconductor substrate has an oxygen concentration along a thickness line of the semiconductor substrate which has a global maximum at a position of 20% to 80% of the thickness relative to the first side. The global maximum is at least 2-times larger than the oxygen concentrations at each of the first side and the second side of the semiconductor substrate.

公开(公告)号：US09966429B2

公开(公告)日：2018-05-08

申请号：US14819803

申请日：2015-08-06

申请人： Vishay General Semiconductor LLC

发明人： Shih-Kuan Chen ,  Wan-Lan Chiang ,  Ming-Tai Chiang ,  Chih-Ping Peng ,  Yih-Yin Lin

IPC分类号： H01L29/866 ,  H01L29/06 ,  H01L29/861 ,  H01L29/66 ,  H01L21/265 ,  H01L21/283 ,  H01L21/225 ,  H01L29/45

CPC分类号： H01L29/0611 ,  H01L21/2253 ,  H01L21/2257 ,  H01L21/2652 ,  H01L21/283 ,  H01L29/456 ,  H01L29/66106 ,  H01L29/66113 ,  H01L29/861 ,  H01L29/866

摘要： A semiconductor device such as a Zener diode includes a first semiconductor material of a first conductivity type and a second semiconductor material of a second conductivity type in contact with the first semiconductor material to form a junction therebetween. A first oxide layer is disposed over a portion of the second semiconductor material such that a remaining portion of the second semiconductor material is exposed. A polysilicon layer is disposed on the exposed portion of the second semiconductor material and a portion of the first oxide layer. A first conductive layer is disposed on the polysilicon layer. A second conductive layer is disposed on a surface of the first semiconductor material opposing a surface of the first semiconductor material in contact with the second semiconductor material.

公开(公告)号：US09899470B2

公开(公告)日：2018-02-20

申请号：US15597194

申请日：2017-05-17

申请人： Infineon Technologies Austria AG

发明人： Marko Lemke ,  Knut Stahrenberg ,  Ralf Rudolf ,  Rolf Weis

IPC分类号： H01L29/06 ,  H01L21/762 ,  H01L21/265 ,  H01L21/306 ,  H01L29/66 ,  H01L27/06 ,  H01L27/085

CPC分类号： H01L29/0634 ,  H01L21/223 ,  H01L21/2255 ,  H01L21/2257 ,  H01L21/26506 ,  H01L21/2652 ,  H01L21/30604 ,  H01L21/76224 ,  H01L27/0629 ,  H01L27/085 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/6606 ,  H01L29/6609 ,  H01L29/66128 ,  H01L29/66204 ,  H01L29/66477 ,  H01L29/8611

摘要： A method of forming a power semiconductor device includes providing a semiconductor layer of a first conductivity type extending to a first side and having a first doping concentration of first dopants providing majority charge carriers of a first electric charge type in the layer, and forming a deep trench isolation including forming a trench which extends from the first side into the semiconductor layer and includes, in a vertical cross-section perpendicular to the first side, a wall, forming a compensation semiconductor region of the first conductivity type at the wall and having a second doping concentration of the first dopants higher than the first doping concentration, and filling the trench with a dielectric material. The amount of first dopants in the compensation semiconductor region is such that a field-effect of fixed charges of the first electric charge type which are trapped in the trench is at least partly compensated.

公开(公告)号：US09825151B2

公开(公告)日：2017-11-21

申请号：US15115262

申请日：2015-01-27

申请人： IUCF-HYU

发明人： Jea Gun Park ,  Tea Hun Shim ,  Seung Hyun Song ,  Du Yeong Lee

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  H01L21/225 ,  H01L29/16

CPC分类号： H01L29/66795 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02587 ,  H01L21/02664 ,  H01L21/2257 ,  H01L29/16 ,  H01L29/785 ,  H01L29/7854

摘要： The present invention suggests a substrate manufacturing method and a manufacturing method of a semiconductor device comprising: providing a SOI structure having an insulation layer and a silicon layer laminated on a substrate; laminating to form a silicon germanium layer and a capping silicon layer on the SOI structure; implementing oxidation process at two or more temperatures and heat treatment process at least once during the oxidation process to form a germanium cohesion layer and a silicon dioxide layer; and removing the silicon dioxide layer.

公开(公告)号：US20170256409A1

公开(公告)日：2017-09-07

申请号：US15354637

申请日：2016-11-17

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Effendi Leobandung ,  Tenko Yamashita

IPC分类号： H01L21/225 ,  H01L21/8238

CPC分类号： H01L21/2257 ,  H01L21/2255 ,  H01L21/2256 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823892 ,  H01L27/0921 ,  H01L27/0924 ,  H01L29/0638 ,  H01L29/1083 ,  H01L29/16 ,  H01L29/66537 ,  H01L29/66803

摘要： A method for doping fins includes depositing a first dopant layer at a base of fins formed in a substrate, depositing a dielectric layer on the first dopant layer and etching the dielectric layer and the first dopant layer in a first region to expose the substrate and the fins. A second dopant layer is conformally deposited over the fins and the substrate in the first region. The second dopant layer is recessed to a height on the fins in the first region. An anneal is performed to drive dopants into the fins from the first dopant layer in a second region and from the second dopant layer in the first region to concurrently form punch through stoppers in the fins and wells in the substrate.

公开(公告)号：US09741570B1

公开(公告)日：2017-08-22

申请号：US15223834

申请日：2016-07-29

申请人： Infineon Technologies Austria AG

发明人： Matteo Dainese ,  Fabio Brucchi

IPC分类号： H01L21/76 ,  H01L21/336 ,  H01L21/225 ,  H01L29/06 ,  H01L29/739 ,  H01L29/66 ,  H01L21/762 ,  H01L21/761

CPC分类号： H01L21/2257 ,  H01L21/2255 ,  H01L21/2256 ,  H01L21/761 ,  H01L21/76205 ,  H01L21/76224 ,  H01L21/76237 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/66333 ,  H01L29/6634 ,  H01L29/7395

摘要： A method of manufacturing a reverse-blocking IGBT (insulated gate bipolar transistor) includes forming a plurality of IGBT cells in a device region of a semiconductor substrate, forming a reverse-blocking edge termination structure in a periphery region of the semiconductor substrate which surrounds the device region, etching one or more trenches in the periphery region between the reverse-blocking edge termination structure and a kerf region of the semiconductor substrate, depositing a p-type dopant source which at least partly fills the one or more trenches and diffusing p-type dopants from the p-type dopant source into semiconductor material surrounding the one or more trenches, so as to form a continuous p-type doped region in the periphery region which extends from a top surface of the semiconductor substrate to a bottom surface of the semiconductor substrate after thinning of the semiconductor substrate at the bottom surface.

公开(公告)号：US20170236714A1

公开(公告)日：2017-08-17

申请号：US15584141

申请日：2017-05-02

申请人： Infineon Technologies AG

发明人： Hans-Joachim Schulze ,  Peter Irsigler

IPC分类号： H01L21/225 ,  H01L21/265 ,  H01L21/324 ,  H01L21/02

CPC分类号： H01L21/2257 ,  H01L21/02238 ,  H01L21/02524 ,  H01L21/0257 ,  H01L21/02595 ,  H01L21/02636 ,  H01L21/2605 ,  H01L21/263 ,  H01L21/26513 ,  H01L21/268 ,  H01L21/30604 ,  H01L21/31105 ,  H01L21/3221 ,  H01L21/324 ,  H01L29/0623

摘要： A method for removing crystal originated particles from a crystalline silicon body having opposite first and second surfaces includes: increasing a surface area of at least one of the first and second surfaces by an etch process; and oxidizing the increased surface area at a temperature of at least 1000° C. and for a duration of at least 20 minutes.