公开(公告)号：US20240258179A1

公开(公告)日：2024-08-01

申请号：US18413289

申请日：2024-01-16

Applicant: DISCO CORPORATION

Inventor： Atsushi KOMATSU ,  Koichi MAKINO

IPC: H01L21/66 ,  B23K31/10 ,  B23K101/40 ,  H01L21/02 ,  H01L21/304

CPC classification number: H01L22/12 ,  B23K31/10 ,  H01L21/0201 ,  H01L21/304 ,  B23K2101/40

Abstract: A cutting method that measures heights of an outer periphery of a wafer, calculates height distribution data, and then calculates change rates of the heights of the outer periphery of the wafer. Based on results of a comparison between the height change rates and a threshold, the cutting method determines whether or not foreign matter exists on a back surface of the wafer (i.e., whether or not foreign matter exists on a holding surface of a chuck table). The existence of foreign matter on the holding surface can hence be detected appropriately. If foreign matter exists on the holding surface, a worker is notified, and the cutting operation is cancelled. Therefore, the cutting method can appropriately give notification to the worker that foreign matter is stuck on the holding surface, and can also appropriately avoid performing cutting processing with foreign matter stuck on the holding surface.

公开(公告)号：US10014400B2

公开(公告)日：2018-07-03

申请号：US15650504

申请日：2017-07-14

Applicant: Infineon Technologies AG

Inventor： Helmut Oefner ,  Nico Caspary ,  Mohammad Momeni ,  Reinhard Ploss ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L29/739 ,  H01L21/02 ,  H01L29/66 ,  H01L21/324 ,  H01L21/268 ,  H01L29/10 ,  H01L21/18 ,  H01L21/322 ,  H01L21/28 ,  H01L21/225

CPC classification number: H01L29/7393 ,  H01L21/02002 ,  H01L21/02005 ,  H01L21/02008 ,  H01L21/0201 ,  H01L21/02016 ,  H01L21/187 ,  H01L21/2257 ,  H01L21/268 ,  H01L21/28238 ,  H01L21/3221 ,  H01L21/3225 ,  H01L21/324 ,  H01L21/3242 ,  H01L21/76256 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7813

Abstract: A semiconductor device includes: a semiconductor substrate having a first side, a second side opposite the first side, and a thickness; at least one semiconductor component integrated in the semiconductor substrate; a first metallization at the first side of the semiconductor substrate; and a second metallization at the second side of the semiconductor substrate. The semiconductor substrate has an oxygen concentration along a thickness line of the semiconductor substrate which has a global maximum at a position of 20% to 80% of the thickness relative to the first side. The global maximum is at least 2-times larger than the oxygen concentrations at each of the first side and the second side of the semiconductor substrate.

公开(公告)号：US09991175B2

公开(公告)日：2018-06-05

申请号：US15300653

申请日：2015-03-10

Applicant: Toyo Tanso Co., Ltd.

Inventor： Satoshi Torimi ,  Norihito Yabuki ,  Satoru Nogami

IPC: H01L21/00 ,  H01L21/66 ,  H01L21/02 ,  H01L21/04 ,  H01L29/16

CPC classification number: H01L22/12 ,  H01L21/0201 ,  H01L21/02019 ,  H01L21/02024 ,  H01L21/0475 ,  H01L21/3065 ,  H01L29/1608

Abstract: This method for estimating the depth of latent scratches in SiC substrates includes an etching step, a measurement step, and an estimation step. In the etching step, a SiC substrate in which at least the surface is formed from single crystal SiC, and which has been subjected to machining, is subjected to heat treatment under Si atmosphere to etch the surface of the SiC substrate. In the measurement step, the surface roughness or the residual stress of the SiC substrate which has been subjected to the etching step is measured. In the estimation step, the depth of latent scratches or the presence or absence of latent scratches in the SiC substrate before the etching step are estimated on the basis of the results obtained in the measurement step.

公开(公告)号：US20180085851A1

公开(公告)日：2018-03-29

申请号：US15714574

申请日：2017-09-25

Applicant: DISCO CORPORATION

Inventor： Kazuya Hirata

IPC: B23K26/00 ,  B23K26/06 ,  B23K26/40 ,  B23K26/38

CPC classification number: B23K26/53 ,  B23K26/0006 ,  B23K26/0622 ,  B23K26/0626 ,  B23K26/0823 ,  B23K26/0853 ,  B23K26/38 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/56 ,  H01L21/02005 ,  H01L21/0201

Abstract: A SiC wafer is produced from a single crystal SiC ingot. A modified layer is formed by setting a focal point of a pulsed laser beam inside the ingot at a predetermined depth from the upper surface of the ingot, the predetermined depth corresponding to the thickness of the wafer to be produced. The pulsed laser beam is applied to the ingot while moving the ingot in a first direction perpendicular to a second direction where an off angle is formed, thereby forming a modified layer in the first direction inside the ingot and cracks propagating from the modified layer along a c-plane. A separation surface is formed by indexing the ingot in the second direction and applying the laser beam plural times to thereby form a separation surface inside the ingot. Part of the ingot is separated along the separation surface to thereby produce the wafer.

公开(公告)号：US20170110378A1

公开(公告)日：2017-04-20

申请号：US15300653

申请日：2015-10-03

Applicant: Toyo Tanso Co., Ltd.

Inventor： Satoshi Torimi ,  Norihito Yabuki ,  Satoru Nogami

IPC: H01L21/66 ,  H01L21/02

CPC classification number: H01L22/12 ,  H01L21/0201 ,  H01L21/02019 ,  H01L21/02024 ,  H01L21/0475 ,  H01L21/3065 ,  H01L29/1608

Abstract: This method for estimating the depth of latent scratches in SiC substrates includes an etching step, a measurement step, and an estimation step. In the etching step, a SiC substrate in which at least the surface is formed from single crystal SiC, and which has been subjected to machining, is subjected to heat treatment under Si atmosphere to etch the surface of the SiC substrate. In the measurement step, the surface roughness or the residual stress of the SiC substrate which has been subjected to the etching step is measured. In the estimation step, the depth of latent scratches or the presence or absence of latent scratches in the SiC substrate before the etching step are estimated on the basis of the results obtained in the measurement step.

公开(公告)号：US20170080696A1

公开(公告)日：2017-03-23

申请号：US15219743

申请日：2016-07-26

Applicant: GRAPHENE FRONTIERS

Inventor： Bruce Ira WILLNER

IPC: B32B37/24 ,  B32B38/10

CPC classification number: B32B37/24 ,  B32B38/08 ,  B32B38/10 ,  B32B2037/243 ,  B32B2037/246 ,  C01B32/184 ,  C01B32/194 ,  H01L21/0201 ,  H01L21/67092 ,  H01L21/67132

Abstract: A method is disclosed which includes: forming at least one layer of material on at least part of a surface of a first substrate, wherein a first surface of the at least one layer of material is in contact with the first substrate thereby defining an interface; attaching a second substrate to a second surface of the at least one layer of material; forming bubbles at the interface; and applying mechanical force; whereby the second substrate and the at least one layer of material are jointly separated from the first substrate. Related arrangements are also described.

公开(公告)号：US09427946B2

公开(公告)日：2016-08-30

申请号：US14445746

申请日：2014-07-29

Applicant: Graphene Frontiers

Inventor： Bruce Ira Willner

IPC: H01L21/02 ,  H01L21/67 ,  B32B37/24 ,  B32B38/08 ,  C01B31/04

CPC classification number: B32B37/24 ,  B32B38/08 ,  B32B38/10 ,  B32B2037/243 ,  B32B2037/246 ,  C01B32/184 ,  C01B32/194 ,  H01L21/0201 ,  H01L21/67092 ,  H01L21/67132

Abstract: A method is disclosed which includes: forming at least one layer of material on at least part of a surface of a first substrate, wherein a first surface of the at least one layer of material is in contact with the first substrate thereby defining an interface; attaching a second substrate to a second surface of the at least one layer of material; forming bubbles at the interface; and applying mechanical force; whereby the second substrate and the at least one layer of material are jointly separated from the first substrate. Related arrangements are also described.

Abstract translation: 公开了一种方法，其包括：在第一衬底的表面的至少一部分上形成至少一层材料，其中所述至少一层材料的第一表面与所述第一衬底接触，从而限定界面; 将第二衬底附接到所述至少一层材料的第二表面; 在界面处形成气泡; 并施加机械力; 由此所述第二基板和所述至少一个材料层与所述第一基板共同分离。 还描述了相关的布置。

公开(公告)号：US09046545B2

公开(公告)日：2015-06-02

申请号：US12963862

申请日：2010-12-09

Applicant: Tatsuro Takagaki

Inventor： Tatsuro Takagaki

IPC: H01L29/06 ,  H01L21/00 ,  B65G47/90 ,  G01P15/08 ,  H01L41/332 ,  H01L23/544 ,  B81C1/00 ,  G01P15/12 ,  G01P15/125 ,  G01P15/18

CPC classification number: H01L27/0207 ,  B81B2201/0235 ,  B81B2203/0136 ,  B81B2207/053 ,  B81C1/00214 ,  G01P15/0802 ,  G01P15/123 ,  G01P15/125 ,  G01P15/18 ,  G01P2015/0814 ,  G01P2015/0842 ,  H01L21/0201 ,  H01L23/544 ,  H01L41/332 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device comprising: a support part; a flexible part, one end of which is supported by the support part; a spindle part supported by the other end of the flexible part; a displacement detection means which detects displacement of the spindle part; and an aperture part arranged adjacent to the spindle part; wherein a plurality of patterns comprised from the aperture part is formed on a silicon wafer parallel to a first direction and a second direction which intersects the first direction, the plurality of patterns include one or more patterns arranged in a straight line in the first direction and the second direction, the plurality of patterns is arranged so that an axis in which a cleavage plane of the silicon wafer and a surface arranged with the pattern on the silicon wafer intersect, and the first direction are different.

Abstract translation: 一种半导体器件，包括：支撑部分; 柔性部分，其一端由支撑部分支撑; 由所述柔性部件的另一端支撑的主轴部; 检测所述主轴部的位移的位移检测单元; 以及与所述主轴部相邻配置的开口部; 其特征在于，在与所述第一方向相交的第一方向和第二方向平行的硅晶片上形成有从所述开口部构成的多个图案，所述多个图案包括沿所述第一方向排列成直线的一个或多个图案， 在第二方向上，多个图案被布置成使得硅晶片的解理面和硅晶片上的图案布置的表面相交的轴与第一方向不同。

公开(公告)号：US20150008454A1

公开(公告)日：2015-01-08

申请号：US14495336

申请日：2014-09-24

Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.

Inventor： Keiji ISHIBASHI

IPC: H01L21/304 ,  H01L21/28 ,  H01L21/02 ,  H01L29/16

CPC classification number: H01L21/304 ,  C30B23/025 ,  C30B29/36 ,  C30B33/00 ,  H01L21/02002 ,  H01L21/02008 ,  H01L21/0201 ,  H01L21/02378 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/02658 ,  H01L21/28 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/167 ,  H01L29/34 ,  H01L29/36 ,  H01L29/45 ,  H01L29/4966 ,  H01L29/66068 ,  H01L29/7802 ,  H01L29/7813 ,  Y10T428/21

Abstract: A substrate capable of achieving a lowered probability of defects produced in a step of forming an epitaxial film or a semiconductor element, a semiconductor device including the substrate, and a method of manufacturing a semiconductor device are provided. A substrate is a substrate having a front surface and a back surface, in which at least a part of the front surface is composed of single crystal silicon carbide, the substrate having an average value of surface roughness Ra at the front surface not greater than 0.5 nm, a standard deviation σ of that surface roughness Ra not greater than 0.2 nm, an average value of surface roughness Ra at the back surface not smaller than 0.3 nm and not greater than 10 nm, standard deviation σ of that surface roughness Ra not greater than 3 nm, and a diameter D of the front surface not smaller than 110 mm.

公开(公告)号：US20140084297A1

公开(公告)日：2014-03-27

申请号：US13798530

申请日：2013-03-13

Applicant: Seoul Semiconductor Co., Ltd. ,  SixPoint Materials, Inc.

Inventor： Tadao Hashimoto

IPC: H01L21/66 ,  H01L29/20 ,  H01L21/78

CPC classification number: G01N23/207 ,  B24B37/044 ,  C01B21/0632 ,  C01P2002/74 ,  C30B7/105 ,  C30B29/403 ,  C30B29/406 ,  C30B33/00 ,  C30B33/06 ,  H01L21/0201 ,  H01L21/30625 ,  H01L21/78 ,  H01L22/12 ,  H01L29/045 ,  H01L29/2003 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention provides, in one instance, a group III nitride wafer sliced from a group III nitride ingot, polished to remove the surface damage layer and tested with x-ray diffraction. The x-ray incident beam is irradiated at an angle less than 15 degree and diffraction peak intensity is evaluated. The group III nitride wafer passing this test has sufficient surface quality for device fabrication. The invention also provides, in one instance, a method of producing group III nitride wafer by slicing a group III nitride ingot, polishing at least one surface of the wafer, and testing the surface quality with x-ray diffraction having an incident beam angle less than 15 degree to the surface. The invention also provides, in an instance, a test method for testing the surface quality of group III nitride wafers using x-ray diffraction having an incident beam angle less than 15 degree to the surface.

Abstract translation: 本发明在一个实例中提供了从III族氮化物锭切片的III族氮化物晶片，其被抛光以去除表面损伤层并且用x射线衍射测试。 以小于15度的角度照射x射线入射光束，评价衍射峰强度。 通过该测试的III族氮化物晶片具有用于器件制造的足够的表面质量。 本发明在一个实例中还提供了通过切割III族氮化物锭来抛光晶片的至少一个表面并且用具有入射光束角度较小的x射线衍射测试表面质量来制造III族氮化物晶片的方法 比表面15度以上。 本发明还提供了一种用于使用具有小于表面15度的入射光束角的x射线衍射来测试III族氮化物晶片的表面质量的测试方法。