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公开(公告)号：US20240364357A1
公开(公告)日：2024-10-31
申请号：US18592210
申请日：2024-02-29
Applicant: STMicroelectronics International N.V.
Inventor： Abhishek JAIN , Anand KUMAR
Abstract: Various examples in accordance with the present disclosure provide example methods, systems, and apparatuses that may calibrate a resistor-capacitor (RC) circuit.
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公开(公告)号：US12047037B2
公开(公告)日：2024-07-23
申请号：US17981204
申请日：2022-11-04
Applicant: NUVOTON TECHNOLOGY CORPORATION
Inventor： Cheng-Tao Li , Ping-Wen Lai
Abstract: An oscillator equipped with a temperature compensation circuit is illustrated. Through the temperature compensation circuit, a transistor of a current mirror circuit of the oscillator which outputs a reference current to a voltage matching circuit is controlled by the temperature compensation voltage. Both of the temperature compensation voltage and a reference current decrease as the temperature rises, and a delay time of the oscillation voltage is proportional to the temperature compensation voltage and inversely proportional to the reference current. Therefore, the effects of temperature on the delay time just cancel each other out. The delay time of the oscillating voltage is related to the frequency of the clock signal. Therefore, if the delay time of the oscillating voltage is not affected by temperature, the frequency of the clock signal will not be affected by temperature.
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公开(公告)号：US12040747B2
公开(公告)日：2024-07-16
申请号：US17565212
申请日：2021-12-29
Applicant: Cypress Semiconductor Corporation
Inventor： Nandakishore Raimar , H P Sachin
CPC classification number: H03B5/24 , H03K3/011 , H03K3/023 , H03K3/0231 , H03K3/037 , H03K5/24 , H04W56/001
Abstract: An oscillation circuit includes resistors with tap points for high/low reference voltages. An RC network coupled in parallel with the resistors includes a first capacitor to vary a first voltage input and a second capacitor to generate a second voltage input. A first comparator alternately compares the voltage inputs with the low reference voltage to generate oscillation outputs. A PTAT current DAC supplies an injection current to a resistor of the series of resistors that variably modulates the reference voltages. A second comparator alternately compares the voltage inputs with the high reference voltage and controls generation of an adaptive bias current to first comparator near a switching threshold voltage range thereof. A chop switch matrix alternately flips voltage reference inputs to input terminals of first comparator. A multiplexer alternately inverts a polarity of the oscillation outputs in concert with alternately flipping the voltage reference inputs by the chop switch matrix.
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公开(公告)号：US20240223127A1
公开(公告)日：2024-07-04
申请号：US18369159
申请日：2023-09-16
Applicant: GIGADEVICE SEMICONDUCTOR INC.
Inventor： Sheji LI , Sanlin LIU
Abstract: Disclosed is an RC oscillator comprising: a bias circuit, generating first and second bias currents, and outputting a charging current proportional to a total bias current that is the sum of the first and second bias currents, wherein the ratio of the first bias current to the second bias current has a positive temperature coefficient; and an oscillation circuit, for periodically charging a capacitor using the charging current output by the bias circuit, and using a voltage across a resistor through which the second bias current or a current proportional thereto flows as a reference voltage to compare with a charging voltage on the capacitor, so as to obtain a periodically oscillating clock signal. Thus, the present disclosure can compensate the positive temperature coefficient of the subsequent delay and realize the RC oscillator with low temperature drift by making the charging time of the capacitor have a negative temperature coefficient.
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公开(公告)号：US11984850B2
公开(公告)日：2024-05-14
申请号：US17876008
申请日：2022-07-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Udit Rawat , Bichoy Bahr , Swaminathan Sankaran
CPC classification number: H03B5/24 , G01S13/88 , H03H9/02007
Abstract: An oscillator circuit includes a bulk acoustic wave resonator, a differential active inductor circuit, and a gain circuit. The differential active inductor circuit is configured to bias the bulk acoustic wave resonator. The differential active inductor circuit is coupled between the bulk acoustic wave resonator and a power supply terminal. The gain circuit is coupled to the bulk acoustic wave resonator.
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Patent Agency Ranking
公开(公告)号：US20240120883A1
公开(公告)日：2024-04-11
申请号：US18546172
申请日：2021-02-18
Applicant: Nippon Telegraph and Telephone Corporation
Inventor： Teruo Jo , Munehiko Nagatani , Hideyuki Nosaka
IPC: H03B5/24
CPC classification number: H03B5/24
Abstract: A voltage-controlled oscillator includes a first unit cell, a second unit cell that is connected in parallel to the first unit cell via transmission lines, a compensation unit cell that is connected in parallel with the first unit cell and the second unit cell between the first unit cell and the second unit cell, and an input termination resistor that is connected to a power supply voltage terminal of each of the first unit cell, the second unit cell, and the compensation unit cell. Symmetrical voltages are supplied to the first unit cell and the second unit cell, and the compensation unit cell compensates for a gain by the first unit cell or the second unit cell.
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公开(公告)号：US20240113660A1
公开(公告)日：2024-04-04
申请号：US18296539
申请日：2023-04-06
Applicant: NXP USA, Inc.
Inventor： Divya Tripathi , Sadique Mohammad Iqbal , Anubhav Srivastava , Krishna Thakur
Abstract: A self-biased, closed loop, low current free running oscillator clock generator method and apparatus are provided with a current mode comparator connected to a trimming resistor and configured to compare an internally generated voltage reference VREF signal to a voltage feedback signal VFB, where the current mode comparator comprises a common gate amplifier connected to a current mirror circuit in a negative self-biased closed loop to generate a control current signal for controlling a current controlled oscillator to produce an output clock signal having a clock frequency based on the control current signal, where a frequency-to-voltage converter is connected in a feedback path to receive the output clock signal and is configured to produce the voltage feedback signal VFB for input to the current mode comparator, wherein the clock frequency of the output clock signal is tuned to a nominal locked output frequency fOUT by the trimming resistor.
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公开(公告)号：US11949377B2
公开(公告)日：2024-04-02
申请号：US17987153
申请日：2022-11-15
Applicant: Microchip Technology Incorporated
Inventor： Andrew Bottomley , David Simmonds
IPC: H03B5/24 , G06F1/32 , G06F1/3296
CPC classification number: H03B5/24 , G06F1/3296 , H03B2200/0082 , H03B2201/0266
Abstract: An device having an oscillator circuit modifiable between a first operating mode and a second operating mode, wherein the first operating mode has a first frequency accuracy and a first power consumption, wherein the second operating mode has a second frequency accuracy and a second power consumption, wherein the second frequency accuracy is more accurate than the first frequency accuracy and the second power consumption is higher than the first power consumption, and a control circuit in communication with the oscillator circuit to modify the operating mode of the oscillator circuit.
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公开(公告)号：US11831276B1
公开(公告)日：2023-11-28
申请号：US17959795
申请日：2022-10-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kishan Reddy Gonapati , Aswani Aditya Kumar Tadinada
IPC: H03B5/24
CPC classification number: H03B5/24
Abstract: According to at least some example embodiments of the inventive concepts, an RC oscillator includes an oscillator core including a timing-circuit that includes a plurality of matched current sources, a plurality of capacitors, and a resistor, a first continuous time comparator, and a Schmitt trigger; and an analog circuit connected to the oscillator core including a second continuous time comparator representing a replica of the first continuous time comparator, and an EX-OR gate, wherein the analog circuit is configured to pass a clock signal of the oscillator core through the second continuous time comparator and obtaining a delayed clock signal representing a comparator delay, extract the comparator delay of the first continuous time comparator based on feeding the clock signal and the obtained delayed clock signal to the EX-OR gate, and charge the plurality of capacitors connected to the first continuous time comparator.
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公开(公告)号：US11799459B2
公开(公告)日：2023-10-24
申请号：US17705813
申请日：2022-03-28
Applicant: LAPIS TECHNOLOGY CO., LTD.
Inventor： Seiichiro Sasaki
CPC classification number: H03K4/502 , H03B5/24 , H03K3/0231 , H03K3/03 , H03K3/354 , H03K4/501 , H03K19/20
Abstract: An oscillator circuit includes a first comparator that outputs a first signal indicative of a comparison result between an input potential and a threshold, a second comparator that outputs a second signal indicative of a comparison result between an input potential and the threshold, a RS flip-flop circuit that receives the first signal and the second signal and outputs first and second oscillation signals, a first charge/discharge unit that charges and discharges a first capacitor based on the first oscillation signal, a second charge/discharge unit that charges and discharges a second capacitor based on the second oscillation signal, a first dummy switch controlled to be on and off according to the second oscillation signal and adding a predetermined capacity to a first node, and a second dummy switch controlled to be on and off according to the first oscillation signal and adding a predetermined capacity to a second node.
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