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    Data receiving circuit
    1.
    发明授权
    Data receiving circuit 有权

    公开(公告)号：US11770117B2

    公开(公告)日：2023-09-26

    申请号：US17544574

    申请日：2021-12-07

    Applicant: NANYA TECHNOLOGY CORPORATION

    Inventor： Wu-Der Yang

    IPC: H03K3/023 ,  H03K3/356 ,  G11C7/06

    CPC classification number: H03K3/356113 ,  G11C7/06

    Abstract: A data receiving circuit is provided. The data receiving circuit includes a data input circuit, a latch circuit, and a current source. The data input circuit is configured to receive an input signal. The latch circuit is configured to output an output signal in response to the input signal. The current source is configured to provide a current to the latch circuit. The current source is different from the data input circuit.

    MANAGEMENT OF NON-VOLATILE MEMORY ARRAYS
    2.
    发明公开
    MANAGEMENT OF NON-VOLATILE MEMORY ARRAYS 审中-公开

    公开(公告)号：US20230289103A1

    公开(公告)日：2023-09-14

    申请号：US18315932

    申请日：2023-05-11

    Applicant: MENTIUM TECHNOLOGIES INC.

    Inventor： Farnood Merrikh BAYAT ,  Mirko PREZIOSO

    IPC: G06F3/06 ,  H03M1/74 ,  G11C7/10 ,  H03K3/023 ,  G11C27/02

    CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0688 ,  G11C7/1096 ,  G11C27/02 ,  H03K3/023 ,  H03M1/74

    Abstract: The system may include a digital-to-analog converter configured to convert a digital signal to an analog signal. The system may include sample/hold circuits configured to receive and store the analog signal. The system may include an address controller configured to regulate which sample/hold circuits propagate the analog signal. The sample/hold circuits may be configured to feed the analog signal to devices of a memory array. The system may include an output circuit configured to program the devices by comparing currents of the devices to a target current. In response to one or more of the currents of the devices being within a threshold range, the output circuit may discontinue programming the corresponding devices. In response to one or more of the currents of the devices not being within the threshold range, the output circuit may continue programming the corresponding devices.

    MANAGEMENT OF NON-VOLATILE MEMORY ARRAYS
    3.
    发明申请
    MANAGEMENT OF NON-VOLATILE MEMORY ARRAYS 有权

    公开(公告)号：US20210263683A1

    公开(公告)日：2021-08-26

    申请号：US17147203

    申请日：2021-01-12

    Applicant: MENTIUM TECHNOLOGIES INC.

    Inventor： Farnood Merrikh BAYAT ,  Mirko PREZIOSO

    IPC: G06F3/06 ,  H03M1/74 ,  G11C7/10 ,  H03K3/023 ,  G11C27/02

    Abstract: The system may include a digital-to-analog converter configured to convert a digital signal to an analog signal. The system may include sample/hold circuits configured to receive and store the analog signal. The system may include an address controller configured to regulate which sample/hold circuits propagate the analog signal. The sample/hold circuits may be configured to feed the analog signal to devices of a memory array. The system may include an output circuit configured to program the devices by comparing currents of the devices to a target current. In response to one or more of the currents of the devices being within a threshold range, the output circuit may discontinue programming the corresponding devices. In response to one or more of the currents of the devices not being within the threshold range, the output circuit may continue programming the corresponding devices.

    CIRCUITS AND METHODS FOR REDUCING KICKBACK NOISE IN A COMPARATOR
    4.
    发明申请
    CIRCUITS AND METHODS FOR REDUCING KICKBACK NOISE IN A COMPARATOR 有权

    公开(公告)号：US20210044281A1

    公开(公告)日：2021-02-11

    申请号：US17080317

    申请日：2020-10-26

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

    Inventor： Chin-Ho CHANG ,  Jaw-Juinn HORNG ,  Yung-Chow PENG

    IPC: H03K3/013 ,  H03K3/023

    Abstract: Circuits and methods for reducing and cancelling out kickback noise are disclosed. In one example, a circuit for a comparator is disclosed. The circuit includes: a first transistor group, a second transistor group, and a first switch. The first transistor group comprises a first transistor having a drain coupled to a first node, and a second transistor having a source coupled to the first node. Gates of the first transistor and the second transistor are coupled together to a first input of the comparator. The second transistor group comprises a third transistor having a drain coupled to a second node, and a fourth transistor having a source coupled to the second node. Gates of the third transistor and the fourth transistor are coupled together to a second input of the comparator. The first switch is connected to and between the first node and the second node.

    Circuits and methods for reducing kickback noise in a comparator
    5.
    发明授权
    Circuits and methods for reducing kickback noise in a comparator 有权

    公开(公告)号：US10819316B2

    公开(公告)日：2020-10-27

    申请号：US16457459

    申请日：2019-06-28

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chin-Ho Chang ,  Jaw-Juinn Horng ,  Yung-Chow Peng

    IPC: H03K3/013 ,  H03K3/023

    Abstract: Circuits and methods for reducing and cancelling out kickback noise are disclosed. In one example, a circuit for a comparator is disclosed. The circuit includes: a first transistor group, a second transistor group, and a first switch. The first transistor group comprises a first transistor having a drain coupled to a first node, and a second transistor having a source coupled to the first node. Gates of the first transistor and the second transistor are coupled together to a first input of the comparator. The second transistor group comprises a third transistor having a drain coupled to a second node, and a fourth transistor having a source coupled to the second node. Gates of the third transistor and the fourth transistor are coupled together to a second input of the comparator. The first switch is connected to and between the first node and the second node.

    Oscillation maintenance circuit with comparator-based pulse generation in half-duplex RFID transponders
    6.
    发明授权
    Oscillation maintenance circuit with comparator-based pulse generation in half-duplex RFID transponders 有权

    公开(公告)号：US10685272B2

    公开(公告)日：2020-06-16

    申请号：US16340950

    申请日：2017-10-10

    Applicant: EXCELIO TECHNOLOGY (SHENZHEN) CO., LTD.

    Inventor： Qianwen Zhang ,  Patrick Bian Wu ,  Fuqiang Han

    IPC: G06K19/06 ,  G06K19/07 ,  H03K3/0233 ,  H03K3/023

    Abstract: An oscillation maintenance circuit with comparator-based pulse generation is provided. By sampling an RF signal and controlling a pulse generation circuit to generate a pulse signal of the same frequency as the RF signal, a switch unit is controlled to be ON/OFF at a same frequency as the RF signal, achieving synchronization between change of the current injection and the RF signal. Thus, the oscillation frequency is not affected by current injection, ensuring the FSK communication performance. At the same time, two comparators are respectively compared with two reference voltage levels to obtain an output pulse signal, and the reference voltage levels can be adjusted according to practical requirements, so that the switch-on point of time and current injection time duration are adjustable, maximizing the efficiency of current injection, resulting in simple circuit structure, low power consumption, and increased communication distance of an HDX passive RFID transponder.

    Oscillator circuit and method of generating a clock signal
    8.
    发明授权
    Oscillator circuit and method of generating a clock signal 有权
    振荡电路和产生时钟信号的方法

    公开(公告)号：US09507373B2

    公开(公告)日：2016-11-29

    申请号：US14899170

    申请日：2013-07-04

    Applicant: Hubert Bode ,  Dirk Wendel

    Inventor： Hubert Bode ,  Dirk Wendel

    IPC: G06F1/04 ,  G06F1/08 ,  H03K3/0231 ,  H03K3/023

    CPC classification number: G06F1/08 ,  H03K3/023 ,  H03K3/0231

    Abstract: An oscillator circuit of the type comprising a flip-flop for generating a clock signal and two comparators for comparing a reference voltage with the voltage across a first capacitor which is charged during a first cycle of the clock signal and the voltage across a second capacitor which is charged during a second cycle of a clock signal provides a means for removing the effects of any offset in either comparator. This is achieved by reversing the inputs of the comparators for each cycle of the output frequency. Thus an offset in a comparator which would increase the clock period on one cycle will reduce the period of the next cycle by the same amount. As a net result, the period of time over two clock periods will stay constant regardless of any offset drift in a comparator.

    Abstract translation: 一种振荡器电路，包括用于产生时钟信号的触发器和用于将参考电压与在第一电容器的第一周期期间充电的第一电容器两端的电压进行比较的两个比较器，以及跨越第二电容器的电压 在时钟信号的第二周期期间被充电提供了用于消除任一比较器中任何偏移的影响的装置。 这是通过在输出频率的每个周期反转比较器的输入来实现的。 因此，将在一个周期上增加时钟周期的比较器中的偏移将使下一个周期的周期减少相同的量。 作为最终结果，无论比较器中有任何偏移漂移，两个时钟周期的时间段将保持不变。

    Anti process variation self-adjustable on-chip oscillator
    9.
    发明授权
    Anti process variation self-adjustable on-chip oscillator 有权
    防过程变化自调节片上振荡器

    公开(公告)号：US09413370B2

    公开(公告)日：2016-08-09

    申请号：US14832155

    申请日：2015-08-21

    Applicant: Zhejiang University

    Inventor： Yan Han ,  Yuji Qian ,  Shifeng Zhang ,  Jun Sun ,  Xiaopeng Liu

    IPC: H03K3/023 ,  H03L7/24 ,  H03K3/03 ,  H03K3/011

    CPC classification number: H03L7/24 ,  H03K3/011 ,  H03K3/0315

    Abstract: An anti process variation self-adjustable on-chip oscillator has been disclosed according to the present invention. The on-chip oscillator includes the following components integrated on a same chip: a reference oscillation unit for producing reference pulse; an oscillation unit to be adjusted for producing output pulse; and a self-adjustable logic control unit for receiving the reference pulse and output pulse, and for transmitting a corresponding adjustment signal to the oscillation unit to be adjusted based on the received reference pulse and output pulse to control the oscillation unit to be adjusted to perform the frequency adjustment to the output pulse. The reference pulse required for adjusting the frequency can be generated by the reference oscillation unit integrated on-chip, so that self-adjustment can be achieved on-chip, decrease the cost of the chip compared with off-chip adjustment.

    Abstract translation: 已经公开了根据本发明的防过程变化自调节片上振荡器。 片上振荡器包括集成在同一芯片上的以下组件：用于产生参考脉冲的参考振荡单元; 要产生输出脉冲的振荡单元; 以及用于接收参考脉冲和输出脉冲的自调节逻辑控制单元，并且用于基于接收到的参考脉冲和输出脉冲将相应的调整信号发送到要调整的振荡单元，以控制要调节的振荡单元以执行 频率调整到输出脉冲。 调整频率所需的参考脉冲可以由集成在片上的参考振荡单元产生，从而可以实现片上自整定，降低芯片成本与片外调整相比。

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