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公开(公告)号：US20240222448A1
公开(公告)日：2024-07-04
申请号：US18148577
申请日：2022-12-30
发明人： Eric Miller , Nelson Felix , Andrew Herbert Simon
IPC分类号： H01L29/417 , H01L21/768 , H01L21/8234 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/775 , H01L29/786
CPC分类号： H01L29/41733 , H01L21/76831 , H01L21/823412 , H01L21/823418 , H01L29/0673 , H01L29/42392 , H01L29/66439 , H01L29/775 , H01L29/78696
摘要： A semiconductor device includes first and second nanosheet stacks above an upper surface of a semiconductor substrate, a first source/drain on an end of the first nanosheet stack, and a second source/drain on an end of the second nanosheet stack. A first gate stack wraps around individual channels of the first nanosheet stack and a second gate stack wraps around individual channels the second nanosheet stack. An interlayer dielectric covers the first and second nanosheet stacks, the first and second source/drains, and the first and second gate stacks. The semiconductor device further includes a first source/drain contact that contacts the first source/drain and a second source/drain contact that contacts the second source/drain. The first and second source/drain contacts extend continuously from the first and second source/drains, respectively, to an upper surface of the interlayer dielectric.
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公开(公告)号：US11980111B2
公开(公告)日：2024-05-07
申请号：US17447073
申请日：2021-09-08
发明人： Injo Ok , Andrew Herbert Simon , Kevin W. Brew , Muthumanickam Sankarapandian , Steven Michael McDermott , Nicole Saulnier
CPC分类号： H10N70/823 , H10N70/041 , H10N70/231 , H10N70/841
摘要： A phase change memory bridge cell comprising a dielectric layer located on top of a at least one electrode, wherein a trench is located in the dielectric layer. A first liner located at the bottom of the trench in the dielectric layer and the first liner is located on the sidewalls of the dielectric layer that forms the sidewalls of the trench. A phase change memory material located on top of the first liner, wherein a top surface of the phase change memory material is aligned with a top surface of the dielectric layer, wherein the dielectric layer is located adjacent to and surrounding the vertical sidewalls of the phase change memory material, wherein a top surface of the phase change memory material is flush with a top surface of the dielectric layer.
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公开(公告)号：US20230085288A1
公开(公告)日：2023-03-16
申请号：US17472858
申请日：2021-09-13
发明人： Injo Ok , Timothy Mathew Philip , Kevin W. Brew , Muthumanickam Sankarapandian , Steven Michael McDermott , Nicole Saulnier , Andrew Herbert Simon , Sanjay C. Mehta
IPC分类号： H01L45/00
摘要： A semiconductor structure includes a heater located in a first layer of a device, wherein the heater is surrounded by a dielectric, a phase change memory (PCM) liner in direct contact with a top surface of the heater in a second layer of the device, a spacer disposed adjacent the PCM liner in the second layer of the device, and a PCM stack disposed above the PCM liner in the second layer of the device.
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公开(公告)号：US11456415B2
公开(公告)日：2022-09-27
申请号：US17114594
申请日：2020-12-08
发明人： Injo Ok , Ruqiang Bao , Andrew Herbert Simon , Kevin W. Brew , Nicole Saulnier , Iqbal Rashid Saraf , Muthumanickam Sankarapandian , Sanjay C. Mehta
摘要： A semiconductor structure may include a heater surrounded by a dielectric layer, a projection liner on top of the heater, a phase change material layer above the projection liner, and a top electrode contact surrounding a top portion of the phase change material layer, The projection liner may cover a top surface of the heater. The projection liner may separate the phase change material layer from the second dielectric layer and the heater. The projection liner may provide a parallel conduction path in the crystalline phase and the amorphous phase of the phase change material layer. The top electrode contact may be separated from the phase change material layer by a metal liner. The semiconductor structure may include a bottom electrode below and in electrical contact with the heater and a top electrode above and in electrical contact with the phase change material layer.
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公开(公告)号：US20240215462A1
公开(公告)日：2024-06-27
申请号：US18146344
申请日：2022-12-23
发明人： Ning Li , Andrew Herbert Simon , Injo Ok , Kangguo Cheng , Timothy Mathew Philip , Kevin W. Brew , Jin Ping Han , Juntao Li , Nicole Saulnier
CPC分类号： H01L45/1253 , H01L27/2436 , H01L45/06 , H01L45/16
摘要： An electrical device includes a first electrode in series with a second electrode. A phase change memory (PCM) is in series with the second electrode. A variable electrical element is in series with the phase change memory.
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公开(公告)号：US20230098562A1
公开(公告)日：2023-03-30
申请号：US17489602
申请日：2021-09-29
IPC分类号： H01L45/00
摘要： A phase change memory (PCM) cell having a mushroom configuration includes a first electrode, a heater electrically connected to the first electrode, a first projection liner electrically connected to the heater, a PCM material electrically connected to the first projection liner, a second electrode electrically connected to the PCM material, and a second projection liner electrically connected to the first projection liner and the second electrode.
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公开(公告)号：US20230075622A1
公开(公告)日：2023-03-09
申请号：US17447073
申请日：2021-09-08
发明人： Injo Ok , Andrew Herbert Simon , Kevin W. Brew , Muthumanickam Sankarapandian , Steven Michael McDermott , Nicole Saulnier
IPC分类号： H01L45/00
摘要： A phase change memory bridge cell comprising a dielectric layer located on top of a at least one electrode, wherein a trench is located in the dielectric layer. A first liner located at the bottom of the trench in the dielectric layer and the first liner is located on the sidewalls of the dielectric layer that forms the sidewalls of the trench. A phase change memory material located on top of the first liner, wherein a top surface of the phase change memory material is aligned with a top surface of the dielectric layer, wherein the dielectric layer is located adjacent to and surrounding the vertical sidewalls of the phase change memory material, wherein a top surface of the phase change memory material is flush with a top surface of the dielectric layer.
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公开(公告)号：US20220181546A1
公开(公告)日：2022-06-09
申请号：US17114594
申请日：2020-12-08
发明人： Injo Ok , RUQIANG BAO , Andrew Herbert Simon , Kevin W. Brew , Nicole Saulnier , Iqbal Rashid Saraf , Muthumanickam Sankarapandian , Sanjay C. Mehta
摘要： A semiconductor structure may include a heater surrounded by a dielectric layer, a projection liner on top of the heater, a phase change material layer above the projection liner, and a top electrode contact surrounding a top portion of the phase change material layer, The projection liner may cover a top surface of the heater. The projection liner may separate the phase change material layer from the second dielectric layer and the heater. The projection liner may provide a parallel conduction path in the crystalline phase and the amorphous phase of the phase change material layer. The top electrode contact may be separated from the phase change material layer by a metal liner. The semiconductor structure may include a bottom electrode below and in electrical contact with the heater and a top electrode above and in electrical contact with the phase change material layer.
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公开(公告)号：US11930724B2
公开(公告)日：2024-03-12
申请号：US17407519
申请日：2021-08-20
发明人： Injo Ok , Nicole Saulnier , Muthumanickam Sankarapandian , Andrew Herbert Simon , Steven Michael McDermott , Iqbal Rashid Saraf
CPC分类号： H10N70/801 , H10N70/063 , H10N70/231 , H10N70/826 , H10N70/8413 , H10N70/8828
摘要： A phase change memory (PCM) cell includes an electrode, a heater electrically connected to the electrode, a PCM material electrically connected to the heater, a second electrode electrically connected to the PCM material, an electrical insulator surrounding the PCM material, and a shield positioned between the PCM material and the electrical insulator, the shield comprising a reactive-ion-etching-resistant material.
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公开(公告)号：US20230094466A1
公开(公告)日：2023-03-30
申请号：US17486840
申请日：2021-09-27
发明人： Julien Frougier , Nicolas Loubet , Sagarika Mukesh , PRASAD BHOSALE , Ruilong Xie , Andrew Herbert Simon , Takeshi Nogami , Lawrence A. Clevenger , Roy R. Yu , Andrew M. Greene , Daniel Charles Edelstein
IPC分类号： H01L29/786 , H01L23/528 , H01L29/06 , H01L29/423 , H01L29/66 , H01L21/8234
摘要： A semiconductor structure includes a substrate and a first field effect transistor (FET) formed on the substrate; the first FET includes a first FET first source-drain region, a first FET second source-drain region, a first FET gate between the first and second source-drain regions, and a first FET channel region adjacent the first FET gate and between the first FET first and second source-drain regions. Also included is a buried power rail, buried in the substrate, having a top at a level lower than the first FET channel region, and having buried power rail sidewalls. A first FET shared contact is electrically interconnected with the buried power rail and the first FET second source-drain region, and a first FET electrically isolating region is adjacent the buried power rail sidewalls and separates the buried power rail from the substrate.
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