公开(公告)号：US20160071787A1

公开(公告)日：2016-03-10

申请号：US14480039

申请日：2014-09-08

申请人： SHEILA F. CHOPIN ,  THOMAS H. KOSCHMIEDER ,  VARUGHESE MATHEW

发明人： SHEILA F. CHOPIN ,  THOMAS H. KOSCHMIEDER ,  VARUGHESE MATHEW

IPC分类号： H01L23/495

CPC分类号： H01L23/562 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49568 ,  H01L23/49582 ,  H01L29/0657 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present disclosure provides for embodiments of packaged semiconductor devices. In one embodiment, a packaged semiconductor device for a die includes an exposed structure. The die has an active surface and a backside surface opposite the active surface. A first surface of the exposed structure is joined to die attach material, and the die attach material is further joined to the backside surface of the die. The exposed structure includes a plurality of openings through the exposed structure within a perimeter of the die, and the die is exposed through the plurality of openings.

摘要翻译： 本公开提供了封装半导体器件的实施例。 在一个实施例中，用于管芯的封装半导体器件包括暴露结构。 模具具有活性表面和与活性表面相对的背面。 暴露结构的第一表面与管芯附接材料接合，并且管芯附着材料进一步连接到管芯的背面。 暴露的结构包括在模具的周边内穿过暴露结构的多个开口，并且裸片通过多个开口露出。

公开(公告)号：US20160064299A1

公开(公告)日：2016-03-03

申请号：US14472882

申请日：2014-08-29

申请人： NISHANT LAKHERA ,  JAMES R. GUAJARDO ,  VARUGHESE MATHEW ,  AKHILESH K. SINGH

发明人： NISHANT LAKHERA ,  JAMES R. GUAJARDO ,  VARUGHESE MATHEW ,  AKHILESH K. SINGH

IPC分类号： H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L23/29

CPC分类号： H01L21/565 ,  H01L21/78 ,  H01L23/3135 ,  H01L23/562 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A packaged semiconductor device includes a substrate, an electronic device coupled to the substrate, encapsulant including a first major surface surrounding the electronic device, and an oxygen barrier layer within fifty percent of a thickness of the encapsulant from a second major surface of the encapsulant. The oxygen barrier covers at least a portion of an area of the second major surface of the encapsulant to help reduce or eliminate warping of the encapsulant and/or the substrate of the packaged semiconductor device due to oxidation. A thickness of the oxygen barrier layer is less than 100 microns.

摘要翻译： 封装的半导体器件包括衬底，耦合到衬底的电子器件，包括围绕电子器件的第一主表面的密封剂，以及距密封剂的第二主表面的密封剂厚度的50％以内的氧阻隔层。 氧气阻挡层覆盖密封剂的第二主表面的至少一部分区域，以帮助减少或消除由于氧化引起的封装半导体器件的密封剂和/或基底的翘曲。 氧阻隔层的厚度小于100微米。

公开(公告)号：US20150380376A1

公开(公告)日：2015-12-31

申请号：US14314260

申请日：2014-06-25

申请人： VARUGHESE MATHEW ,  Burton J. Carpenter ,  Leo M. Higgins, III ,  Chu-Chung Lee ,  Tu-Anh N. Tran

发明人： VARUGHESE MATHEW ,  Burton J. Carpenter ,  Leo M. Higgins, III ,  Chu-Chung Lee ,  Tu-Anh N. Tran

IPC分类号： H01L23/00 ,  H01L23/495 ,  H01L23/498

CPC分类号： H01L24/49 ,  H01L23/49582 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49866 ,  H01L23/53238 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05657 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/45624 ,  H01L2224/45639 ,  H01L2224/45644 ,  H01L2224/45655 ,  H01L2224/45657 ,  H01L2224/45664 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/48482 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/85051 ,  H01L2224/85207 ,  H01L2224/85801 ,  H01L2224/92247 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01074 ,  H01L2924/01015 ,  H01L2924/01075 ,  H01L2924/013 ,  H01L2924/00013 ,  H01L2924/0665 ,  H01L2924/00

摘要： The present disclosure provides embodiments of package devices and methods for making package devices for a semiconductor die. One embodiment includes a die mounting structure having a finished bond pad that includes a copper bond pad and a cobalt-containing layer over a top surface of the copper bond pad, and a wire bond structure that is bonded to a top surface of the cobalt-containing layer of the finished bond pad, where cobalt-containing material of the cobalt-containing layer is located between a bottom surface of the wire bond structure and the top surface of the copper bond pad such that the cobalt-containing material is present under a center portion of the wire bond structure.

摘要翻译： 本公开提供了用于制造用于半导体管芯的封装器件的封装器件和方法的实施例。 一个实施例包括具有完成的接合焊盘的管芯安装结构，该焊接垫在铜焊盘的顶表面上包括铜接合焊盘和含钴层，以及引线键合结构，其结合到钴 - 其中含钴层的含钴材料位于引线键合结构的底表面和铜键合焊盘的顶表面之间，使得含钴材料存在于 引线接合结构的中心部分。

公开(公告)号：US20150118791A1

公开(公告)日：2015-04-30

申请号：US14069103

申请日：2013-10-31

申请人： Varughese Mathew ,  Burton J. Carpenter ,  Leo M. Higgins, III

发明人： Varughese Mathew ,  Burton J. Carpenter ,  Leo M. Higgins, III

IPC分类号： H01L23/00

CPC分类号： H01L24/05 ,  H01L21/4864 ,  H01L23/3121 ,  H01L23/49827 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/26175 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48228 ,  H01L2224/48235 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/85011 ,  H01L2224/85399 ,  H01L2224/85447 ,  H01L2224/8548 ,  H01L2224/85484 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/1531 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of making a package substrate having a copper bond pad and a location for receiving a semiconductor die having a remnant of one of a group consisting of HEDP and an HEDP derivative on a top surface of the copper bond pad. The semiconductor die is attached to the substrate. A wirebond connection is attached between the remnant and the semiconductor die.

摘要翻译： 一种制造具有铜键合焊盘的封装衬底的方法和用于接收在铜键合焊盘的顶表面上具有由HEDP和HEDP衍生物组成的组中的一种的残留物的半导体管芯的位置。 半导体管芯附着在基板上。 引线接合连接在残余物和半导体管芯之间。

公开(公告)号：US20150027767A1

公开(公告)日：2015-01-29

申请号：US13950618

申请日：2013-07-25

申请人： Sheila F. Chopin ,  Varughese Mathew

发明人： Sheila F. Chopin ,  Varughese Mathew

IPC分类号： H01L21/56 ,  H01L21/48 ,  H01L23/495

CPC分类号： H05K1/05 ,  H01L21/4821 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/49586 ,  H01L24/97 ,  H01L2924/15747 ,  H01L2924/1815 ,  H05K1/111 ,  H05K3/28 ,  Y10T29/49121 ,  H01L2924/00

摘要： A method of forming an electronic component includes masking a lead frame to form a mask defining an exposed area, oxidizing the exposed area of the lead frame, wherein the mask inhibits oxidation of an unexposed area, and removing the mask from the lead frame following oxidizing. A lead frame can include a metal sheet patterned to define a pad region and leads. The metal sheet includes metal oxide in a select area. The pad region is substantially free of metal oxide.

摘要翻译： 形成电子部件的方法包括：遮蔽引线框架以形成限定暴露区域的掩模，氧化引线框架的暴露区域，其中掩模禁止未曝光区域的氧化，并且在氧化之后从引线框架去除掩模 。 引线框架可以包括图案化以限定焊盘区域和引线的金属板。 金属片在选择区域中包括金属氧化物。 焊盘区域基本上不含金属氧化物。

公开(公告)号：US20140346663A1

公开(公告)日：2014-11-27

申请号：US13898949

申请日：2013-05-21

申请人： Sheila F. Chopin ,  Min Ding ,  Varughese Mathew ,  Scott S. Roth

发明人： Sheila F. Chopin ,  Min Ding ,  Varughese Mathew ,  Scott S. Roth

IPC分类号： H01L23/00

CPC分类号： H01L24/02 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0218 ,  H01L2224/0219 ,  H01L2224/03005 ,  H01L2224/03009 ,  H01L2224/03015 ,  H01L2224/03019 ,  H01L2224/034 ,  H01L2224/03622 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05 ,  H01L2224/05565 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/32145 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48507 ,  H01L2224/48824 ,  H01L2224/73265 ,  H01L2924/01012 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/365 ,  H01L2924/3651 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

摘要： A packaged semiconductor device is made by forming a conductive pad on an external surface of an integrated circuit device, forming a passivation layer over the conductive pad, removing a portion of the passivation layer over a bond area on the conductive pad, forming a sacrificial anode around a majority of a periphery surrounding the bond area, forming a conductive bond in the bond area, and forming an encapsulating material around the conductive bond and an exposed portion of the sacrificial anode.

摘要翻译： 通过在集成电路器件的外表面上形成导电焊盘来形成封装的半导体器件，在导电焊盘上方形成钝化层，在导电焊盘上的接合区域上去除钝化层的一部分，形成牺牲阳极 在围绕结合区域的周边的大部分周围，在接合区域中形成导电结合，以及在导电接合周围形成封装材料和牺牲阳极的暴露部分。

公开(公告)号：US20140061894A1

公开(公告)日：2014-03-06

申请号：US13600364

申请日：2012-08-31

申请人： Sheila F. Chopin ,  Varughese Mathew

发明人： Sheila F. Chopin ,  Varughese Mathew

IPC分类号： H01L23/34 ,  F28F7/00 ,  H01L21/56

CPC分类号： H01L21/565 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/4334 ,  H01L2224/48091 ,  H01L2924/1815 ,  H01L2924/00014

摘要： A packaged semiconductor device, comprising a package substrate, an integrated circuit (IC) die mounted on the package substrate, and a heat spreader mounted on the package substrate. The heat spreader surrounds at least a portion of the IC die and includes a lid with a plurality of openings. An inner portion of the heat spreader includes a plurality of thermally conductive protrusions adjacent the die.

摘要翻译： 一种封装半导体器件，包括封装衬底，安装在封装衬底上的集成电路（IC）裸片和安装在封装衬底上的散热器。 散热器围绕IC芯片的至少一部分，并且包括具有多个开口的盖。 散热器的内部包括与模具相邻的多个导热突起。

公开(公告)号：US08394713B2

公开(公告)日：2013-03-12

申请号：US12705021

申请日：2010-02-12

申请人： Varughese Mathew

发明人： Varughese Mathew

IPC分类号： H01L21/445

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/03831 ,  H01L2224/04042 ,  H01L2224/05007 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05644 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/48644 ,  H01L2224/48844 ,  H01L2224/85203 ,  H01L2224/85207 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A semiconductor device structure has a semiconductor die that has a bond pad with a passivation layer surrounding a portion of the bond pad. A nickel layer, which is deposited, is on the inner portion. A space is between a sidewall of the nickel layer and the passivation layer and extends to the bond pad. A palladium layer is over the nickel layer and fills the space. The space is initially quite small but is widened by an isotropic etch so that when the palladium layer is deposited, the space is sufficiently large so that the deposition of palladium is able to fill the space. Filling the space results in a structure in which the palladium contacts the nickel layer, the passivation layer and the bond pad.

摘要翻译： 半导体器件结构具有半导体管芯，该半导体管芯具有接合焊盘，该接合焊盘具有包围接合焊盘的一部分的钝化层。 沉积的镍层在内部。 镍层的侧壁和钝化层之间的空间延伸到接合焊盘。 钯层在镍层上方并填满空间。 该空间最初相当小，但是通过各向同性蚀刻加宽，使得当钯层沉积时，该空间足够大，使得钯的沉积能够填充该空间。 填充空间导致钯接触镍层，钝化层和接合垫的结构。

公开(公告)号：US07993971B2

公开(公告)日：2011-08-09

申请号：US11966126

申请日：2007-12-28

申请人： Ritwik Chatterjee ,  Eddic Acosta ,  Varughese Mathew

发明人： Ritwik Chatterjee ,  Eddic Acosta ,  Varughese Mathew

IPC分类号： H01L21/00

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L24/81 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05147 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/1357 ,  H01L2224/13647 ,  H01L2224/81097 ,  H01L2224/81203 ,  H01L2224/8181 ,  H01L2225/06513 ,  H01L2924/00013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A method for forming a semiconductor structure includes forming a first contact pad on a first die, wherein the first contact pad comprises a first metal element, forming a metal over the first contact pad, wherein the metal comprises a second metal element, and the second metal element is different from the first metal element. The method further includes rapidly reflowing a portion of the metal to form a thin intermetallic layer. The method further includes attaching the first contact pad of the first die to a second contact pad of a second die, wherein attaching comprises heating the first contact pad and the second contact pad to reflow the metal to form an intermetallic layer such that substantially all of the metal formed over the first contact pad is used as part of the intermetallic layer.

摘要翻译： 一种用于形成半导体结构的方法包括：在第一裸片上形成第一接触焊盘，其中所述第一接触焊盘包括第一金属元件，在所述第一接触焊盘上形成金属，其中所述金属包括第二金属元件， 金属元素不同于第一金属元素。 该方法还包括快速回流一部分金属以形成薄的金属间层。 该方法还包括将第一管芯的第一接触焊盘连接到第二管芯的第二接触焊盘，其中附接包括加热第一接触焊盘和第二接触焊盘以回流金属以形成金属间层，使得基本上全部 形成在第一接触垫上的金属被用作金属间层的一部分。

公开(公告)号：US20090218567A1

公开(公告)日：2009-09-03

申请号：US12039909

申请日：2008-02-29

申请人： Varughese Mathew ,  Sam S. Garcia ,  Tushar P. Merchant

发明人： Varughese Mathew ,  Sam S. Garcia ,  Tushar P. Merchant

IPC分类号： H01L21/441 ,  H01L29/04

CPC分类号： H01L45/085 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/143 ,  H01L45/1658 ,  H01L45/1683

摘要： A method for making a semiconductor device (10) includes providing an interconnect layer (14) over an underlying layer (12), forming a first insulating layer (16) over the interconnect layer, and forming an opening (18) through the insulating layer to the interconnect layer. A first conductive layer (24) is formed over the interconnect layer and in the opening. This is performed by plating so it is selective. A second conductive layer (28) in the opening is formed by displacement by immersion. This is performed after the first conductive layer has been formed. The result is the second conductive layer is formed by a selective deposition and is effective for providing it with bridging material. A layer of bridgeable material (34) is formed over the second conductive layer and in the opening. A third conductive layer (42) is formed over the bridgeable material. The semiconductor device may be useable as a conductive bridge memory device.

摘要翻译： 制造半导体器件（10）的方法包括在下层（12）之上提供互连层（14），在所述互连层上形成第一绝缘层（16），以及通过绝缘层形成开口（18） 到互连层。 在互连层上和开口中形成第一导电层（24）。 这是通过电镀进行的，所以它是选择性的。 开口中的第二导电层（28）通过浸渍移位而形成。 这是在形成第一导电层之后进行的。 结果是通过选择性沉积形成第二导电层并且有效地为其提供桥接材料。 在第二导电层上和开口中形成有可桥接材料层（34）。 第三导电层（42）形成在可桥接材料上。 半导体器件可以用作导电桥接器件。