公开(公告)号：US11581367B2

公开(公告)日：2023-02-14

申请号：US17209660

申请日：2021-03-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongho Ahn ,  Segab Kwon ,  Chungman Kim ,  Kwangmin Park ,  Zhe Wu ,  Seunggeun Yu ,  Wonjun Lee ,  Jabin Lee ,  Jinwoo Lee

IPC: H01L27/24 ,  H01L45/00

Abstract: A semiconductor device includes a semiconductor substrate, a peripheral device on the semiconductor substrate, a lower insulating structure on the semiconductor substrate and covering the peripheral device, a first conductive line on the lower insulating structure, a memory cell structure on the first conductive line, and a second conductive line on the memory cell structure. The memory cell structure may include an information storage material pattern and a selector material pattern on the lower insulating structure in a vertical direction. The selector material pattern may include a first selector material layer including a first material and a second selector material layer including a second material. The second selector material layer may have a threshold voltage drift higher than that of the first material. The second selector material layer may have a second width narrower than a first width of the first selector material layer.

公开(公告)号：US09985204B2

公开(公告)日：2018-05-29

申请号：US15451961

申请日：2017-03-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinwoo Lee ,  Jeonghee Park ,  Dongho Ahn ,  Zhe Wu ,  Heeju Shin ,  Ja bin Lee

IPC: H01L45/00 ,  H01L27/24 ,  H01L43/08 ,  H01L43/10

CPC classification number: H01L45/141 ,  H01L43/08 ,  H01L43/10 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/16

Abstract: A semiconductor memory device including first lines and second lines overlapping and intersecting each other, variable resistance memory elements disposed at intersections between the first lines and the second lines, and switching elements disposed between the variable resistance memory elements and the first lines. At least one of the switching elements includes first and second chalcogenide compound layers, and conductive nano-dots disposed between the first and second chalcogenide compound layers.

公开(公告)号：US12268105B2

公开(公告)日：2025-04-01

申请号：US18349433

申请日：2023-07-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kiyeon Yang ,  Dongho Ahn ,  Changseung Lee

IPC: H10N70/00 ,  H10B63/00 ,  H10N70/20

Abstract: A semiconductor apparatus may include a plurality of semiconductor unit devices. Each of the semiconductor unit devices may be arranged between a first insulating layer and a second insulating layer that are apart from each other in a direction normal to a substrate. Each of the semiconductor unit devices may include a selection device layer and a phase change material layer that extend side by side in a direction parallel to the substrate. The phase change material layer may have a superlattice-like structure. The phase change material layer may be arranged along a recess portion that is formed by the first insulating layer, the second insulating layer, and the selection device layer.

公开(公告)号：US12101942B2

公开(公告)日：2024-09-24

申请号：US18478776

申请日：2023-09-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wooyoung Yang ,  Bonwon Koo ,  Chungman Kim ,  Kwangmin Park ,  Hajun Sung ,  Dongho Ahn ,  Changseung Lee ,  Minwoo Choi

IPC: H10B63/00 ,  G11C13/00 ,  H10B61/00 ,  H10N50/01 ,  H10N50/80 ,  H10N70/00 ,  H10N70/20

CPC classification number: H10B63/24 ,  G11C13/0004 ,  H10B61/10 ,  H10B63/84 ,  H10N50/01 ,  H10N50/80 ,  H10N70/063 ,  H10N70/231 ,  H10N70/24 ,  H10N70/25 ,  H10N70/8413 ,  H10N70/8825 ,  H10N70/8828 ,  H10N70/8833 ,  H10N70/8836

Abstract: A chalcogen compound layer exhibiting ovonic threshold switching characteristics, a switching device, a semiconductor device, and/or a semiconductor apparatus including the same are provided. The switching device and/or the semiconductor device may include two or more chalcogen compound layers having different energy band gaps. Alternatively, the switching device and/or semiconductor device may include a chalcogen compound layer having a concentration gradient of an element of boron (B), aluminum (Al), scandium (Sc), manganese (Mn), strontium (Sr), and/or indium (In) in a thickness direction thereof. The switching device and/or a semiconductor device may exhibit stable switching characteristics while having a low off-current value (leakage current value).

公开(公告)号：US20240215250A1

公开(公告)日：2024-06-27

申请号：US18340419

申请日：2023-06-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seyun KIM ,  Jooheon Kang ,  Yumin Kim ,  Garam Park ,  Hyunjae Song ,  Dongho Ahn ,  Seungyeul Yang ,  Myunghun Woo ,  Jinwoo Lee ,  Seungdam Hyun

IPC: H10B43/35 ,  G11C16/04 ,  H10B43/10 ,  H10B43/27

CPC classification number: H10B43/35 ,  G11C16/0483 ,  H10B43/10 ,  H10B43/27

Abstract: A memory device including the vertical stack structure includes a gate electrode, a resistance change layer, a channel between the gate electrode and the resistance change layer, and an island structure between the resistance change layer and the channel and in contact with the resistance change layer and the channel, and a gate insulating layer between the gate electrode and the channel.

公开(公告)号：US20240065000A1

公开(公告)日：2024-02-22

申请号：US18169436

申请日：2023-02-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yumin Kim ,  Jooheon Kang ,  Sunho Kim ,  Seyun Kim ,  Garam Park ,  Hyunjae Song ,  Dongho Ahn ,  Seungyeul Yang ,  Myunghun Woo ,  Jinwoo Lee

IPC: H10B63/00 ,  G11C13/00 ,  G06N3/063

CPC classification number: H10B63/34 ,  G11C13/0007 ,  G11C13/003 ,  H10B63/845 ,  G06N3/063 ,  G11C2213/71 ,  G11C2213/75 ,  G11C2213/79

Abstract: Provided are a nonvolatile memory device and an operating method thereof. The nonvolatile memory device may include a conductive pillar, a resistance change layer surrounding a side surface of the conductive pillar, a semiconductor layer surrounding a side surface of the resistance change layer, a gate insulating layer surrounding a side surface of the semiconductor layer, and a plurality of insulating patterns and a plurality of gate electrodes alternately arranged along a surface of the gate insulating layer. The plurality of insulating patterns and the plurality of gate electrodes may surround a side surface of the gate insulating layer.

公开(公告)号：US20240046986A1

公开(公告)日：2024-02-08

申请号：US18157408

申请日：2023-01-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minwoo CHOI ,  Young Jae Kang ,  Bonwon Koo ,  Yongyoung Park ,  Hajun Sung ,  Dongho Ahn ,  Kiyeon Yang ,  Wooyoung Yang ,  Changseung Lee

IPC: G11C13/00 ,  H10B63/10

CPC classification number: G11C13/0069 ,  G11C13/0004 ,  H10B63/10 ,  G11C2213/30 ,  H10B63/84

Abstract: A memory device includes a memory cell including a selection layer and a phase change material layer, and a controller, wherein the selection layer includes a switching material, the phase change material layer includes a phase change material, and the controller is configured to apply a write pulse to the selection layer and the phase change material layer and control a polarity, a peak value, and a shape of the write pulse.

公开(公告)号：US11818899B2

公开(公告)日：2023-11-14

申请号：US17244212

申请日：2021-04-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wooyoung Yang ,  Bonwon Koo ,  Chungman Kim ,  Kwangmin Park ,  Hajun Sung ,  Dongho Ahn ,  Changseung Lee ,  Minwoo Choi

IPC: H10B63/00 ,  G11C13/00 ,  H10B61/00 ,  H10N50/01 ,  H10N50/80 ,  H10N70/20 ,  H10N70/00

CPC classification number: H10B63/24 ,  G11C13/0004 ,  H10B61/10 ,  H10B63/84 ,  H10N50/01 ,  H10N50/80 ,  H10N70/063 ,  H10N70/231 ,  H10N70/24 ,  H10N70/25 ,  H10N70/8413 ,  H10N70/8825 ,  H10N70/8828 ,  H10N70/8833 ,  H10N70/8836

Abstract: A chalcogen compound layer exhibiting ovonic threshold switching characteristics, a switching device, a semiconductor device, and/or a semiconductor apparatus including the same are provided. The switching device and/or the semiconductor device may include two or more chalcogen compound layers having different energy band gaps. Alternatively, the switching device and/or semiconductor device may include a chalcogen compound layer having a concentration gradient of an element of boron (B), aluminum (Al), scandium (Sc), manganese (Mn), strontium (Sr), and/or indium (In) in a thickness direction thereof. The switching device and/or a semiconductor device may exhibit stable switching characteristics while having a low off-current value (leakage current value).

公开(公告)号：US20230329007A1

公开(公告)日：2023-10-12

申请号：US18176750

申请日：2023-03-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hajun SUNG ,  Youngjae Kang ,  Bonwon Koo ,  Yongyoung Park ,  Dongho Ahn ,  Kiyeon Yang ,  Wooyoung Yang ,  Changseung Lee ,  Minwoo Choi

IPC: H10B63/00 ,  H10B61/00

CPC classification number: H10B63/24 ,  H10B61/10 ,  H10B63/80

Abstract: A chalcogenide material according to one embodiment includes germanium (Ge); arsenic (As); sulfur (S); selenium (Se), and at least one group III metal selected from indium (In), gallium (Ga), and aluminum (Al), wherein the content of the Ge may be greater than about 10 at % and less than or equal to about 30 at %, the content of the As may be greater than about 30 at % and less than or equal to about 50 at %, the content of Se is greater than about 20 at % and less than or equal to about 60 at %, the content of S is greater than about 0.5 at % and less than or equal to about 10 at %, and the content of the group III metal may be in the range of 0.5 at % to 10 at %.

公开(公告)号：US20210193922A1

公开(公告)日：2021-06-24

申请号：US16988957

申请日：2020-08-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ja Bin Lee ,  Zhe Wu ,  Kwangmin Park ,  Gwangguk An ,  Dongho Ahn ,  Seung-Geun Yu ,  Jinwoo Lee

IPC: H01L45/00 ,  H01L27/24

Abstract: A variable resistance memory device includes a plurality of memory cells arranged on a substrate. Each of the memory cells includes a selection element pattern and a variable resistance pattern stacked on the substrate. The selection element pattern includes a first selection element pattern having a chalcogenide material and a second selection element pattern having a metal oxide and coupled to the first selection element pattern.