公开(公告)号：US12254922B2

公开(公告)日：2025-03-18

申请号：US18157408

申请日：2023-01-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minwoo Choi ,  Young Jae Kang ,  Bonwon Koo ,  Yongyoung Park ,  Hajun Sung ,  Dongho Ahn ,  Kiyeon Yang ,  Wooyoung Yang ,  Changseung Lee

IPC: G11C13/00 ,  H10B63/10 ,  H10B63/00

Abstract: A memory device includes a memory cell including a selection layer and a phase change material layer, and a controller, wherein the selection layer includes a switching material, the phase change material layer includes a phase change material, and the controller is configured to apply a write pulse to the selection layer and the phase change material layer and control a polarity, a peak value, and a shape of the write pulse.

公开(公告)号：US20240065118A1

公开(公告)日：2024-02-22

申请号：US18068821

申请日：2022-12-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hajun SUNG ,  Youngjae Kang ,  Changyup Park ,  Kiyeon Yang ,  Wooyoung Yang ,  Changseung Lee ,  Minwoo Choi

IPC: H10N70/20 ,  H10N70/00 ,  H10B63/00

CPC classification number: H10N70/231 ,  H10N70/861 ,  H10N70/8828 ,  H10N70/8845 ,  H10B63/84

Abstract: Provided are a phase change heterostructure and a phase change memory device including the same. The phase change memory device including the phase change heterostructure may include a plurality of memory cells. Each of the plurality of memory cells may include a first electrode and a second electrode, which may be spaced apart from each other, and a phase change heterostructure between the first electrode and the second electrode. The phase change heterostructure may include a plurality of phase change material layers and a plurality of thermal barrier layers alternately stacked on each other. A material of the plurality of thermal barrier layers have a thermal conductivity lower than a materials of the plurality of phase change material layers.

公开(公告)号：US11898244B2

公开(公告)日：2024-02-13

申请号：US17497523

申请日：2021-10-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jooho Lee ,  Yongsung Kim ,  Sanghoon Song ,  Wooyoung Yang ,  Changseung Lee ,  Sungjin Lim ,  Junsik Hwang

IPC: C23C16/34 ,  C23C16/50 ,  C23C16/06 ,  C23C16/44 ,  H01M4/04 ,  H01M10/052 ,  H01J37/32 ,  H01M16/00 ,  C23C16/00

CPC classification number: C23C16/34 ,  C23C16/00 ,  C23C16/06 ,  C23C16/4408 ,  C23C16/50 ,  H01J37/32 ,  H01J37/3244 ,  H01M4/0428 ,  H01M10/052 ,  H01M16/00 ,  H01J2237/3321 ,  H01M2220/30 ,  H01M2300/0068

Abstract: A method of forming a lithium (Li)-based film, may include: supplying a Li source material into a reaction chamber in which a substrate is disposed; supplying phosphor (P) and oxygen (O) source materials and a nitrogen (N) source material into the reaction chamber; and generating plasma in the reaction chamber to form a Li-based film on the substrate from the Li, P, O, and N source materials, wherein the supplying of the Li source material into the reaction chamber and the supplying of the P and O source materials and the N source material into the reaction chamber are performed with a time interval, and wherein the Li source material supplied into the reaction chamber is deposited on the substrate, and the P and O source materials supplied into the reaction chamber are adsorbed on the Li source material.

公开(公告)号：US10124438B2

公开(公告)日：2018-11-13

申请号：US15065488

申请日：2016-03-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeongyub Lee ,  Yunsung Woo ,  Changseung Lee ,  Eunhyoung Cho

IPC: H05K3/02 ,  B23K26/0622 ,  B23K26/384 ,  H05K3/18 ,  B23K26/08 ,  H01L31/18 ,  H05K3/00 ,  B23K26/386 ,  B23K26/082 ,  H05K3/14

Abstract: A method of patterning holes includes placing a substrate on a stage of a laser system, the substrate having a graphene layer on a surface thereof, generating a pulse laser from the laser system, and forming a plurality of hole patterns spaced apart from each other on the graphene layer by irradiating the pulse laser while the graphene layer is in motion.

公开(公告)号：US09658186B2

公开(公告)日：2017-05-23

申请号：US14972873

申请日：2015-12-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kiyeon Yang ,  Changseung Lee ,  Namjeong Kim ,  Yeonhee Kim

IPC: H01L29/00 ,  G01N27/414 ,  H01L21/02 ,  H01L21/3065 ,  H01L29/786

CPC classification number: G01N27/4141 ,  C30B25/04 ,  C30B29/46 ,  C30B29/60 ,  H01L21/02568 ,  H01L21/0259 ,  H01L21/02614 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/3065 ,  H01L29/0665 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/778 ,  H01L29/7851 ,  H01L29/78681 ,  H01L29/78684 ,  H01L29/78696

Abstract: A transistor includes a substrate, a two-dimensional material including at least one layer that is substantially vertically aligned on the substrate such that an edge of the layer is on the substrate and the layer extends substantially vertical to the substrate, a source electrode and a drain electrode connected to opposite ends of the two-dimensional material, a gate insulation layer on the two-dimensional material between the source electrode and the drain electrode, and a gate electrode on the gate insulation layer. Each layer includes a semiconductor having a two-dimensional crystal structure.

公开(公告)号：US12063793B2

公开(公告)日：2024-08-13

申请号：US17362075

申请日：2021-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kiyeon Yang ,  Bonwon Koo ,  Segab Kwon ,  Chungman Kim ,  Yongyoung Park ,  Dongho Ahn ,  Seunggeun Yu ,  Changseung Lee

IPC: H10B63/00 ,  H01L29/24 ,  H10N70/00 ,  H10N70/20

CPC classification number: H10B63/24 ,  H01L29/24 ,  H10N70/245 ,  H10N70/826 ,  H10N70/8833

Abstract: Provided are a chalcogen compound having ovonic threshold switching characteristics, and a switching device, a semiconductor device, and/or a semiconductor apparatus which include the chalcogen compound. The chalcogen compound includes five or more elements and may have stable switching characteristics with a low off-current value (leakage current value). The chalcogen compound includes: selenium (Se) and tellurium (Te); a first element comprising at least one of indium (In), aluminum (Al), strontium (Sr), and calcium (Ca); and a second element including germanium (Ge) and/or tin (Sn), and may further include at least one of arsenic (As), antimony (Sb), and bismuth (Bi).

公开(公告)号：US20240074210A1

公开(公告)日：2024-02-29

申请号：US18164926

申请日：2023-02-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kiyeon YANG ,  Bonwon Koo ,  Hajun Sung ,  Changseung Lee ,  Minwoo Choi

IPC: H10B63/00 ,  H10N70/00

CPC classification number: H10B63/24 ,  H10B63/84 ,  H10N70/841 ,  H10N70/8828

Abstract: Disclosed are a memory device and a memory apparatus including the memory device. The memory device may include a first electrode, a second electrode spaced apart from the first electrode, an intermediate layer between the first electrode and the second electrode, and an interface layer in contact with the intermediate layer. The intermediate layer and the interface layer each may have ovonic threshold switching (OTS) characteristics. A material of the interface layer may have a threshold voltage shift greater than a threshold voltage shift (A Vth) of the intermediate layer.

公开(公告)号：US20210262081A1

公开(公告)日：2021-08-26

申请号：US16920913

申请日：2020-07-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minsung Lee ,  Youngkwan Cha ,  Yountaek Ryu ,  Kyungwoo Park ,  Woonyoung Choi ,  Ducksu Kim ,  Jeongyub Lee ,  Changseung Lee

IPC: C23C14/54 ,  C23C14/04 ,  C23C14/34

Abstract: A deposition apparatus forms a material layer on a substrate in a deposition chamber. Provided in the deposition chamber are at least one deposition material providing device that provides a deposition material to the substrate, a deposition mask that defines a deposition area on the substrate, and a stage that supports the substrate. The stage is movable in X and Y directions in a plane parallel to the substrate.

公开(公告)号：US10976472B2

公开(公告)日：2021-04-13

申请号：US15805864

申请日：2017-11-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeongyub Lee ,  Changseung Lee ,  Yongsung Kim ,  Jaekwan Kim ,  Byonggwon Song ,  Sanghoon Song ,  Kiyeon Yang

IPC: G02B1/02 ,  G02B1/00 ,  C23C14/58 ,  C23C14/06 ,  C23C14/34 ,  C23C16/40 ,  G02B3/00 ,  C23C16/50

Abstract: A meta-optical device and a method of manufacturing the same are provided. The method includes depositing a group III-V compound semiconductor on a substrate, forming an anti-oxidation layer, performing crystallization by using post annealing, removing the anti-oxidation layer, and manufacturing a meta-optical device by using patterning.

公开(公告)号：US10665637B2

公开(公告)日：2020-05-26

申请号：US16105259

申请日：2018-08-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungbae Park ,  Wenxu Xianyu ,  Bonwon Koo ,  Takkyun Ro ,  Changseung Lee

IPC: H01L27/30 ,  H01L27/146 ,  H01L51/44

Abstract: Provided are an image sensor and a method of manufacturing the same. The image sensor may include a plurality of light detection elements arranged to correspond to a plurality of pixel regions, a color filter layer on the plurality of light detection elements and including a plurality of color filters arranged to correspond to the plurality of light detection elements, and a photodiode device portion on the color filter layer. The photodiode device portion may have curved structures. The photodiode device portion may include an organic material-based photodiode layer, a first electrode between the photodiode layer and the color filter layer, and a second electrode on the photodiode layer. The photodiode device portion may have curved convex structures respectively corresponding to the plurality of color filters.