公开(公告)号：US09985204B2

公开(公告)日：2018-05-29

申请号：US15451961

申请日：2017-03-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinwoo Lee ,  Jeonghee Park ,  Dongho Ahn ,  Zhe Wu ,  Heeju Shin ,  Ja bin Lee

IPC: H01L45/00 ,  H01L27/24 ,  H01L43/08 ,  H01L43/10

CPC classification number: H01L45/141 ,  H01L43/08 ,  H01L43/10 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/16

Abstract: A semiconductor memory device including first lines and second lines overlapping and intersecting each other, variable resistance memory elements disposed at intersections between the first lines and the second lines, and switching elements disposed between the variable resistance memory elements and the first lines. At least one of the switching elements includes first and second chalcogenide compound layers, and conductive nano-dots disposed between the first and second chalcogenide compound layers.