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1.
公开(公告)号:US20230326948A1
公开(公告)日:2023-10-12
申请号:US17746290
申请日:2022-05-17
发明人: Wenjun WANG
IPC分类号: H01L27/146 , H01L23/00 , H04N5/225
CPC分类号: H01L27/14636 , H01L27/14683 , H01L24/29 , H01L24/83 , H04N5/2253 , H01L2224/29144 , H01L2224/29139 , H01L2224/29124 , H01L2224/29147 , H01L2224/29118 , H01L2224/29111 , H01L2224/29116 , H01L2224/2912 , H01L2224/29113 , H01L2224/29109 , H01L2224/29123 , H01L2224/29105 , H01L2224/29101 , H01L2224/83091 , H01L2224/83095 , H01L2224/83205 , H01L2924/01003 , H01L2924/01048
摘要: A semiconductor package and a method of manufacturing the same, and an imaging apparatus are provided. The method includes preparing a substrate having a first connection region and a sensor chip having a second connection region. A first bonding layer including multi-layer nano low-melting-point metal materials with different melting point gradients is provided on the first connection region. A second bonding layer including multi-layer nano low-melting-point metal materials with different melting point gradients is provided on the second connection region. The substrate and the sensor chip are overlapped to align and tightly compress the first and second bonding layers, to obtain a composite structure. The composite structure is treated at a temperature of 30 to 180° C., under a pressure of 1 to 8 MPa, and with an ultrasonic of 10 to 30 kHz to form the first and second bonding layers into a eutectic.
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公开(公告)号:US20240063074A1
公开(公告)日:2024-02-22
申请号:US17889868
申请日:2022-08-17
发明人: Po-Yu Chen , Yu Hsiang Chen , Cheng Hung Wu , Wei-Pin Changchien , Ming-Fa Chen
IPC分类号: H01L23/367 , H01L23/473 , H01L23/373 , H01L25/065 , H01L25/00 , H01L23/00
CPC分类号: H01L23/367 , H01L23/473 , H01L23/3732 , H01L23/3736 , H01L23/3738 , H01L23/373 , H01L25/0657 , H01L25/50 , H01L24/32 , H01L2224/32245 , H01L2224/29124 , H01L2224/29147 , H01L2224/29105 , H01L2224/29117 , H01L2224/29144 , H01L2224/2916 , H01L2224/29123 , H01L2224/29155 , H01L2224/29169 , H01L2224/29139 , H01L2224/29166 , H01L2224/29184 , H01L2224/29118 , H01L2224/29138 , H01L2224/29193 , H01L2224/29186 , H01L24/29 , H01L2224/08145 , H01L24/08 , H01L2224/16145 , H01L24/16 , H01L2224/73204 , H01L2224/73253 , H01L24/73
摘要: A semiconductor package is disclosed. The semiconductor package includes a package substrate. The semiconductor package includes a semiconductor die having a first surface attached to the package substrate and a second surface. The semiconductor package includes a heat sink attached to the second surface of the semiconductor die. The semiconductor package includes a heat dissipation layer interposed between the heat sink and the semiconductor die. The heat dissipation layer comprises one or more high-k dielectric materials.
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公开(公告)号:US09627349B2
公开(公告)日:2017-04-18
申请号:US14909157
申请日:2013-09-13
发明人: Markus Wimplinger
CPC分类号: H01L24/83 , B81C3/001 , B81C2203/036 , H01L24/29 , H01L24/32 , H01L2224/29082 , H01L2224/291 , H01L2224/29105 , H01L2224/29111 , H01L2224/29116 , H01L2224/29117 , H01L2224/29118 , H01L2224/29123 , H01L2224/29124 , H01L2224/29139 , H01L2224/29144 , H01L2224/29147 , H01L2224/29155 , H01L2224/29157 , H01L2224/2916 , H01L2224/29166 , H01L2224/29169 , H01L2224/29171 , H01L2224/29184 , H01L2224/32145 , H01L2224/32507 , H01L2224/8302 , H01L2224/83022 , H01L2224/8381 , H01L2224/83894 , H01L2924/01003 , H01L2924/01005 , H01L2924/01011 , H01L2924/01012 , H01L2924/01019 , H01L2924/0102 , H01L2924/01034 , H01L2924/01037 , H01L2924/01038 , H01L2924/0105 , H01L2924/01052 , H01L2924/01055 , H01L2924/01056 , H01L2924/01322 , H01L2924/10251 , H01L2924/10252 , H01L2924/10253 , H01L2924/1026 , H01L2924/10271 , H01L2924/10272 , H01L2924/10323 , H01L2924/10328 , H01L2924/10329 , H01L2924/1033 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10334 , H01L2924/10335 , H01L2924/10336 , H01L2924/10346 , H01L2924/1037 , H01L2924/10371 , H01L2924/10372 , H01L2924/10373 , H01L2924/10375 , H01L2924/10376 , H01L2924/10377 , H01L2924/10821 , H01L2924/10823 , H01L2924/10831 , H01L2924/00 , H01L2924/00014 , H01L2924/01032 , H01L2924/01013 , H01L2924/01031 , H01L2924/0103
摘要: A method for applying a bonding layer that is comprised of a basic layer and a protective layer on a substrate with the following method steps: application of an oxidizable basic material as a basic layer on a bonding side of the substrate, at least partial covering of the basic layer with a protective material that is at least partially dissolvable in the basic material as a protective layer. In addition, the invention relates to a corresponding substrate.
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公开(公告)号:US3755882A
公开(公告)日:1973-09-04
申请号:US3755882D
申请日:1970-07-13
CPC分类号: B23K35/286 , B23K35/3006 , H01L24/29 , H01L24/83 , H01L2224/29111 , H01L2224/29123 , H01L2224/29124 , H01L2224/8319 , H01L2224/83801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01061 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/12036 , H01L2924/15747 , Y10T428/12674 , H01L2924/00015 , H01L2924/00012 , H01L2924/00
摘要: A molybdenum contact platform of a semiconductor wafer is brazed to a metallic carrier body using as solder an alloy of aluminum at 15 to 60 weight percent, remainder silver, or magnesium at 44 to 60 weight percent, remainder silver.
摘要翻译: 将半导体晶片的钼接触平台钎焊到金属载体上,使用铝为15〜60重量%的合金,余量为银或镁为44〜60重量%,余量为银。
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公开(公告)号:US20240282744A1
公开(公告)日:2024-08-22
申请号:US18397756
申请日:2023-12-27
发明人: Takafumi YAMADA
IPC分类号: H01L23/00
CPC分类号: H01L24/40 , H01L24/37 , H01L23/49838 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/072 , H01L2224/05553 , H01L2224/0603 , H01L2224/29109 , H01L2224/29111 , H01L2224/29113 , H01L2224/29117 , H01L2224/29118 , H01L2224/2912 , H01L2224/29123 , H01L2224/29124 , H01L2224/29138 , H01L2224/29139 , H01L2224/29147 , H01L2224/29155 , H01L2224/29157 , H01L2224/29166 , H01L2224/2917 , H01L2224/32227 , H01L2224/3701 , H01L2224/37124 , H01L2224/37147 , H01L2224/37655 , H01L2224/37663 , H01L2224/40106 , H01L2224/40227 , H01L2224/40499 , H01L2224/45124 , H01L2224/45147 , H01L2224/48227 , H01L2224/49175 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265 , H01L2924/01005 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/0104 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01083 , H01L2924/0132 , H01L2924/10253 , H01L2924/10272 , H01L2924/12031 , H01L2924/12032 , H01L2924/13055 , H01L2924/13091
摘要: A semiconductor device includes a semiconductor chip including an upper electrode, a lead frame having a bonding part and a rising part, and a bonding member joining the upper electrode to the bonding part. The upper electrode has electrode lateral surfaces including a first lateral surface. The bonding part has a bonding front surface and terminal lateral surfaces that include a second lateral surface. The bonding part is joined to the upper electrode such that the second lateral surface faces the first lateral surface. The rising part extends upward from the first lateral surface. In a direction parallel to the electrode front surface, a first shortest distance between a center of the electrode front surface in a plan view and the second lateral surface is equal to or greater than 40% of a second shortest distance between the first lateral surface and the second lateral surface.
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公开(公告)号:US20160190092A1
公开(公告)日:2016-06-30
申请号:US14909157
申请日:2013-09-13
发明人: Markus WIMPLINGER
CPC分类号: H01L24/83 , B81C3/001 , B81C2203/036 , H01L24/29 , H01L24/32 , H01L2224/29082 , H01L2224/291 , H01L2224/29105 , H01L2224/29111 , H01L2224/29116 , H01L2224/29117 , H01L2224/29118 , H01L2224/29123 , H01L2224/29124 , H01L2224/29139 , H01L2224/29144 , H01L2224/29147 , H01L2224/29155 , H01L2224/29157 , H01L2224/2916 , H01L2224/29166 , H01L2224/29169 , H01L2224/29171 , H01L2224/29184 , H01L2224/32145 , H01L2224/32507 , H01L2224/8302 , H01L2224/83022 , H01L2224/8381 , H01L2224/83894 , H01L2924/01003 , H01L2924/01005 , H01L2924/01011 , H01L2924/01012 , H01L2924/01019 , H01L2924/0102 , H01L2924/01034 , H01L2924/01037 , H01L2924/01038 , H01L2924/0105 , H01L2924/01052 , H01L2924/01055 , H01L2924/01056 , H01L2924/01322 , H01L2924/10251 , H01L2924/10252 , H01L2924/10253 , H01L2924/1026 , H01L2924/10271 , H01L2924/10272 , H01L2924/10323 , H01L2924/10328 , H01L2924/10329 , H01L2924/1033 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10334 , H01L2924/10335 , H01L2924/10336 , H01L2924/10346 , H01L2924/1037 , H01L2924/10371 , H01L2924/10372 , H01L2924/10373 , H01L2924/10375 , H01L2924/10376 , H01L2924/10377 , H01L2924/10821 , H01L2924/10823 , H01L2924/10831 , H01L2924/00 , H01L2924/00014 , H01L2924/01032 , H01L2924/01013 , H01L2924/01031 , H01L2924/0103
摘要: A method for applying a bonding layer that is comprised of a basic layer and a protective layer on a substrate with the following method steps: application of an oxidizable basic material as a basic layer on a bonding side of the substrate, at least partial covering of the basic layer with a protective material that is at least partially dissolvable in the basic material as a protective layer. In addition, the invention relates to a corresponding substrate.
摘要翻译: 一种通过以下方法将基底层和保护层构成的接合层施加于基板上的方法:将可氧化碱性材料作为基底层施加到基板的粘接侧,至少部分覆盖 具有至少部分可溶解在作为保护层的基础材料中的保护材料的基础层。 此外,本发明涉及相应的基板。
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公开(公告)号:US09070561B2
公开(公告)日:2015-06-30
申请号:US14515700
申请日:2014-10-16
申请人: KEC Corporation
发明人: Kyu Hyo Hwang , Jong Hong Lee , Gab Soo Choi , Cha Soo Jeon , Jin Sang Park , Sang Bo Bae , Yong Min Park , Sung Jin An
IPC分类号: H01L23/00 , H01L23/495
CPC分类号: H01L23/49531 , H01L23/4827 , H01L23/49513 , H01L23/49575 , H01L23/49582 , H01L24/05 , H01L24/29 , H01L24/32 , H01L24/83 , H01L24/85 , H01L24/92 , H01L2224/04026 , H01L2224/05073 , H01L2224/05082 , H01L2224/05155 , H01L2224/05166 , H01L2224/05172 , H01L2224/05617 , H01L2224/0562 , H01L2224/05623 , H01L2224/05624 , H01L2224/05638 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/05666 , H01L2224/05672 , H01L2224/29082 , H01L2224/29083 , H01L2224/29109 , H01L2224/29111 , H01L2224/29113 , H01L2224/29117 , H01L2224/29118 , H01L2224/2912 , H01L2224/29123 , H01L2224/29124 , H01L2224/29138 , H01L2224/29139 , H01L2224/29144 , H01L2224/29147 , H01L2224/29155 , H01L2224/29157 , H01L2224/32245 , H01L2224/32501 , H01L2224/32505 , H01L2224/83191 , H01L2224/83825 , H01L2224/92247 , H01L2924/00014 , H01L2924/01322 , H01L2924/13055 , H01L2924/13091 , H01L2924/351 , H01L2924/3651 , H01L2924/00 , H01L2924/01014 , H01L2924/01032 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要: Provided are a semiconductor device and a bonding structure thereof, in which an inter-metal compound is not formed with a semiconductor die or a lead frame, thereby improving electrical and mechanical properties and wettability and suppressing conglomeration of a die bonding material. The semiconductor device includes a semiconductor die, a barrier layer formed on a surface of the semiconductor die, a first metal layer formed on the barrier layer, a central metal layer formed on the first metal layer, and a second metal layer formed on the central metal layer. Here, the first and second metal layers have a first melting temperature, and the central metal layer has a second melting temperature lower than the first melting temperature.
摘要翻译: 提供一种半导体器件及其接合结构,其中金属间化合物不形成半导体管芯或引线框架,从而提高电气和机械性能和润湿性并抑制管芯接合材料的聚集。 半导体器件包括半导体管芯,形成在半导体管芯的表面上的阻挡层,形成在阻挡层上的第一金属层,形成在第一金属层上的中心金属层,以及形成在中心上的第二金属层 金属层。 这里,第一和第二金属层具有第一熔融温度,并且中心金属层具有低于第一熔融温度的第二熔融温度。
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公开(公告)号:US20180145048A1
公开(公告)日:2018-05-24
申请号:US15875335
申请日:2018-01-19
发明人: Markus WIMPLINGER
CPC分类号: H01L24/83 , B81C3/001 , B81C2203/036 , H01L24/29 , H01L24/32 , H01L2224/29082 , H01L2224/291 , H01L2224/29105 , H01L2224/29111 , H01L2224/29116 , H01L2224/29117 , H01L2224/29118 , H01L2224/29123 , H01L2224/29124 , H01L2224/29139 , H01L2224/29144 , H01L2224/29147 , H01L2224/29155 , H01L2224/29157 , H01L2224/2916 , H01L2224/29166 , H01L2224/29169 , H01L2224/29171 , H01L2224/29184 , H01L2224/32145 , H01L2224/32507 , H01L2224/8302 , H01L2224/83022 , H01L2224/8381 , H01L2224/83894 , H01L2924/01003 , H01L2924/01005 , H01L2924/01011 , H01L2924/01012 , H01L2924/01019 , H01L2924/0102 , H01L2924/01034 , H01L2924/01037 , H01L2924/01038 , H01L2924/0105 , H01L2924/01052 , H01L2924/01055 , H01L2924/01056 , H01L2924/01322 , H01L2924/10251 , H01L2924/10252 , H01L2924/10253 , H01L2924/1026 , H01L2924/10271 , H01L2924/10272 , H01L2924/10323 , H01L2924/10328 , H01L2924/10329 , H01L2924/1033 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10334 , H01L2924/10335 , H01L2924/10336 , H01L2924/10346 , H01L2924/1037 , H01L2924/10371 , H01L2924/10372 , H01L2924/10373 , H01L2924/10375 , H01L2924/10376 , H01L2924/10377 , H01L2924/10821 , H01L2924/10823 , H01L2924/10831 , H01L2924/00 , H01L2924/00014 , H01L2924/01032 , H01L2924/01013 , H01L2924/01031 , H01L2924/0103
摘要: A method for applying a bonding layer that is comprised of a basic layer and a protective layer on a substrate with the following method steps: application of an oxidizable basic material as a basic layer on a bonding side of the substrate, at least partial covering of the basic layer with a protective material that is at least partially dissolvable in the basic material as a protective layer. In addition, the invention relates to a corresponding substrate.
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公开(公告)号:US09911713B2
公开(公告)日:2018-03-06
申请号:US15441741
申请日:2017-02-24
发明人: Markus Wimplinger
CPC分类号: H01L24/83 , B81C3/001 , B81C2203/036 , H01L24/29 , H01L24/32 , H01L2224/29082 , H01L2224/291 , H01L2224/29105 , H01L2224/29111 , H01L2224/29116 , H01L2224/29117 , H01L2224/29118 , H01L2224/29123 , H01L2224/29124 , H01L2224/29139 , H01L2224/29144 , H01L2224/29147 , H01L2224/29155 , H01L2224/29157 , H01L2224/2916 , H01L2224/29166 , H01L2224/29169 , H01L2224/29171 , H01L2224/29184 , H01L2224/32145 , H01L2224/32507 , H01L2224/8302 , H01L2224/83022 , H01L2224/8381 , H01L2224/83894 , H01L2924/01003 , H01L2924/01005 , H01L2924/01011 , H01L2924/01012 , H01L2924/01019 , H01L2924/0102 , H01L2924/01034 , H01L2924/01037 , H01L2924/01038 , H01L2924/0105 , H01L2924/01052 , H01L2924/01055 , H01L2924/01056 , H01L2924/01322 , H01L2924/10251 , H01L2924/10252 , H01L2924/10253 , H01L2924/1026 , H01L2924/10271 , H01L2924/10272 , H01L2924/10323 , H01L2924/10328 , H01L2924/10329 , H01L2924/1033 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10334 , H01L2924/10335 , H01L2924/10336 , H01L2924/10346 , H01L2924/1037 , H01L2924/10371 , H01L2924/10372 , H01L2924/10373 , H01L2924/10375 , H01L2924/10376 , H01L2924/10377 , H01L2924/10821 , H01L2924/10823 , H01L2924/10831 , H01L2924/00 , H01L2924/00014 , H01L2924/01032 , H01L2924/01013 , H01L2924/01031 , H01L2924/0103
摘要: A method for applying a bonding layer that is comprised of a basic layer and a protective layer on a substrate with the following method steps: application of an oxidizable basic material as a basic layer on a bonding side of the substrate, at least partial covering of the basic layer with a protective material that is at least partially dissolvable in the basic material as a protective layer. In addition, the invention relates to a corresponding substrate.
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公开(公告)号:US09818716B2
公开(公告)日:2017-11-14
申请号:US15324085
申请日:2015-10-09
CPC分类号: H01L24/45 , H01L23/48 , H01L24/09 , H01L24/33 , H01L24/48 , H01L24/49 , H01L2224/05552 , H01L2224/05647 , H01L2224/29109 , H01L2224/29111 , H01L2224/29123 , H01L2224/29124 , H01L2224/32225 , H01L2224/34 , H01L2224/37124 , H01L2224/37599 , H01L2224/45014 , H01L2224/45015 , H01L2224/45124 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/48491 , H01L2224/48647 , H01L2224/49111 , H01L2224/49113 , H01L2224/49433 , H01L2224/73265 , H01L2224/83801 , H01L2924/00014 , H01L2924/2076 , H01L2224/05599 , H01L2224/45099 , H01L2924/00012
摘要: A power module is fabricated, employing a clad metal that is formed by pressure-laminating aluminum and copper, in such a manner that the aluminum layer of the clad metal is bonded such as by ultrasonic bonding to the surface electrode of the power semiconductor chip and a wire is bonded to the copper layer thereof to establish electrical circuit. The clad metal is thermally treated in advance at a temperature higher than the operating temperature of the power semiconductor chip to sufficiently form intermetallic compounds at the interface between the aluminum layer and the copper layer for the intermetallic compounds so as not to grow in thickness after the bonding processes.
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