公开(公告)号：US09484088B2

公开(公告)日：2016-11-01

申请号：US14665794

申请日：2015-03-23

申请人： Micron Technology, Inc.

发明人： Scott E. Sills

IPC分类号： G11C5/02 ,  G11C5/06 ,  G11C13/00 ,  G11C11/00 ,  G11C11/50 ,  G11C7/18 ,  G11C8/00 ,  G11C11/56 ,  G11C8/14 ,  G11C19/00

CPC分类号： G11C13/0011 ,  G11C5/02 ,  G11C5/06 ,  G11C7/18 ,  G11C8/00 ,  G11C8/14 ,  G11C11/00 ,  G11C11/50 ,  G11C11/56 ,  G11C11/5614 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0009 ,  G11C13/0023 ,  G11C13/003 ,  G11C13/0069 ,  G11C19/00 ,  G11C2213/52

摘要： Various embodiments include at least one resistance change memory (RCM) cell, In one embodiment, three or more pairs of electrical contacts are coupled to the at least one RCM cell. A first portion of the pairs are arranged laterally to one another in a first grouping and a second opposing portion of the pairs are arranged laterally to one another in a second grouping. A memory cell material is disposed between opposing sides of the pairs of the three or more electrical contacts. The memory cell material is configured to form a conductive pathway between one or more of the pairs, with each of the three or more pairs being configured to be accessed individually for at least one operation including program, erase, and read operations. Additional apparatuses and methods are described.

摘要翻译： 各种实施例包括至少一个电阻变化存储器（RCM）单元。在一个实施例中，三个或更多对电触点耦合到至少一个RCM单元。 成对的第一部分在第一组中彼此横向地布置，并且对的第二相对部分在第二组中彼此横向地布置。 存储单元材料设置在三个或更多个电触点对的相对侧之间。 存储单元材料被配置为在一对或多对之间形成导电路径，其中三对或更多对中的每一对被配置为分别访问包括程序，擦除和读取操作的至少一个操作。 描述附加的装置和方法。

公开(公告)号：US20160086660A1

公开(公告)日：2016-03-24

申请号：US14826176

申请日：2015-08-13

申请人： SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION

发明人： Zhenghao Gan

IPC分类号： G11C11/50 ,  H01L23/532 ,  H01L29/49 ,  H01L21/02 ,  H01L21/28 ,  H01L21/3213 ,  H01L21/285 ,  H01L23/528 ,  H01L27/115

CPC分类号： H01L27/1021 ,  G11C11/50 ,  G11C23/00 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53261 ,  H01L27/115 ,  H01L29/84 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes an insulating layer on a semiconductor substrate, a bit line including TiAl and disposed on the insulating layer, a sidewall layer disposed on opposite sides of the bit line, a word line including TiN and disposed on the sidewall layer intersecting the bit line, and an air gap in an intersection region of the bit line and the word line. The thickness of the sidewall layer is larger than the thickness of the bit line. By having the TiAl bit line and TiN word line, the uniformity of the bit line and word line can be easily controlled to improve the performance of the semiconductor device.

公开(公告)号：US09183916B2

公开(公告)日：2015-11-10

申请号：US14241379

申请日：2012-09-12

申请人： Tsu-Jae King Liu ,  Wookhyun Kwon

发明人： Tsu-Jae King Liu ,  Wookhyun Kwon

IPC分类号： G11C11/00 ,  G11C11/38 ,  H01L27/102 ,  G11C11/36 ,  G11C11/50

CPC分类号： G11C11/38 ,  G11C11/36 ,  G11C11/50 ,  H01L27/1021

摘要： A non-volatile electro-mechanical diode memory cell is described for implementation of compact (4F2) cross-point memory arrays. The electro-mechanical diode memory cells operate with relatively low set/reset voltages and excellent retention characteristics, and are multi-time programmable. Due to its simplicity, this electro-mechanical diode memory cell is attractive for implementation of three-dimensional memory arrays for higher storage density.

摘要翻译： 描述了用于实现紧凑（4F2）交叉点存储器阵列的非易失性机电二极管存储器单元。 机电二极管存储单元以相对低的设定/复位电压和优异的保持特性工作，并且是多时间可编程的。 由于其简单性，该机电二极管存储单元对于实现用于更高存储密度的三维存储器阵列是有吸引力的。

公开(公告)号：US09019756B2

公开(公告)日：2015-04-28

申请号：US12070151

申请日：2008-02-14

申请人： Robertus Petrus van Kampen

发明人： Robertus Petrus van Kampen

IPC分类号： G11C11/50 ,  H01H59/00 ,  G11C23/00

CPC分类号： H01H59/0009 ,  G11C11/50 ,  G11C23/00

摘要： In one embodiment, a non-volatile memory bitcell includes a program electrode, an erase electrode, a cantilever electrode connected to a bi-stable cantilever positioned between the program electrode and the erase electrode, and switching means connected to the program electrode arranged to apply a voltage potential onto the program electrode, or to detect or to prevent the flow of current from the cantilever to the program electrode. The switching means may comprise a switch having a first node, a second node, and a control node, wherein voltage is applied to the control node to activate the switch to provide a connection between the first node and the second node. The switching means may comprise a pass-gate. The switching means may comprise an NMOS transistor. The switching means may comprise a PMOS transistor. The switching means may comprise a MEMS switch.

摘要翻译： 在一个实施例中，非易失性存储器位单元包括编程电极，擦除电极，连接到位于编程电极和擦除电极之间的双稳态悬臂的悬臂电极，以及连接到编程电极的开关装置， 编程电极上的电压电位，或者检测或防止从悬臂到编程电极的电流流动。 切换装置可以包括具有第一节点，第二节点和控制节点的交换机，其中电压被施加到控制节点以激活交换机以在第一节点和第二节点之间提供连接。 开关装置可以包括通孔。 开关装置可以包括NMOS晶体管。 开关装置可以包括PMOS晶体管。 开关装置可以包括MEMS开关。

公开(公告)号：US20130301336A1

公开(公告)日：2013-11-14

申请号：US13469706

申请日：2012-05-11

申请人： Scott Sills

发明人： Scott Sills

IPC分类号： G11C11/50 ,  G11C11/00

CPC分类号： G11C13/0011 ,  G11C5/02 ,  G11C5/06 ,  G11C7/18 ,  G11C8/00 ,  G11C8/14 ,  G11C11/00 ,  G11C11/50 ,  G11C11/56 ,  G11C11/5614 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0009 ,  G11C13/0023 ,  G11C13/003 ,  G11C13/0069 ,  G11C19/00 ,  G11C2213/52

摘要： Various embodiments comprise apparatuses having at least two resistance change memory (RCM) cells. In one embodiment, an apparatus includes at least two electrical contacts coupled to each of the RCM cells. A memory cell material is disposed between pairs of each of the electrical contacts coupled to each of the RCM cells. The memory cell material is capable of forming a conductive pathway between the electrical contacts with at least a portion of the memory cell material arranged to cross-couple a conductive pathway between select ones of the at least two electrical contacts electrically coupled to each of the at least two RCM cells. Additional apparatuses and methods are described.

摘要翻译： 各种实施例包括具有至少两个电阻变化存储器（RCM）单元的装置。 在一个实施例中，装置包括耦合到每个RCM单元的至少两个电触点。 存储单元材料设置在耦合到每个RCM单元的每个电触点的对之间。 存储器单元材料能够在电触点之间形成导电通路，其中存储单元材料的至少一部分布置成交替耦合到至少两个电接触中的选择的一个之间的导电通路， 最少两个RCM细胞。 描述附加的装置和方法。

公开(公告)号：US08320172B2

公开(公告)日：2012-11-27

申请号：US12846775

申请日：2010-07-29

申请人： Hernan A. Castro ,  Jeremy Hirst ,  Stephen Tang

发明人： Hernan A. Castro ,  Jeremy Hirst ,  Stephen Tang

IPC分类号： G11C11/50

CPC分类号： G11C13/0004 ,  G11C13/0069 ,  G11C2013/0078 ,  G11C2213/77

摘要： Embodiments disclosed herein may relate to controlling a discharge of a capacitive element coupled to a phase change memory cell to produce a specified state in the phase change memory cell.

摘要翻译： 本文公开的实施例可以涉及控制耦合到相变存储器单元的电容元件的放电以在相变存储器单元中产生指定状态。

公开(公告)号：US08270211B2

公开(公告)日：2012-09-18

申请号：US13082605

申请日：2011-04-08

申请人： Min-Sang Kim ,  Ji-Myoung Lee ,  Hyun-Jun Bae ,  Dong-Won Kim ,  Jun Seo ,  Weonwi Jang ,  Keun-Hwi Cho

发明人： Min-Sang Kim ,  Ji-Myoung Lee ,  Hyun-Jun Bae ,  Dong-Won Kim ,  Jun Seo ,  Weonwi Jang ,  Keun-Hwi Cho

IPC分类号： G11C11/50

CPC分类号： H01L28/40 ,  H01L27/10894

摘要： A memory device includes a storage node, a first electrode, and a second electrode formed in a memory cell, the storage node stores electrical charges, the first electrode comprising a first portion electrically connected to a second portion, the first portion moves to connect to the storage node when the second electrode is energized.

摘要翻译： 存储装置包括存储节点，第一电极和形成在存储单元中的第二电极，所述存储节点存储电荷，所述第一电极包括电连接到第二部分的第一部分，所述第一部分移动以连接到 当第二电极通电时的存储节点。

公开(公告)号：US08188554B2

公开(公告)日：2012-05-29

申请号：US11953218

申请日：2007-12-10

申请人： Jin-Jun Park

发明人： Jin-Jun Park

IPC分类号： H01L29/84 ,  H01L29/66 ,  H01L21/00 ,  G11C11/50

CPC分类号： H01L27/115 ,  B82Y10/00

摘要： A memory device includes a bit line, a first word line, a bit line contact, an electrode, a second word line and a contact tip. The bit line may extend along a first direction. The first word line is formed over the bit line and extends in a second direction. The bit line contact is formed between adjacent first word lines. The bit line contact may have an upper face substantially higher than the first word lines. The electrode contacting with the bit line contact may include an elastic material bending by an electric field among the electrode, the first word line and the second word line. The second word line is disposed over the electrode and corresponds to at least one of the first word lines. The contact tip formed at a lateral portion of the electrode may protrude toward the first and the second word lines.

摘要翻译： 存储器件包括位线，第一字线，位线接触，电极，第二字线和接触尖端。 位线可以沿着第一方向延伸。 第一字线形成在位线上并且在第二方向上延伸。 在相邻的第一字线之间形成位线接触。 位线接触可能具有比第一字线显着更高的上表面。 与位线接触的电极可以包括通过电极，第一字线和第二字线之间的电场弯曲的弹性材料。 第二字线设置在电极上并对应于第一字线中的至少一个。 形成在电极的侧面部分的接触尖端可朝向第一和第二字线突出。

公开(公告)号：US07782662B2

公开(公告)日：2010-08-24

申请号：US12181926

申请日：2008-07-29

申请人： Masaharu Wada ,  Takehiko Hojo

发明人： Masaharu Wada ,  Takehiko Hojo

IPC分类号： G11C11/50 ,  G11C5/06 ,  G11C11/00

CPC分类号： G11C17/16 ,  G11C13/00 ,  G11C13/004 ,  G11C13/0069

摘要： A storage device includes: a wiring including a first conductor with a first conductivity; and first, second and third contacts, each including a second conductor with a second conductivity and contacting the wiring. The storage device also includes: a write switching circuit controlling current for writing information that flows through the first contact, the wiring, and the second contact, and changing resistance values of the first contact to write information; and a read switching circuit controlling current for reading information that flows through the first contact, the wiring, and the third contact.

摘要翻译： 存储装置包括：包括具有第一导电性的第一导体的布线; 以及第一，第二和第三触点，每个包括具有第二导电性的第二导体并接触布线。 存储装置还包括：写入切换电路，控制用于写入流经第一触点，布线和第二触点的信息的电流，以及改变第一触点的电阻值以写入信息; 以及读取切换电路，控制用于读取流过第一触点，布线和第三触点的信息的电流。

公开(公告)号：US07719068B2

公开(公告)日：2010-05-18

申请号：US12002668

申请日：2007-12-18

申请人： Sung-Young Lee ,  Dong-Won Kim ,  Min-Sang Kim ,  Eun-Jung Yun ,  Dong-Gun Park

发明人： Sung-Young Lee ,  Dong-Won Kim ,  Min-Sang Kim ,  Eun-Jung Yun ,  Dong-Gun Park

IPC分类号： G11C11/50

CPC分类号： H01L29/788 ,  G11C11/56 ,  G11C23/00

摘要： There are provided a multi-bit electro-mechanical memory device capable of enhancing or maximizing a degree of integration of the memory device and a method of manufacturing the multi-bit electro-mechanical memory device which includes a substrate, a bit line on the substrate, and extending in a first direction; a word line on the bit line, insulated from the bit line, and extending in a second direction transverse to the first direction, and a cantilever electrode including a shape memory alloy. The cantilever electrode has a first portion electrically connected to the bit line and a second portion extending in the first direction, and spaced apart from the word line by an air gap, wherein the cantilever electrode, in a first state, is in electrical contact with the word line, and, in a second state, is spaced apart from the word line.

摘要翻译： 提供了能够增强或最大化存储器件的集成度的多位机电存储器件和制造多位机电存储器件的方法，该多位机电存储器件包括衬底，衬底上的位线 并且沿第一方向延伸; 位线上的字线，与位线绝缘，并且沿与第一方向横切的第二方向延伸，以及包括形状记忆合金的悬臂电极。 所述悬臂电极具有电连接到所述位线的第一部分和沿所述第一方向延伸的第二部分，并且通过气隙与所述字线间隔开，其中所述悬臂电极在第一状态下与所述第一状态电接触 字线，并且在第二状态下与字线间隔开。