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公开(公告)号:US12125806B2
公开(公告)日:2024-10-22
申请号:US18219422
申请日:2023-07-07
Applicant: Wolfspeed, Inc.
Inventor: Arthur Pun , Basim Noori
IPC: H01L23/31 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/047 , H01L23/29 , H01L23/495 , H01L23/66
CPC classification number: H01L23/564 , H01L21/4817 , H01L21/4825 , H01L21/565 , H01L23/047 , H01L23/293 , H01L23/296 , H01L23/3114 , H01L23/49513 , H01L23/4952 , H01L23/49562 , H01L23/49575 , H01L23/66 , H01L2223/6683
Abstract: A method of packaging an RF transistor device includes attaching one or more electronic devices to a carrier substrate, applying an encapsulant over at least one of the one or more electronic devices, and providing a protective structure on the carrier substrate over the one or more electronic devices. A packaged RF transistor device includes a carrier substrate, one or more electronic devices attached to the carrier substrate, an encapsulant material over at least one of the one or more electronic devices and extending onto the carrier substrate, and a protective structure on the carrier substrate over the one or more electronic devices and the encapsulant material.
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公开(公告)号:US12046533B2
公开(公告)日:2024-07-23
申请号:US17441913
申请日:2019-06-25
Applicant: Mitsubishi Electric Corporation
Inventor: Tsuyoshi Takayama , Takaaki Shirasawa , Mitsunori Aiko
IPC: H01L23/40 , H01L23/31 , H01L23/047 , H01L25/11
CPC classification number: H01L23/4006 , H01L23/3107 , H01L23/047 , H01L2023/4081 , H01L2023/4087 , H01L25/115 , H01L2924/1815
Abstract: It is an object to provide a technique allowing for suppression of the height of a protrusion from the surface of a semiconductor module. A semiconductor device includes: a semiconductor module having a first groove; a Belleville washer having a recess in an outer surface and a protrusion on an inner surface; and a screw passing through the hole of the Belleville washer and the first groove of the semiconductor module to fasten the semiconductor module and an attached body. A head of the screw is accommodated in the recess of the Belleville washer, and at least portion of the protrusion of the Belleville washer is accommodated in the first groove of the semiconductor module.
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公开(公告)号:US11967936B2
公开(公告)日:2024-04-23
申请号:US17313616
申请日:2021-05-06
Applicant: MACOM Technology Solutions Holdings, Inc.
Inventor: Marvin Marbell , Jonathan Chang
CPC classification number: H03F1/56 , H01L23/047 , H01L23/66 , H03F1/0288 , H03F3/211 , H01L2223/6611 , H01L2223/6655 , H03F2200/451
Abstract: A semiconductor device package includes a plurality of input leads, a plurality of transistor amplifier dies having inputs respectively coupled to the plurality of input leads, and a combined output lead configured to combine output signals received from the plurality of transistor amplifier dies and output a combined signal.
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公开(公告)号:US11901247B2
公开(公告)日:2024-02-13
申请号:US17722529
申请日:2022-04-18
Applicant: KYOCERA Corporation
Inventor: Masami Juta , Daisuke Sakumoto
IPC: H01L23/047 , H01L23/10 , H01S5/02216 , H01L23/498 , H01S5/02251 , H01L23/66 , H01L31/0203 , H01L31/02
CPC classification number: H01L23/047 , H01L23/10 , H01L23/49805 , H01L23/49811 , H01S5/02216 , H01L23/66 , H01L31/0203 , H01L31/02005 , H01L2223/6627 , H01L2924/16195 , H01L2924/16251 , H01L2924/1715 , H01S5/02251
Abstract: An insulating component includes an insulating substrate, a metal layer, a bond, and a lead terminal. The plate-like insulating substrate has a groove continuous from its upper to side surfaces. The metal layer includes a first metal layer on the upper surface of the insulating substrate and a second metal layer on an inner surface of the groove continuous with the first metal layer. The bond is on an upper surface of the metal layer. The lead terminal is on an upper surface of the first metal layer with the bond in between, and overlaps the grooves. The bond includes a first bond fixing the lead terminal to the first metal layer and a second bond on an upper surface of the second metal layer continuous with the first bond. The groove includes an inner wall having a ridge. The second bond is between the ridge and the lead terminal.
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公开(公告)号:US20230197629A1
公开(公告)日:2023-06-22
申请号:US17557551
申请日:2021-12-21
Applicant: Qorvo US, Inc.
Inventor: Zhunming Du , Christopher Sanabria , Timothy M. Gittemeier , Terry Hon , Anthony Chiu , Tariq Lodhi
IPC: H01L23/552 , H01L23/047 , H01L23/66
CPC classification number: H01L23/552 , H01L23/047 , H01L23/66 , H01L2223/6683
Abstract: The disclosure is directed to an electronic device with a lid to manage radiation feedback. The electronic device includes a lid having at least one sidewall and a top wall, as well as a semiconductor positioned within a cavity of the lid. In certain embodiments, the lid includes at least one dielectric material and at least one internal conductive layer at least partially embedded within the at least one dielectric material. In certain embodiments, the lid includes dielectric material, as well as an internal wall extending from the top wall and positioned between an input port and an output port of the semiconductor. Such configurations may suppress any undesirable feedback through the lid between the input port and the output port of the semiconductor.
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公开(公告)号:US10074599B2
公开(公告)日:2018-09-11
申请号:US15620191
申请日:2017-06-12
Applicant: Micron Technology, Inc.
Inventor: Chua Swee Kwang , Yong Poo Chia
IPC: H01L23/495 , H01L23/00 , H01L23/047 , H01L21/48 , H01L23/31
CPC classification number: H01L23/49575 , H01L21/4821 , H01L21/4825 , H01L21/4839 , H01L23/047 , H01L23/3114 , H01L23/49503 , H01L23/4951 , H01L24/32 , H01L24/48 , H01L29/0657 , H01L2224/05599 , H01L2224/32145 , H01L2224/32245 , H01L2224/45015 , H01L2224/45099 , H01L2224/48091 , H01L2224/48247 , H01L2224/48464 , H01L2224/73265 , H01L2924/00014 , H01L2924/01006 , H01L2924/01015 , H01L2924/01027 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/10155 , H01L2924/10158 , H01L2924/14 , H01L2924/181 , H01L2924/207 , H01L2924/00012 , H01L2224/85399
Abstract: Semiconductor dies with recesses, associated leadframes, and associated systems and methods are disclosed. A semiconductor system in accordance with one embodiment includes a semiconductor die having a first surface and a second surface facing opposite from the first surface, with the first surface having a die recess. The system can further include a support paddle carrying the semiconductor die, with at least part of the support paddle being received in the die recess. In particular embodiments, the support paddle can form a portion of a leadframe. In other particular embodiments, the support paddle can include a paddle surface that faces toward the semiconductor die and has an opening extending through the paddle surface and through the support paddle.
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公开(公告)号:US09966319B1
公开(公告)日:2018-05-08
申请号:US13785959
申请日:2013-03-05
Applicant: Erick Merle Spory
Inventor: Erick Merle Spory
CPC classification number: H01L24/49 , H01L21/4803 , H01L21/52 , H01L23/04 , H01L23/047 , H01L23/057 , H01L23/10 , H01L23/49551 , H01L23/49816 , H01L23/49838 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/45 , H01L24/48 , H01L24/85 , H01L24/98 , H01L2224/02311 , H01L2224/02317 , H01L2224/02331 , H01L2224/02375 , H01L2224/02377 , H01L2224/03312 , H01L2224/03332 , H01L2224/03334 , H01L2224/03901 , H01L2224/04042 , H01L2224/0508 , H01L2224/05144 , H01L2224/05548 , H01L2224/05582 , H01L2224/05583 , H01L2224/05624 , H01L2224/05639 , H01L2224/06051 , H01L2224/06102 , H01L2224/2919 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48227 , H01L2224/48247 , H01L2224/48463 , H01L2224/73265 , H01L2224/741 , H01L2224/83192 , H01L2224/85207 , H01L2224/98 , H01L2924/00014 , H01L2924/15153 , H01L2924/16152 , H01L2224/48 , H01L2224/45015 , H01L2924/207
Abstract: A method for assembling a packaged integrated circuit for operating reliably at elevated temperatures is provided. The method includes providing an extended bond pad over an original die pad of an extracted die to create a modified extracted die. The extracted die is a fully functional semiconductor die that has been removed from a finished packaged integrated circuit. The method also includes placing the modified extracted die into a cavity of a package base and bonding a new bond wire between the extended bond pad and a lead of the package base or a downbond, and sealing a package lid to the package base and the cavity of the package.
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公开(公告)号:US09949385B2
公开(公告)日:2018-04-17
申请号:US14790437
申请日:2015-07-02
Applicant: ABB TECHNOLOGY AG
Inventor: Samuel Hartmann , David Guillon , David Hajas , Markus Thut
IPC: H05K5/00 , H01L23/047 , H05K3/30 , H01R43/20 , H05K1/18 , H05K1/11 , H01L23/48 , H01R43/02 , H01L21/48 , H01L23/00 , H01L23/498 , B23K20/10
CPC classification number: H05K5/0034 , B23K20/10 , H01L21/4853 , H01L23/047 , H01L23/3735 , H01L23/48 , H01L23/49861 , H01L24/48 , H01L24/49 , H01L2224/48091 , H01L2224/48227 , H01L2224/49097 , H01L2224/49111 , H01L2224/73265 , H01L2924/00014 , H01R43/0207 , H01R43/205 , H05K1/111 , H05K1/181 , H05K3/301 , H05K2203/0285 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor module includes a base plate, a substrate on the base plate and carrying at least one semiconductor chip, a housing attached to the base plate and at least partially enclosing the substrate, and at least one terminal having one end which protrudes from the housing and another end which has a terminal foot attached on a terminal pad of the metallization by means of ultrasonic welding. The housing has a protective wall which encloses the terminal and divides an interior space of the housing into an unprotected region and a protected region. The protective wall is formed such that a gap is formed between the substrate and the protective wall. The gap is designed to carry a fluid flow such that particles produced during the ultrasonic welding of the terminal foot to the terminal pad are prevented from penetrating into the protected region from the unprotected region.
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公开(公告)号:US09922894B1
公开(公告)日:2018-03-20
申请号:US15269629
申请日:2016-09-19
Applicant: FREESCALE SEMICONDUCTOR INC.
Inventor: Lakshminarayan Viswanathan , Jaynal A. Molla , David Abdo , Mali Mahalingam , Carl D'Acosta
IPC: H01L23/12 , H01L23/66 , H01L23/20 , H01L23/047 , H01L21/48 , H01L23/057 , H01L23/367 , B22F3/10 , B22F1/00 , B23K35/02 , B23K35/30 , H01L23/00
CPC classification number: H01L23/20 , B22F1/0062 , B22F3/10 , B22F5/10 , B22F7/02 , B22F2301/10 , B22F2301/255 , B22F2302/45 , B23K35/025 , B23K35/30 , H01L21/4817 , H01L21/50 , H01L23/04 , H01L23/047 , H01L23/057 , H01L23/10 , H01L23/3675 , H01L24/32 , H01L24/49 , H01L24/73 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48106 , H01L2224/48177 , H01L2224/73265 , H01L2924/01042 , H01L2924/15747 , H01L2924/3511
Abstract: Air cavity packages and methods for producing air cavity packages containing sintered bonded components, multipart window frames, and/or other unique structural features are disclosed. In one embodiment, a method for fabricating an air cavity package includes the step or process of forming a first metal particle-containing precursor layer between a base flange and a window frame positioned over the base flange. A second metal particle-containing precursor layer is further formed between the base flange and a microelectronic device positioned over the base flange. The metal particle-containing precursor layers are sintered substantially concurrently at a maximum processing temperature less than melt point(s) of metal particles within the layers to produce a first sintered bond layer from the first precursor layer joining the window frame to the base flange and to produce a second sintered bond layer from the second precursor layer joining the microelectronic device to the base flange.
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公开(公告)号:US20180040524A1
公开(公告)日:2018-02-08
申请号:US15788863
申请日:2017-10-20
Applicant: MACOM Technology Solutions Holdings, Inc.
Inventor: Quinn Don Martin
IPC: H01L23/047 , H01L23/66 , H01L23/495
CPC classification number: H01L23/047 , H01L23/49541 , H01L23/49568 , H01L23/49861 , H01L23/66 , H01L2224/49175
Abstract: A leadframe and air cavity packages formed using the leadframe are described. Using the leadframe, several air cavity packages can be quickly formed at one time. A method of manufacture using the leadframe can include forming the leadframe from a strip conductive material, where the leadframe includes conductive leads and downset facets. The method can also include forming slugs from conductive material, and arranging the slugs into respective positions relative to the downset facets of the leadframe. The method can also include fastening the slugs to the leadframe using the downset facets, and forming plastic packages around the leadframe and the slugs, where each of the plastic packages includes an air cavity in which at least a portion of a respective one of the slugs and at least a portion of a respective one of the conductive leads is exposed.
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