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公开(公告)号:US20250070804A1
公开(公告)日:2025-02-27
申请号:US18672458
申请日:2024-05-23
Applicant: QUALCOMM Incorporated
Inventor: Alexander DOROSENCO
Abstract: Techniques for generating a power tracking supply voltage for a circuit (e.g., a power amplifier) are disclosed. The circuit may process multiple transmit signals being sent simultaneously on multiple carriers at different frequencies. In one exemplary design, an apparatus includes a power tracker and a power supply generator. The power tracker determines a power tracking signal based on inphase (I) and quadrature (Q) components of a plurality of transmit signals being sent simultaneously. The power supply generator generates a power supply voltage based on the power tracking signal. The apparatus may further include a power amplifier (PA) that amplifies a modulated radio frequency (RF) signal based on the power supply voltage and provides an output RF signal.
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公开(公告)号:US20250038721A1
公开(公告)日:2025-01-30
申请号:US18361654
申请日:2023-07-28
Applicant: QUALCOMM Incorporated
Inventor: Przemyslaw Jan MROSZCZYK , Stephen Anthony BARRY
Abstract: An apparatus includes a multi-stage amplifier and a feedback switch. The multi-stage amplifier includes a first amplifier having a first input, a second input, and an output, a second amplifier having an input and an output, wherein the input of the second amplifier is coupled to the output of the first amplifier, and a third amplifier having an input and an output, wherein the input of the third amplifier is coupled to the output of the first amplifier. The feedback switch is coupled between the output of the third amplifier and the second input of the first amplifier.
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公开(公告)号:US12199574B2
公开(公告)日:2025-01-14
申请号:US17407591
申请日:2021-08-20
Inventor: Gholamreza Nikandish , Anding Zhu , Robert Bogdan Staszewski
Abstract: A broadband power amplifier circuit is disclosed for providing load modulation, and includes an active element for receiving an impedance matched signal and for amplifying the impedance matched signal to supply an amplified signal, and an output matching network having a load impedance and coupled to the active element for receiving the amplified signal, the output matching network matches the load impedance to an optimum load impedance of the active element.
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公开(公告)号:US12176857B2
公开(公告)日:2024-12-24
申请号:US17490109
申请日:2021-09-30
Applicant: Mitsubishi Electric Corporation
Inventor: Yuji Komatsuzaki , Satoru Honda , Shuichi Sakata , Shintaro Shinjo
Abstract: This Doherty amplifier includes: a carrier amplifier for amplifying a first signal and outputting the amplified first signal; a peaking amplifier for amplifying a second signal and outputting the amplified second signal, the peaking amplifier having a non-linear output capacitance; a first output circuit for transmitting the first signal output from the carrier amplifier; a second output circuit for functioning as a virtual short stub when the peaking amplifier does not perform an amplification operation, and transmitting the second signal output from the peaking amplifier; and a combining circuit for combining the first signal transmitted by the first output circuit and the second signal transmitted by the second output circuit and outputting a combined signal of the first signal and the second signal, wherein, when the peaking amplifier performs the amplification operation, the second output circuit transforms an impedance seen by looking into the combining circuit from the peaking amplifier into an impedance in an inductive region.
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公开(公告)号:US12166458B2
公开(公告)日:2024-12-10
申请号:US17496929
申请日:2021-10-08
Applicant: Rachit Joshi
Inventor: Rachit Joshi
Abstract: The present disclosure provides a RF power amplifier and a method for manufacturing a Doherty power amplifier. The RF power amplifier includes at least one transistor, a harmonic termination circuit, and an impedance inverter. The harmonic termination circuit has one terminal directly connected to the drain electrode of the transistor and contributes as a part of a harmonic matching network for the transistor at the second harmonic and/or the third harmonic of the fundamental frequency. The impedance inverter is configured to perform impedance inversion of a static load or a modulated load at the fundamental frequency without affected by the harmonic termination circuit.
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公开(公告)号:US12147623B2
公开(公告)日:2024-11-19
申请号:US17819071
申请日:2022-08-11
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Hyung Gun Ma , Sang Hyun Heo , Moon Jae Jeong
Abstract: A sensor device of the present invention includes first sensors receiving a plurality of driving signals; second sensors outputting a plurality of sensing signals in response to the driving signals; and a sensor receiver connected receiving the sensing signals from the second sensors, and including a band pass filter filtering the sensing signals. The band pass filter includes a multi-path filter in which a frequency of the driving signals is set as a center frequency; a gain amplifier amplifying signals filtered through the multi-path filter according to a predetermined gain value; and a buffer isolating the multi-path filter and the gain amplifier from each other.
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公开(公告)号:US12107558B2
公开(公告)日:2024-10-01
申请号:US17515695
申请日:2021-11-01
Applicant: Texas Instruments Incorporated
Inventor: Krishnanshu Dandu , Brian Paul Ginsburg
IPC: H03F3/68 , G01S7/03 , G01S13/931 , H01Q1/32 , H01Q21/08 , H03F3/195 , H03F3/21 , H03F3/24 , H03F3/45 , H03G3/30 , H01Q9/06 , H03H7/48 , H04B1/04
CPC classification number: H03F3/68 , G01S7/032 , G01S13/931 , H01Q1/3233 , H01Q21/08 , H03F3/195 , H03F3/211 , H03F3/245 , H03F3/45475 , H03G3/3042 , H01Q9/065 , H03F2200/294 , H03F2200/451 , H03H7/487 , H04B2001/0408
Abstract: A system having a set of power amplifiers each having a primary inductive structure configured to provide an output signal. A secondary inductive structure is configured to inductively couple to each of the primary inductive structures. A transmission line is provided with a signal trace and a ground trace. The signal trace of the transmission line is connected to a first end of the secondary inductive structure. A return path from a second end of the secondary inductive structure is coupled via a resonant network to the ground trace of the transmission line, in which the return path is spaced away from the secondary inductive structure to minimize inductive coupling to the primary structures.
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公开(公告)号:US20240186958A1
公开(公告)日:2024-06-06
申请号:US18534153
申请日:2023-12-08
Applicant: pSemi Corporation
Inventor: Kashish Pal , Emre Ayranci , Miles Sanner
CPC classification number: H03F1/223 , H03F1/26 , H03F3/193 , H03F3/68 , H04L27/2647 , H03F1/0277 , H03F2200/294 , H03F2200/489
Abstract: An amplifier circuit configuration capable of processing non-contiguous intra-band carrier aggregate (CA) signals using amplifiers is disclosed herein. In some cases, each of a plurality of amplifiers is an amplifier configured as a cascode (i.e., a two-stage amplifier having two transistors, the first configured as a “common source” input transistor, e.g., input field effect transistor (FET), and the second configured in a “common gate” configuration as a cascode output transistor, (e.g. cascode output FET). In other embodiments, the amplifier may have additional transistors (i.e., more than two stages and/or stacked transistors). The amplifier circuit configuration can be operated in either single mode or split mode. A switchable coupling is placed between the drain of the input FETs of each amplifier within the amplifier circuit configuration. During split mode, the coupling is added to the circuit to allow some of the signal present at the drain of each input FET to be coupled to the drain of the other input FET.
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公开(公告)号:US11929721B2
公开(公告)日:2024-03-12
申请号:US17223384
申请日:2021-04-06
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Satoshi Tanaka , Yoshiaki Sukemori , Takeshi Kogure , Shohei Imai
CPC classification number: H03F3/245 , H03F1/0288 , H03F3/195 , H03F3/68 , H03F2200/451
Abstract: A power amplifier module includes a first amplifier, a power splitter, a second amplifier, a third amplifier, a phase shifter, a combining unit, and a controller. The first amplifier amplifies a first signal and outputs a second signal. The power splitter splits the second signal into a third signal and a fourth signal. The second amplifier amplifies the third signal and outputs a fifth signal. The third amplifier amplifies the fourth signal and outputs a sixth signal. The phase shifter receives the fifth signal and shifts a phase of the fifth signal. The combining unit combines the fifth signal having the phase shifted by the phase shifter and the sixth signal and outputs an amplified signal of the second signal. The controller outputs a first control signal for controlling a power level of the sixth signal output from the third amplifier.
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公开(公告)号:US20240072736A1
公开(公告)日:2024-02-29
申请号:US18073506
申请日:2022-12-01
Applicant: ACER INCORPORATED
Inventor: Po-Jen Tu , Jia-Ren Chang , Kai-Meng Tzeng , Ming-Chun Yu
CPC classification number: H03F1/52 , H03F3/68 , H03F2200/03
Abstract: An amplifier DC bias protection circuit includes an amplifier module, a filter module and a comparator module. The amplifier module converts an input signal into a non-inverting signal and an inverting signal. The filter module blocks AC signals in the non-inverting signal and the inverting signal, thereby providing a first DC bias signal and a second DC bias signal accordingly. The comparator module is configured to determine whether the absolute value of a DC bias difference signal is greater than a predetermined value, and output a determination signal for deactivating the amplifier module when the absolute value of the DC bias difference signal is greater than the predetermined value. The DC bias difference signal is associated with the voltage difference between the first DC bias signal and the second DC bias signal.
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