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公开(公告)号:US20240348211A1
公开(公告)日:2024-10-17
申请号:US18624973
申请日:2024-04-02
Applicant: pSemi Corporation
Inventor: Jonathan James Klaren , David Kovac , Eric S. Shapiro , Christopher C. Murphy , Robert Mark Englekirk , Keith Bargroff , Tero Tapio Ranta
CPC classification number: H03F1/223 , H03F1/301 , H03F1/56 , H03F3/193 , H03F3/195 , H03F3/213 , H03F3/245 , H03F2200/102 , H03F2200/105 , H03F2200/165 , H03F2200/18 , H03F2200/21 , H03F2200/222 , H03F2200/225 , H03F2200/243 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/42 , H03F2200/451 , H03F2200/48 , H03F2200/489 , H03F2200/492 , H03F2200/498 , H03F2200/555 , H03F2200/61 , H03F2200/78
Abstract: Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.
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2.
公开(公告)号:US12113486B2
公开(公告)日:2024-10-08
申请号:US17378564
申请日:2021-07-16
Applicant: The Boeing Company
Inventor: Chris M. Thomas , Brian K. Kormanyos
CPC classification number: H03F1/223 , H03F1/0222 , H03F3/195 , H03F3/245 , H03F2200/318 , H03F2200/451
Abstract: An amplifier with stacked transconducting cells in parallel and/or cascade “current mode” combining is disclosed herein. In one or more embodiments, a method for operation of a high-voltage signal amplifier comprises inputting, into each transconducting cell of a plurality of transconducting cells, a direct current (DC) supply current (Idc), an alternating current (AC) radio frequency (RF) input current (IRF_IN), and an RF input signal (RFIN). The method further comprises outputting, by each of the transconducting cells of the plurality of transconducting cells, the DC supply current (Idc) and an AC RF output current (IRF_OUT). In one or more embodiments, the transconducting cells are connected together in cascode for the DC supply current (Idc), are connected together in parallel (or in cascade) for the RF input signal (RFIN), and are connected together in parallel (or in cascade) for the AC RF output currents (IRF_OUT).
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公开(公告)号:US20240297625A1
公开(公告)日:2024-09-05
申请号:US18177164
申请日:2023-03-02
Applicant: QUALCOMM INCORPORATED
Inventor: Sadia AFROZ , Conor DONOVAN
CPC classification number: H03F3/45192 , H03F1/223 , H03F1/26 , H03F1/565 , H03F2200/451
Abstract: A transimpedance-based baseband filter (BBF) including a two-stage operational transconductance amplifier (OTA) having a first stage based on a folded cascode topology, the first stage electrically coupled to a second stage, the second stage having a class AB topology, the first stage having an N-type and P-type transistor pair located between a P-type transistor and an N-type transistor, the N-type and P-type transistor pair configured to provide bias signals to push-pull transistors in the second stage.
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公开(公告)号:US12068724B2
公开(公告)日:2024-08-20
申请号:US17403595
申请日:2021-08-16
Applicant: QUALCOMM Incorporated
Inventor: Gary Lee Brown, Jr. , Chirag Dipak Patel
CPC classification number: H03F3/195 , H03F1/223 , H03H7/20 , H03H7/38 , H03F2200/204
Abstract: Aspects of the disclosure relate to a radio frequency phase shifter. An example includes an amplification stage to produce an amplified voltage, the amplification stage having a first amplifier with a first input coupled to a first output of a hybrid coupler and a second amplifier with a complementary second input coupled to a complementary second output of the hybrid coupler. A vector modulation stage coupled to the amplification stage receives the amplified voltage and produces a modulated vector, the vector modulation stage has an in-phase section and a quadrature section to control the phase of the modulated vector in response to a phase control signal. A varactor coupled across the first input and the second input of the amplification stage adjusts the capacitance between the first input and the second input in response to a capacitance control signal.
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5.
公开(公告)号:US20240223144A1
公开(公告)日:2024-07-04
申请号:US18527346
申请日:2023-12-03
Applicant: LITE-ON SINGAPORE PTE. LTD.
Inventor: Yoshio Nishida
CPC classification number: H03F3/45748 , H03F1/223 , H03F3/45237 , H03F2203/45212
Abstract: A two-stage common-mode feedback (CMFB) circuit and a fully differential operational amplifier are provided. The two-stage CMFB circuit includes a first CMFB circuit and a second CMFB circuit. The first CMFB circuit includes a first CMFB component that receives a first differential pair of output signals of the first amplifier and a first reference signal. The first CMFB component generates a first control signal to regulate a first common-mode voltage of the first amplifier to a first reference voltage of the first reference signal. The second CMFB circuit includes a second CMFB component that receives a second differential pair of output signals of the second amplifier and a second reference signal. The second CMFB component generates a second control signal according to a second reference signal, so as to regulate a second common-mode voltage of the second amplifier to a second reference voltage of the second reference signal.
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公开(公告)号:US20240098864A1
公开(公告)日:2024-03-21
申请号:US18513376
申请日:2023-11-17
Applicant: Skyworks Solutions, Inc.
Inventor: George Khoury , Leslie Paul Wallis , Yasser Khairat Soliman
IPC: H05B47/19 , F21V23/00 , H01L23/552 , H01L23/66 , H03F1/22 , H03F1/32 , H03F1/34 , H03F1/56 , H03F3/195 , H03F3/24 , H04B1/04 , H04B1/40
CPC classification number: H05B47/19 , F21V23/006 , H01L23/552 , H01L23/66 , H03F1/223 , H03F1/32 , H03F1/3205 , H03F1/347 , H03F1/565 , H03F3/195 , H03F3/245 , H04B1/0475 , H04B1/40 , H04W84/12
Abstract: Front end systems and related devices, integrated circuits, modules, and methods are disclosed. One such front end system includes a low noise amplifier in a receive path and a multi-mode power amplifier circuit in a transmit path. The low noise amplifier includes a first inductor, an amplification circuit, and a second inductor magnetically coupled to the first inductor to provide negative feedback to linearize the low noise amplifier. The multi-mode power amplifier circuit includes a stacked output stage including a transistor stack of two or more transistors. The multi-mode power amplifier circuit also includes a bias circuit configured to control a bias of at least one transistor of the transistor stack based on a mode of the multi-mode power amplifier circuit. Other embodiments of front end systems are disclosed, along with related devices, integrated circuits, modules, methods, and components thereof.
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公开(公告)号:US20240080002A1
公开(公告)日:2024-03-07
申请号:US18502458
申请日:2023-11-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Young-min Kim , Jae-seung Lee , Jung-seok Lim , Pil-sung Jang
CPC classification number: H03F3/189 , H03F1/22 , H03F1/223 , H03F3/193 , H03F3/72 , H03H7/19 , H03F2200/294 , H03F2200/61 , H03F2203/7206
Abstract: A low-noise amplifier in a receiver supporting a beam forming function may selectively change a phase shift for beam steering. The low-noise amplifier may include first and second transistors and a variable capacitance circuit connected to a gate of the second transistor. The variable capacitance circuit may selectively change capacitance thereof based on a capacitance control signal applied thereto according to beam-forming information, where the changed capacitance correspondingly causes a phase change in an output signal of the low-noise amplifier. A similar scheme may be employed for amplifiers in transmit signal paths to steer a transmit beam.
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公开(公告)号:US11923807B2
公开(公告)日:2024-03-05
申请号:US17331436
申请日:2021-05-26
Applicant: pSemi Corporation
Inventor: Parvez H. Daruwalla , Yucheng Tong , Jonathan James Klaren
CPC classification number: H03F1/223 , G01R31/2834 , H03F3/195 , H03F3/245 , H03F3/72 , H03F2200/261 , H03F2200/294 , H03F2200/451
Abstract: Circuits and methods for improving IC yield during automated test equipment (ATE) calibration of circuit designs which require IDD calibration and use a closed feedback bias circuit, such as amplifier circuits. The circuit designs include bias branch/active circuit architectures where the active circuit includes one or more active devices. An example first embodiment uses an on-chip calibration switch between the on-chip grounds of a bias network and an active circuit comprising an amplifier. During calibration of the active circuit by the ATE, the calibration switch is closed, and after completion of calibration, the calibration switch is opened. An example second embodiment utilizes an active on-chip feedback loop calibration circuit to equalize voltages between the on-chip grounds of a bias network and an active circuit comprising an amplifier during calibration of the active circuit. Both embodiments mitigate or overcome miscalibration of active circuit current settings resulting from ATE test probe resistance.
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9.
公开(公告)号:US11894809B2
公开(公告)日:2024-02-06
申请号:US17737878
申请日:2022-05-05
Applicant: pSemi Corporation
Inventor: Rong Jiang , Haopei Deng
CPC classification number: H03F1/223 , H03F1/3205 , H03F1/565 , H03F3/02 , H03F3/195 , H03G3/3042
Abstract: Methods and devices for amplifying an input RF signal according to at least two gain-states is described. According to one aspect, a multi gain amplifier circuit including a low noise amplifier having a stack of transistors is used for amplification of the input RF signal. When switching from a low gain-state to a high gain-state, the drain-to-source voltage of the output transistor of the stack is increased to affect region of operation of the output transistor, and thereby reduce non-linearity at the output of the amplifier. When switching from the high gain-state to the low gain-state, the drain-to-source voltage of the input transistor of the stack is increased to affect region of operation of the input transistor, and thereby reduce non-linearity at the output of the amplifier.
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公开(公告)号:US11881828B2
公开(公告)日:2024-01-23
申请号:US17671374
申请日:2022-02-14
Applicant: pSemi Corporation
Inventor: Jing Li , Emre Ayranci , Miles Sanner
CPC classification number: H03G3/3036 , H03F1/223 , H03F1/3205 , H03F3/193 , H03F3/211 , H03F3/72 , H03G1/0023 , H03G1/0029 , H03G1/0088 , H03G3/001 , H03F2200/156 , H03F2200/159 , H03F2200/294 , H03F2200/451 , H03F2200/489 , H03F2200/492 , H03F2200/61 , H03F2203/7239 , H03G3/3052 , H03G2201/504
Abstract: A multi-gain LNA with inductive source degeneration is presented. The inductive source degeneration is provided via a tunable degeneration network that includes an inductor in parallel with one or more switchable shunting networks. Each shunting network includes a shunting capacitor that can selectively be coupled in parallel to the inductor. A capacitance of the shunting capacitor is calculated so that a combined impedance of the inductor and the shunting capacitor at a narrowband frequency of operation is effectively an inductance. The inductance is calculated according to a desired gain of the LNA. According to one aspect, the switchable shunting network includes a resistor in series connection with the shunting capacitor to provide broadband frequency response stability of the tunable degeneration network. According to another aspect, the LNA includes a plurality of selectable branches to further control gain of the LNA.