Wafer level packaged integrated circuit
    5.
    发明授权
    Wafer level packaged integrated circuit 有权
    晶圆级封装集成电路

    公开(公告)号:US08421175B2

    公开(公告)日:2013-04-16

    申请号:US12556827

    申请日:2009-09-10

    申请人: Robert Nicol

    发明人: Robert Nicol

    IPC分类号: H01L31/0232

    摘要: A wafer level packaged integrated circuit includes an array of contacts, a silicon layer and a glass layer. The silicon and glass layers are bonded together to form a bonding material layer therebetween. The bonding material layer includes gaps between the silicon layer and the glass layer at areas where no bonding material is present. An array of contacts is adjacent the semiconductor layer on a side thereof opposite the bonding layer. The wafer level packaged integrated circuit is provided with additional bonding material layer portions within the gaps and aligned with at least some of the contacts. When the wafer level packaged integrated circuit is configured as an image sensor or display having a pixel array, the additional bonding material layer portions are not used in an area of the pixel array.

    摘要翻译: 晶圆级封装集成电路包括触点阵列,硅层和玻璃层。 硅和玻璃层结合在一起,以在它们之间形成接合材料层。 接合材料层在不存在接合材料的区域包括硅层和玻璃层之间的间隙。 触点阵列在与结合层相对的一侧与半导体层相邻。 晶片级封装集成电路在间隙内提供附加的结合材料层部分并与至少一些触点对准。 当晶片级封装集成电路被配置为具有像素阵列的图像传感器或显示器时,在像素阵列的区域中不使用附加的接合材料层部分。