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公开(公告)号:US12087733B2
公开(公告)日:2024-09-10
申请号:US17383911
申请日:2021-07-23
发明人: Kuan-Yu Huang , Li-Chung Kuo , Sung-Hui Huang , Shang-Yun Hou
IPC分类号: H01L25/065 , H01L23/00 , H01L23/31 , H01L23/498 , H01L25/00 , H01L25/18
CPC分类号: H01L25/0655 , H01L23/3185 , H01L23/49833 , H01L24/32 , H01L24/33 , H01L24/73 , H01L24/92 , H01L25/50 , H01L25/18 , H01L2224/32057 , H01L2224/33051 , H01L2224/33152 , H01L2224/3316 , H01L2224/73204 , H01L2224/9211 , H01L2224/92125
摘要: A method includes bonding a first package component over a second package component, dispensing a first underfill between the first package component and the second package component, and bonding a third package component over the second package component. A second underfill is between the third package component and the second package component. The first underfill and the second underfill are different types of underfills.
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公开(公告)号:US20140138844A1
公开(公告)日:2014-05-22
申请号:US13683050
申请日:2012-11-21
CPC分类号: H01L23/481 , H01L24/03 , H01L24/05 , H01L24/32 , H01L24/94 , H01L2224/0345 , H01L2224/03452 , H01L2224/0347 , H01L2224/0361 , H01L2224/03616 , H01L2224/04026 , H01L2224/05166 , H01L2224/0557 , H01L2224/05573 , H01L2224/0558 , H01L2224/05644 , H01L2224/05647 , H01L2224/0603 , H01L2224/2929 , H01L2224/293 , H01L2224/32227 , H01L2224/3316 , H01L2224/94 , H01L2924/00014 , H01L2224/03
摘要: A patterned backside metal ground plane for improved metal adhesion and methods of manufacture are disclosed herein. The method includes forming at least one die on a substrate. The at least one die is formed adjacent to a dicing channel and includes through silicon vias (TSVs). The method further includes forming a metalized ground plane on a backside of the substrate in contact with the TSVs and which is located in such areas on the backside of the substrate that it does not interfere with dicing operations performed within the dicing channel.
摘要翻译: 本文公开了一种用于改善金属附着力的图案化背面金属接地层及其制造方法。 该方法包括在衬底上形成至少一个管芯。 至少一个管芯与切割通道相邻形成,并且包括硅通孔(TSV)。 所述方法还包括在与TSV接触的衬底的背面上形成金属化的接地平面,并且位于衬底背面的这些区域中,其不干扰在切割通道内执行的切割操作。
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公开(公告)号:US20240250055A1
公开(公告)日:2024-07-25
申请号:US18624727
申请日:2024-04-02
发明人: Meng-Tsung KUO , Hui-Chang YU , Chih-Kung HUANG , Wei-Teng CHANG
IPC分类号: H01L23/00 , H01L21/48 , H01L23/10 , H01L23/367 , H01L25/065
CPC分类号: H01L24/33 , H01L21/4817 , H01L23/10 , H01L23/3675 , H01L24/29 , H01L24/30 , H01L24/32 , H01L24/83 , H01L25/0655 , H01L24/73 , H01L2224/2979 , H01L2224/29791 , H01L2224/29824 , H01L2224/29839 , H01L2224/29844 , H01L2224/29847 , H01L2224/29886 , H01L2224/29893 , H01L2224/3015 , H01L2224/3016 , H01L2224/30179 , H01L2224/30505 , H01L2224/32145 , H01L2224/32155 , H01L2224/32245 , H01L2224/3315 , H01L2224/3316 , H01L2224/33179 , H01L2224/33181 , H01L2224/73204 , H01L2224/73253 , H01L2224/83201
摘要: A package structure is provided. The package structure includes a chip-containing structure over a substrate and a first adhesive element directly above the chip-containing structure. The first adhesive element has a first thermal conductivity. The package structure also includes multiple second adhesive elements directly above the chip-containing structure. The second adhesive elements are spaced apart from each other, each of the second adhesive elements has a second thermal conductivity, and the second thermal conductivity is greater than the first thermal conductivity. The package structure further includes a protective lid attached to the chip-containing structure through the first adhesive element and the second adhesive elements. The protective lid extends across opposite sidewalls of the chip-containing structure.
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公开(公告)号:US20140131859A1
公开(公告)日:2014-05-15
申请号:US13929978
申请日:2013-06-28
发明人: Yong Li Xu , Tiao Zhou , Xiansong Chen , Kaysar M. Rahim , Viren Khandekar , Yi-Sheng Anthony Sun , Arkadii V. Samoilov
IPC分类号: H01L23/498 , H01L21/768
CPC分类号: H01L23/49811 , H01L21/76885 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/81 , H01L24/83 , H01L2224/02165 , H01L2224/02185 , H01L2224/0219 , H01L2224/0401 , H01L2224/04026 , H01L2224/05541 , H01L2224/05548 , H01L2224/05552 , H01L2224/05554 , H01L2224/05555 , H01L2224/05563 , H01L2224/05569 , H01L2224/05573 , H01L2224/05578 , H01L2224/05647 , H01L2224/0569 , H01L2224/0603 , H01L2224/06051 , H01L2224/10125 , H01L2224/13013 , H01L2224/131 , H01L2224/1403 , H01L2224/14051 , H01L2224/1416 , H01L2224/16225 , H01L2224/16227 , H01L2224/26125 , H01L2224/29013 , H01L2224/32227 , H01L2224/3303 , H01L2224/33051 , H01L2224/3316 , H01L2224/81192 , H01L2224/81365 , H01L2224/81815 , H01L2224/83192 , H01L2224/83365 , H01L2224/83815 , H01L2924/351 , H01L2924/3841 , H01L2924/00014 , H01L2924/00012 , H01L2924/206 , H01L2924/014 , H01L2924/00
摘要: A wafer level package includes a wafer, a lead disposed of the wafer for connecting the wafer to an electrical circuit, and a core disposed of the lead. In some embodiments, the lead disposed of the wafer is a copper pillar, and the core is plated onto the copper pillar. In some embodiments, the core is polymer screen-plated onto the lead. In some embodiments, the core extends between at least approximately thirty-five micrometers (35 μm) and fifty micrometers (50 μm) from the lead. In some embodiments, the core covers between at least approximately one-third (⅓) and one-half (½) of the surface area of the lead. In some embodiments, the core comprises a stud-shape extending from the lead. In some embodiments, the core extends perpendicularly across the lead. In some embodiments, the core extends longitudinally along the lead. Further, a portion of the core can extend perpendicularly from a longitudinal core.
摘要翻译: 晶片级封装包括晶片,用于将晶片连接到电路的晶片设置的引线和设置在引线上的芯。 在一些实施例中,设置晶片的引线是铜柱,并且芯被镀在铜柱上。 在一些实施方案中,芯是聚合物丝网电镀到引线上。 在一些实施例中,芯从引线延伸至少约35微米(35微米)和50微米(50μm)。 在一些实施例中,芯覆盖在铅的表面积的至少约三分之一(1/3)和一半(1/2)之间。 在一些实施例中,芯包括从引线延伸的螺柱形状。 在一些实施例中,芯垂直延伸穿过导线。 在一些实施例中,芯沿着引线纵向延伸。 此外,芯的一部分可以从纵向芯垂直延伸。
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公开(公告)号:US11978715B2
公开(公告)日:2024-05-07
申请号:US17324372
申请日:2021-05-19
发明人: Meng-Tsung Kuo , Hui-Chang Yu , Chih-Kung Huang , Wei-Teng Chang
IPC分类号: H01L23/00 , H01L21/48 , H01L23/10 , H01L23/367 , H01L25/065
CPC分类号: H01L24/33 , H01L21/4817 , H01L23/10 , H01L23/3675 , H01L24/29 , H01L24/30 , H01L24/32 , H01L24/83 , H01L25/0655 , H01L24/73 , H01L2224/2979 , H01L2224/29791 , H01L2224/29824 , H01L2224/29839 , H01L2224/29844 , H01L2224/29847 , H01L2224/29886 , H01L2224/29893 , H01L2224/3015 , H01L2224/3016 , H01L2224/30179 , H01L2224/30505 , H01L2224/32145 , H01L2224/32155 , H01L2224/32245 , H01L2224/3315 , H01L2224/3316 , H01L2224/33179 , H01L2224/33181 , H01L2224/73204 , H01L2224/73253 , H01L2224/83201
摘要: A package structure and a formation method of a package structure are provided. The method includes disposing a chip structure over a substrate and forming a first adhesive element directly on the chip structure. The first adhesive element has a first thermal conductivity. The method also includes forming a second adhesive element directly on the chip structure. The second adhesive element has a second thermal conductivity, and the second thermal conductivity is greater than the first thermal conductivity. The method further includes attaching a protective lid to the chip structure through the first adhesive element and the second adhesive element.
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公开(公告)号:US09583425B2
公开(公告)日:2017-02-28
申请号:US13929978
申请日:2013-06-28
发明人: Yong Li Xu , Tiao Zhou , Xiansong Chen , Kaysar M. Rahim , Viren Khandekar , Yi-Sheng Anthony Sun , Arkadii V. Samoilov
IPC分类号: H01L23/498 , H01L23/00 , H01L21/768
CPC分类号: H01L23/49811 , H01L21/76885 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/81 , H01L24/83 , H01L2224/02165 , H01L2224/02185 , H01L2224/0219 , H01L2224/0401 , H01L2224/04026 , H01L2224/05541 , H01L2224/05548 , H01L2224/05552 , H01L2224/05554 , H01L2224/05555 , H01L2224/05563 , H01L2224/05569 , H01L2224/05573 , H01L2224/05578 , H01L2224/05647 , H01L2224/0569 , H01L2224/0603 , H01L2224/06051 , H01L2224/10125 , H01L2224/13013 , H01L2224/131 , H01L2224/1403 , H01L2224/14051 , H01L2224/1416 , H01L2224/16225 , H01L2224/16227 , H01L2224/26125 , H01L2224/29013 , H01L2224/32227 , H01L2224/3303 , H01L2224/33051 , H01L2224/3316 , H01L2224/81192 , H01L2224/81365 , H01L2224/81815 , H01L2224/83192 , H01L2224/83365 , H01L2224/83815 , H01L2924/351 , H01L2924/3841 , H01L2924/00014 , H01L2924/00012 , H01L2924/206 , H01L2924/014 , H01L2924/00
摘要: A wafer level package includes a wafer, a lead disposed of the wafer for connecting the wafer to an electrical circuit, and a core disposed of the lead. In some embodiments, the lead disposed of the wafer is a copper pillar, and the core is plated onto the copper pillar. In some embodiments, the core is polymer screen-plated onto the lead. In some embodiments, the core extends between at least approximately thirty-five micrometers (35 μm) and fifty micrometers (50 μm) from the lead. In some embodiments, the core covers between at least approximately one-third (⅓) and one-half (½) of the surface area of the lead. In some embodiments, the core comprises a stud-shape extending from the lead. In some embodiments, the core extends perpendicularly across the lead. In some embodiments, the core extends longitudinally along the lead. Further, a portion of the core can extend perpendicularly from a longitudinal core.
摘要翻译: 晶片级封装包括晶片,用于将晶片连接到电路的晶片设置的引线和设置在引线上的芯。 在一些实施例中,设置晶片的引线是铜柱,并且芯被镀在铜柱上。 在一些实施方案中,芯是聚合物丝网电镀到引线上。 在一些实施例中,芯从引线延伸至少约35微米(35微米)和50微米(50μm)。 在一些实施例中,芯覆盖在铅的表面积的至少约三分之一(1/3)和一半(1/2)之间。 在一些实施例中,芯包括从引线延伸的螺柱形状。 在一些实施例中,芯垂直延伸穿过导线。 在一些实施例中,芯沿着引线纵向延伸。 此外,芯的一部分可以从纵向芯垂直延伸。
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