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公开(公告)号:US11557587B2
公开(公告)日:2023-01-17
申请号:US16874347
申请日:2020-05-14
Applicant: ROHM CO., LTD.
Inventor: Kentaro Nasu , Kenji Nishida
IPC: H01L27/08 , H01L27/088 , H01L23/522 , H01L27/02 , H01L29/78 , H01L29/06 , H01L29/423 , H01L27/06 , H01L29/08 , H01L29/417 , H01L29/49 , H01L23/495 , H01L21/8234
Abstract: A semiconductor device includes an enhancement-mode first p-channel MISFET, an enhancement-mode second p-channel MISFET, a drain conductor electrically and commonly connected to the first p-channel MISFET and the second p-channel MISFET, a first source conductor electrically connected to a source of the first p-channel MISFET, a second source conductor electrically connected to a source of the second p-channel MISFET, and a gate conductor electrically and commonly connected to a gate of the first p-channel MISFET and a gate of the second p-channel MISFET.
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公开(公告)号:US12159816B2
公开(公告)日:2024-12-03
申请号:US18492586
申请日:2023-10-23
Applicant: ROHM CO., LTD.
Inventor: Kentaro Nasu
IPC: H01L23/495 , H01L23/00 , H01L23/31 , H01L25/07
Abstract: The semiconductor device includes first and second semiconductor elements. Each element has an obverse surface and a reverse surface, with a first electrode arranged on the reverse surface, and with a second electrode arranged on the obverse surface. The semiconductor device further includes: a first lead having an obverse surface and a reverse surface; an insulating layer covering the first lead, the first semiconductor element and the second semiconductor element; a first electrode connected to the second electrode of the first semiconductor element; and a second electrode connected to the first lead. The first semiconductor element and the first lead are bonded to each other with the reverse surface of the first semiconductor element facing the lead obverse surface. The second semiconductor element and the first lead are bonded to each other with the reverse surface of the second semiconductor element facing the lead reverse surface.
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公开(公告)号:US10090294B2
公开(公告)日:2018-10-02
申请号:US15449479
申请日:2017-03-03
Applicant: ROHM CO., LTD.
Inventor: Kenji Nishida , Shinpei Ohnishi , Kentaro Nasu
IPC: H01L29/866 , H01L27/06 , H01L29/739 , H01L29/423 , H01L29/06
Abstract: A semiconductor device, including a semiconductor layer of a first conductivity type, having a main surface with a diode trench formed therein, an inner wall insulating film, including a side wall insulating film, formed along side walls of the diode trench, and a bottom wall insulating film, formed along a bottom wall of the diode trench and having a thickness greater than a thickness of the side wall insulating film, and a bidirectional Zener diode, formed on the bottom wall insulating film inside the diode trench and having a pair of first conductivity type portions and at least one second conductivity type portion formed between the pair of first conductivity type portions.
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公开(公告)号:USD822627S1
公开(公告)日:2018-07-10
申请号:US29598525
申请日:2017-03-27
Applicant: ROHM CO., LTD.
Designer: Kentaro Nasu , Kenji Nishida
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公开(公告)号:US11201237B2
公开(公告)日:2021-12-14
申请号:US16703579
申请日:2019-12-04
Applicant: ROHM CO., LTD.
Inventor: Kentaro Nasu
IPC: H01L29/78 , H01L29/866 , H01L29/423 , H01L29/16 , H01L29/417 , H01L27/02
Abstract: A semiconductor device includes a semiconductor layer that has a transistor structure including a p type source region, a p type drain region, an n type body region between the p type source region and the p type drain region, and a gate electrode facing the n type body region and a voltage-regulator diode that is disposed at the semiconductor layer and that has an n type portion connected to the p type source region and a p type portion connected to the gate electrode, in which the transistor structure and the voltage-regulator diode are unified into a single-chip configuration.
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公开(公告)号:US10566325B2
公开(公告)日:2020-02-18
申请号:US16105518
申请日:2018-08-20
Applicant: ROHM CO., LTD.
Inventor: Kenji Nishida , Shinpei Ohnishi , Kentaro Nasu
IPC: H01L27/06 , H01L29/866 , H01L29/739 , H01L29/423 , H01L29/06 , H01L29/66 , H01L29/78 , H01L29/40 , H01L29/16 , H01L29/20
Abstract: A semiconductor device, including a semiconductor layer of a first conductivity type, having a main surface with a diode trench formed therein, an inner wall insulating film, including a side wall insulating film, formed along side walls of the diode trench, and a bottom wall insulating film, formed along a bottom wall of the diode trench and having a thickness greater than a thickness of the side wall insulating film, and a bidirectional Zener diode, formed on the bottom wall insulating film inside the diode trench and having a pair of first conductivity type portions and at least one second conductivity type portion formed between the pair of first conductivity type portions.
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公开(公告)号:USD822628S1
公开(公告)日:2018-07-10
申请号:US29598531
申请日:2017-03-27
Applicant: ROHM CO., LTD.
Designer: Kentaro Nasu , Kenji Nishida
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公开(公告)号:US12154900B2
公开(公告)日:2024-11-26
申请号:US18065997
申请日:2022-12-14
Applicant: ROHM CO., LTD.
Inventor: Kentaro Nasu , Kenji Nishida
IPC: H01L27/02 , H01L23/522 , H01L27/06 , H01L27/088 , H01L29/06 , H01L29/423 , H01L29/78 , H01L21/8234 , H01L23/495 , H01L29/08 , H01L29/417 , H01L29/49
Abstract: A semiconductor device includes an enhancement-mode first p-channel MISFET, an enhancement-mode second p-channel MISFET, a drain conductor electrically and commonly connected to the first p-channel MISFET and the second p-channel MISFET, a first source conductor electrically connected to a source of the first p-channel MISFET, a second source conductor electrically connected to a source of the second p-channel MISFET, and a gate conductor electrically and commonly connected to a gate of the first p-channel MISFET and a gate of the second p-channel MISFET.
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公开(公告)号:US10692863B2
公开(公告)日:2020-06-23
申请号:US15713015
申请日:2017-09-22
Applicant: ROHM CO., LTD.
Inventor: Kentaro Nasu , Kenji Nishida
IPC: H01L27/088 , H01L23/522 , H01L27/02 , H01L29/78 , H01L29/06 , H01L29/423 , H01L27/06 , H01L29/08 , H01L29/417 , H01L29/49 , H01L23/495 , H01L21/8234
Abstract: A semiconductor device includes an enhancement-mode first p-channel MISFET, an enhancement-mode second p-channel MISFET, a drain conductor electrically and commonly connected to the first p-channel MISFET and the second p-channel MISFET, a first source conductor electrically connected to a source of the first p-channel MISFET, a second source conductor electrically connected to a source of the second p-channel MISFET, and a gate conductor electrically and commonly connected to a gate of the first p-channel MISFET and a gate of the second p-channel MISFET.
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公开(公告)号:USD823270S1
公开(公告)日:2018-07-17
申请号:US29598520
申请日:2017-03-27
Applicant: ROHM CO., LTD.
Designer: Kentaro Nasu , Kenji Nishida
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